]> git.sur5r.net Git - u-boot/log
u-boot
11 years agoomap3_beagle: remove JFFS2 support.
Nishanth Menon [Mon, 15 Jul 2013 12:11:28 +0000 (07:11 -0500)]
omap3_beagle: remove JFFS2 support.

We do not use JFFS2 by default and it conflicts with
CONFIG_CMD_FS_GENERIC (ls command is the same). Since most of our
BOOTCMD can be simplified by using the FS_GENERIC, dropping JFFS2

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Joel Fernandes <joelf@ti.com>
11 years agoARM: DRA7xx: Enable CPSW Ethernet support
Mugunthan V N [Mon, 8 Jul 2013 10:34:43 +0000 (16:04 +0530)]
ARM: DRA7xx: Enable CPSW Ethernet support

Enabling CPSW Ethernet support in DRA7xx EVM.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
11 years agoARM: DRA7xx: Add CPSW and MDIO pinmux support
Mugunthan V N [Mon, 8 Jul 2013 10:34:42 +0000 (16:04 +0530)]
ARM: DRA7xx: Add CPSW and MDIO pinmux support

Adding CPSW Slave 0 and MDIO pinmux support for DRA7xx EVM

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
11 years agoARM: DRA7xx: Add CPSW support to DRA7xx EVM
Mugunthan V N [Mon, 8 Jul 2013 10:34:41 +0000 (16:04 +0530)]
ARM: DRA7xx: Add CPSW support to DRA7xx EVM

Adding support for CPSW Ethernet support found in DRA7xx EVM

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
11 years agoARM: DRA7xx: Enable GMAC clock control
Mugunthan V N [Mon, 8 Jul 2013 10:34:40 +0000 (16:04 +0530)]
ARM: DRA7xx: Enable GMAC clock control

Enabling CPSW module by enabling GMAC clock control

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
11 years agoARM: DRA7xx: Lock DPLL_GMAC
Lokesh Vutla [Mon, 8 Jul 2013 10:34:39 +0000 (16:04 +0530)]
ARM: DRA7xx: Lock DPLL_GMAC

Locking DPLL_GMAC

[mugunthanvnm@ti.com:Configure only if CPSW is selected]

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
11 years agodrivers: net: cpsw: Enable statistics for all port
Mugunthan V N [Mon, 8 Jul 2013 10:34:38 +0000 (16:04 +0530)]
drivers: net: cpsw: Enable statistics for all port

Enable hardware statistics for all ports, enabling only to host port is useless

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
11 years agodrivers: net: cpsw: remove hard coding bd ram for cpsw
Mugunthan V N [Mon, 8 Jul 2013 10:34:37 +0000 (16:04 +0530)]
drivers: net: cpsw: remove hard coding bd ram for cpsw

BD ram address may vary in various SOC, so removing the hardcoding and
passing the same information through platform data

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
11 years agoam335x_evm: Add basic README
Tom Rini [Mon, 8 Jul 2013 16:15:18 +0000 (12:15 -0400)]
am335x_evm: Add basic README

Add a README for the family of boards the am335x_evm covers, and include
instructions on preparing and using falcon mode, for various media.

Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
11 years agoam335x_evm: Correct CONFIG_CMD_SPL_WRITE_SIZE
Tom Rini [Mon, 8 Jul 2013 16:15:17 +0000 (12:15 -0400)]
am335x_evm: Correct CONFIG_CMD_SPL_WRITE_SIZE

We use CONFIG_CMD_SPL_WRITE_SIZE when reading/writing the args portion
of falcon mode to NAND.  Previously it was half the size of the
eraseblock which is too small, increase to eraseblock size.

Signed-off-by: Tom Rini <trini@ti.com>
11 years agoam335x_evm: Update eMMC falcon mode locations
Tom Rini [Mon, 8 Jul 2013 16:15:16 +0000 (12:15 -0400)]
am335x_evm: Update eMMC falcon mode locations

The previous location used for the "args" portion of falcon mode was too
small to allow for a device tree to be saved there, so move the location
slightly and increase the size.  In addition, our previous kernel
location was part of the area we set aside for U-Boot itself, so move it
up a bit higher.

Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
11 years agoam335x_evm: Correct DFU ALT settings for falcon mode
Tom Rini [Mon, 8 Jul 2013 16:15:15 +0000 (12:15 -0400)]
am335x_evm: Correct DFU ALT settings for falcon mode

Now that we have falcon mode enabled, the partiton numbers for NAND have
changed, and we need to list entries for updating these parts of the
system.  While adding falcon mode entires for eMMC (raw), we round up
the limit on U-Boot for ease of math later.

Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
11 years agoREADME.falcon: Note how we determine if we can boot the OS or not
Tom Rini [Mon, 8 Jul 2013 16:15:14 +0000 (12:15 -0400)]
README.falcon: Note how we determine if we can boot the OS or not

Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoomap3/sys_info: fix printout of OMAP36XX L3 freqency
Andreas Bießmann [Mon, 8 Jul 2013 13:21:34 +0000 (15:21 +0200)]
omap3/sys_info: fix printout of OMAP36XX L3 freqency

The OMAP36xx/OMAP37xx family uses L3 frequency of 200MHz instead of 165MHz
used by OMAP34xx/OMAP35xx.

Also fix checkpatch warning about alignment.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
11 years agospl_mmc.c: Detect missing kernel image in RAW MMC
Tom Rini [Fri, 28 Jun 2013 18:43:01 +0000 (14:43 -0400)]
spl_mmc.c: Detect missing kernel image in RAW MMC

Currently, we assume that if we can read from MMC correctly, we have
found a valid image.  This is not the case as an empty area will read
just fine.  Add a check for a valid IH_MAGIC.

Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
11 years agoda850evm: Use clrbits function with correct endianess
Christian Riesch [Fri, 14 Jun 2013 12:22:36 +0000 (14:22 +0200)]
da850evm: Use clrbits function with correct endianess

The current code uses clrbits_be32 which is incorrect since we are on
a little endian machine here. This patch fixes this issue and also removes
some unnecessary code: Reading the current GPIO bank state is not required
if we are using the SET and CLEAR GPIO registers for setting/clearing
bits.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Cc: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
11 years agoarm: omap3: spl: Fix problem with 8bit NAND devices
Stefan Roese [Fri, 14 Jun 2013 08:55:00 +0000 (10:55 +0200)]
arm: omap3: spl: Fix problem with 8bit NAND devices

Currently in OMAP3 SPL, the GPMC for NAND is configured for 16bit
access. This patch adds support for 8bit NAND devices as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
11 years agoMerge branch 'u-boot/master' into u-boot-arm/master
Albert ARIBAUD [Thu, 25 Jul 2013 15:57:46 +0000 (17:57 +0200)]
Merge branch 'u-boot/master' into u-boot-arm/master

11 years agoMerge branch 'master' of git://git.denx.de/u-boot-nds32
Tom Rini [Thu, 25 Jul 2013 12:22:08 +0000 (08:22 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-nds32

11 years agoqemu-malta: Update for SPDX license identifiers
Tom Rini [Wed, 24 Jul 2013 13:34:30 +0000 (09:34 -0400)]
qemu-malta: Update for SPDX license identifiers

Signed-off-by: Tom Rini <trini@ti.com>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-mips
Tom Rini [Wed, 24 Jul 2013 13:30:46 +0000 (09:30 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips

Conflict over SPDX changes means that one change was effectively dropped
as it was fixing typos in a removed hunk of text.

Conflicts:
arch/mips/cpu/mips64/start.S

Signed-off-by: Tom Rini <trini@ti.com>
11 years agodrivers/i2c: Update fti2c010.[ch], i2c_core.c to use SPDX identifiers
Tom Rini [Wed, 24 Jul 2013 13:25:40 +0000 (09:25 -0400)]
drivers/i2c: Update fti2c010.[ch], i2c_core.c to use SPDX identifiers

Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agosocfpga: Move board/socfpga_cyclone5 to board/socfpga
Dinh Nguyen [Tue, 2 Jul 2013 22:00:18 +0000 (17:00 -0500)]
socfpga: Move board/socfpga_cyclone5 to board/socfpga

Because the SOCFPGA platform will include support for Cyclone V and
Arria V FPGA parts, renaming socfpga_cyclone5 folder to socfpga to
be more generic.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Tom Rini <trini@ti.com>
v2:
- Add Reviewed-by: Pavel Machek
- Cc: Tom Rini

11 years agonds32: Enable FPU if the version of CPU supported
ken kuo [Wed, 24 Jul 2013 18:17:11 +0000 (02:17 +0800)]
nds32: Enable FPU if the version of CPU supported

Some version of Andes core support FPU coprocessor,
if this is the case, and toolchain support FPU instruction set,
we should enable it at low level initialization time.

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
11 years agonds32: Update <asm/io.h> and <asm/setup.h> with SPDX license identifiers
Tom Rini [Wed, 24 Jul 2013 13:39:00 +0000 (09:39 -0400)]
nds32: Update <asm/io.h> and <asm/setup.h> with SPDX license identifiers

Signed-off-by: Tom Rini <trini@ti.com>
11 years agonds32: Convert Makefiles to use COBJS-y style
ken kuo [Wed, 24 Jul 2013 18:24:54 +0000 (02:24 +0800)]
nds32: Convert Makefiles to use COBJS-y style

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
11 years agohighbank: enable keyed autoboot stop
Rob Herring [Thu, 13 Jun 2013 03:24:54 +0000 (22:24 -0500)]
highbank: enable keyed autoboot stop

Restrict autoboot interruption to "s" or "d" keys. This will prevent some
unwanted stopping and also allow disabling the reset on command timeout.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
11 years agoARM: highbank: compile misc_init_r only if CONFIG_MISC_INIT_R
Rob Herring [Thu, 13 Jun 2013 03:24:53 +0000 (22:24 -0500)]
ARM: highbank: compile misc_init_r only if CONFIG_MISC_INIT_R

Compile misc_init_r only if CONFIG_MISC_INIT_R is enabled.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
11 years agoARM: highbank: setup peripherals based on power domain status
Rob Herring [Thu, 13 Jun 2013 03:24:52 +0000 (22:24 -0500)]
ARM: highbank: setup peripherals based on power domain status

Accessing powered down peripherals will hang the bus, so check power
domain status before initializing SATA and fixup the FDT to disable
unused peripherals.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
11 years agoARM: highbank: enable reset on command timeout
Rob Herring [Thu, 13 Jun 2013 03:24:51 +0000 (22:24 -0500)]
ARM: highbank: enable reset on command timeout

Enable resetting on command timeout. The timeout is set with environment
setting bootretry.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
11 years agoARM: highbank: avoid bss write in timer_init
Rob Herring [Thu, 13 Jun 2013 03:24:50 +0000 (22:24 -0500)]
ARM: highbank: avoid bss write in timer_init

The timer_init function is called before relocation and writes to bss data
were corrupting relocation data. Fix this by removing the call to
reset_timer_masked. The initial timer count should be 0 or near 0 anyway,
so initializing the variables are not needed.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
11 years agoARM: highbank: set timer prescaler to 256
Rob Herring [Thu, 13 Jun 2013 03:24:49 +0000 (22:24 -0500)]
ARM: highbank: set timer prescaler to 256

The 150MHz clock rate gives u-boot time functions problems and there's no
benefit to a fast clock, so lower the rate.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
11 years agoARM: highbank: fix get_tbclk value to timer rate
Rob Herring [Thu, 13 Jun 2013 03:24:48 +0000 (22:24 -0500)]
ARM: highbank: fix get_tbclk value to timer rate

get_tbclk should return the timer's frequency, not CONFIG_SYS_HZ.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
11 years agoARM: highbank: update config options
Rob Herring [Thu, 13 Jun 2013 03:24:47 +0000 (22:24 -0500)]
ARM: highbank: update config options

Various changes to highbank config:

Enable EFI partitions
Enable ext4 and FAT filesystems
Enable bootz command and raw initrd
Increase cmd and print buffer size to 1K
Change serial baudrate to 115200
Enable hush shell

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
11 years agonet: calxedaxgmac: enable rx cut-thru
Rob Herring [Thu, 13 Jun 2013 03:24:46 +0000 (22:24 -0500)]
net: calxedaxgmac: enable rx cut-thru

There is no reason to wait for the entire frame to start DMA on receive,
so enable rx cut-thru for better performance.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
11 years agoARM: move interrupt_init to before relocation
Rob Herring [Thu, 13 Jun 2013 03:24:45 +0000 (22:24 -0500)]
ARM: move interrupt_init to before relocation

interrupt_init also sets up the abort stack, but is not setup before
relocation. So any aborts during relocation will hang and not print out
any useful information. Fix this by moving the interrupt_init to after
the stack setup in board_init_f.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
11 years agoMIPS: mips32/cache.S: use v1 register for indirect function calls
Gabor Juhos [Thu, 13 Jun 2013 10:59:36 +0000 (12:59 +0200)]
MIPS: mips32/cache.S: use v1 register for indirect function calls

Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: mips32/cache.S: store cache line size in t8 register
Gabor Juhos [Thu, 13 Jun 2013 10:59:35 +0000 (12:59 +0200)]
MIPS: mips32/cache.S: store cache line size in t8 register

Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: mips32/cache.S: save return address in t9 register
Gabor Juhos [Thu, 13 Jun 2013 10:59:34 +0000 (12:59 +0200)]
MIPS: mips32/cache.S: save return address in t9 register

Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: xburst/start.S: rework relocation info check
Gabor Juhos [Fri, 14 Jun 2013 12:47:10 +0000 (14:47 +0200)]
MIPS: xburst/start.S: rework relocation info check

Make it similar to the code in mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: xburst/start.S: use t8 register for dynamic relocation
Gabor Juhos [Thu, 13 Jun 2013 10:59:32 +0000 (12:59 +0200)]
MIPS: xburst/start.S: use t8 register for dynamic relocation

Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: xburst/start.S: save gd in s0 register
Gabor Juhos [Thu, 13 Jun 2013 10:59:31 +0000 (12:59 +0200)]
MIPS: xburst/start.S: save gd in s0 register

Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: xburst/start.S: save relocation offset in s1 register
Gabor Juhos [Thu, 13 Jun 2013 10:59:30 +0000 (12:59 +0200)]
MIPS: xburst/start.S: save relocation offset in s1 register

Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: xburst/start.S: save relocation address in s2 register
Gabor Juhos [Thu, 13 Jun 2013 10:59:29 +0000 (12:59 +0200)]
MIPS: xburst/start.S: save relocation address in s2 register

Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: mips32/start.S: rework relocation info check
Gabor Juhos [Thu, 13 Jun 2013 10:59:28 +0000 (12:59 +0200)]
MIPS: mips32/start.S: rework relocation info check

Make it similar to the code in mips64/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: mips32/start.S: use t8 register for dynamic relocation
Gabor Juhos [Thu, 13 Jun 2013 10:59:27 +0000 (12:59 +0200)]
MIPS: mips32/start.S: use t8 register for dynamic relocation

Synchronize the code with mips64/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: mips32/cache.S: remove superfluous register assignment
Gabor Juhos [Wed, 12 Jun 2013 16:02:46 +0000 (18:02 +0200)]
MIPS: mips32/cache.S: remove superfluous register assignment

The t4 register already holds the cache
line size, and the value of the register
is not changed in mips_init_icache.

Get the cache line size value from t4 for
mips_init_dcache as well and remove the
superfluous assignment of t5 register.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
11 years agoMIPS: remove obsolete TODO items
Gabor Juhos [Wed, 12 Jun 2013 16:02:45 +0000 (18:02 +0200)]
MIPS: remove obsolete TODO items

The MIPS  code uses centralized u-boot.lds script already,
and dynamic relocation is supported as well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: mips64/interrupt.c: remove superfluous include
Gabor Juhos [Wed, 12 Jun 2013 16:02:44 +0000 (18:02 +0200)]
MIPS: mips64/interrupt.c: remove superfluous include

Nothing is used from asm/mipsregs.h.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: mips32/time.c: fix checkpatch errors/warnings
Gabor Juhos [Wed, 12 Jun 2013 16:02:43 +0000 (18:02 +0200)]
MIPS: mips32/time.c: fix checkpatch errors/warnings

Checking mips32/time.c with checkpatch.pl shows this:

  arch/mips/cpu/mips32/time.c:30: WARNING: line over 80 characters
  arch/mips/cpu/mips32/time.c:57: ERROR: return is not a function, parentheses are not required
  total: 1 errors, 1 warnings, 0 checks, 85 lines checked

Fix the code to make checkpatch.pl happy.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: qemu-malta: bring up ethernet
Gabor Juhos [Wed, 22 May 2013 03:57:44 +0000 (03:57 +0000)]
MIPS: qemu-malta: bring up ethernet

Qemu emulates a PCNET PCI card for the Malta CoreLV board.
Enable the pcnet driver and add board specific ethernet
initialization function to bring it up. Also enable the
CONFIG_CMD_NET and CONFIG_CMD_PING options.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: qemu-malta: add PCI support
Gabor Juhos [Wed, 22 May 2013 03:57:42 +0000 (03:57 +0000)]
MIPS: qemu-malta: add PCI support

Qemu emulates the Galileo GT64120 System Controller
which provides a CPU bus to PCI bus bridge.

The patch adds driver for this bridge and enables
PCI support for the emulated Malta board.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: qemu-malta: setup GT64120 registers as done by YAMON
Gabor Juhos [Wed, 22 May 2013 03:57:41 +0000 (03:57 +0000)]
MIPS: qemu-malta: setup GT64120 registers as done by YAMON

Move the GT64120 register base to 0x1be00000
and setup PCI BAR registers as done by the
original YAMON bootloader.

This is needed for running Linux kernel.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: qemu-malta: enable flash support
Gabor Juhos [Wed, 22 May 2013 03:57:39 +0000 (03:57 +0000)]
MIPS: qemu-malta: enable flash support

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: qemu-malta: add reset support
Gabor Juhos [Wed, 22 May 2013 03:57:38 +0000 (03:57 +0000)]
MIPS: qemu-malta: add reset support

The MIPS Malta board has a SOFTRES register. Writing a
magic value into that register initiates a board reset.

Use this feature to implement reset support.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: qemu-malta: add support for emulated MIPS Malta board
Gabor Juhos [Wed, 22 May 2013 03:57:37 +0000 (03:57 +0000)]
MIPS: qemu-malta: add support for emulated MIPS Malta board

Add minimal support for the MIPS Malta CoreLV board
emulated by Qemu. The only supported peripherial is
the UART.

This is enough to boot U-Boot to the command prompt
both in little and big endian mode.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: start.S: emulate REVISION register for qemu-malta
Gabor Juhos [Wed, 22 May 2013 03:57:46 +0000 (03:57 +0000)]
MIPS: start.S: emulate REVISION register for qemu-malta

On the origial Malta boards the REVISION register is
accessible at the 0x1fc00010 address. The contents of
this register gives information about the revision
of the Malta and Core Boards.

This register is used by the Linux kernel to identify
the actual board it is running on. However the register
is not emulated properly by Qemu, so put a hardcoded
value into the flash to make Linux work.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: import gt64120.h header from Linux
Gabor Juhos [Wed, 22 May 2013 03:57:40 +0000 (03:57 +0000)]
MIPS: import gt64120.h header from Linux

The Linux specific register access macros, the
extern function declarations and the UL suffixes
has been removed.

The header file will be used for the qemu-malta
board.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agonet: pcnet: use pci_virt_to_mem to obtain buffer addresses
Gabor Juhos [Wed, 22 May 2013 03:57:43 +0000 (03:57 +0000)]
net: pcnet: use pci_virt_to_mem to obtain buffer addresses

The pcnet driver uses the pci_phys_to_mem function
to get the memory address of the DMA buffers. This
This assumes an 1:1 mapping between the PCI and
physical memory which is not true on all platforms.

On MIPS platform U-Boot is running within a mapped
memory region, and the pci_phys_to_mem macro can't
be used to obtain the memory address of the buffers.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
11 years agoMIPS: mips64: fix typos in copyright text of start.S
Tom Rini [Wed, 24 Jul 2013 13:50:52 +0000 (09:50 -0400)]
MIPS: mips64: fix typos in copyright text of start.S

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Conflicts:

arch/mips/cpu/mips64/start.S

Signed-off-by: Tom Rini <trini@ti.com>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-i2c
Tom Rini [Wed, 24 Jul 2013 13:22:28 +0000 (09:22 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c

The sandburst-specific i2c drivers have been deleted, conflict was just
over the SPDX conversion.

Conflicts:
board/sandburst/common/ppc440gx_i2c.c
board/sandburst/common/ppc440gx_i2c.h

Signed-off-by: Tom Rini <trini@ti.com>
11 years agoAdd eCos-2.0 SPDX-License-Identifier to source files
Wolfgang Denk [Mon, 8 Jul 2013 10:11:35 +0000 (12:11 +0200)]
Add eCos-2.0 SPDX-License-Identifier to source files

Signed-off-by: Wolfgang Denk <wd@denx.de>
11 years agoAdd LGPL-2.0+ SPDX-License-Identifier to source files
Wolfgang Denk [Mon, 8 Jul 2013 09:58:49 +0000 (11:58 +0200)]
Add LGPL-2.0+ SPDX-License-Identifier to source files

Signed-off-by: Wolfgang Denk <wd@denx.de>
11 years agoAdd LGPL-2.1+ SPDX-License-Identifier to source files
Wolfgang Denk [Mon, 8 Jul 2013 09:48:07 +0000 (11:48 +0200)]
Add LGPL-2.1+ SPDX-License-Identifier to source files

Signed-off-by: Wolfgang Denk <wd@denx.de>
11 years agoAdd GPL-2.0+ SPDX-License-Identifier to source files
Wolfgang Denk [Mon, 8 Jul 2013 07:37:19 +0000 (09:37 +0200)]
Add GPL-2.0+ SPDX-License-Identifier to source files

Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoLicenses: introduce SPDX Unique Lincense Identifiers
Wolfgang Denk [Fri, 21 Jun 2013 08:22:36 +0000 (10:22 +0200)]
Licenses: introduce SPDX Unique Lincense Identifiers

Like many other projects, U-Boot has a tradition of including big
blocks of License headers in all files.  This not only blows up the
source code with mostly redundant information, but also makes it very
difficult to generate License Clearing Reports.  An additional problem
is that even the same lincenses are referred to by a number of
slightly varying text blocks (full, abbreviated, different
indentation, line wrapping and/or white space, with obsolete address
information, ...) which makes automatic processing a nightmare.

To make this easier, such license headers in the source files will be
replaced with a single line reference to Unique Lincense Identifiers
as defined by the Linux Foundation's SPDX project [1].  For example,
in a source file the full "GPL v2.0 or later" header text will be
replaced by a single line:

        SPDX-License-Identifier:        GPL-2.0+

We use the SPDX Unique Lincense Identifiers here; these are available
at [2].

Note: From the legal point of view, this patch is supposed to be only
a change to the textual representation of the license information,
but in no way any change to the actual license terms. With this patch
applied, all files will still be licensed under the same terms they
were before.

Note 2: The apparent difference between the old "COPYING" and the new
"Licenses/gpl-2.0.txt" only results from switching to the upstream
version of the license which is differently formatted; there are not
any actual changes to the content.

Note 3: There are some recurring questions about linense issues, such
as:
    - Is a "All Rights Reserved" clause a problem in GPL code?
    - Are files without any license header a problem?
    - Do we need license headers at all?

The following excerpt from an e-mail by Daniel B. Ravicher should help
with these:

| Message-ID: <4ADF8CAA.5030808@softwarefreedom.org>
| Date: Wed, 21 Oct 2009 18:35:22 -0400
| From: "Daniel B. Ravicher" <ravicher@softwarefreedom.org>
| To: Wolfgang Denk <wd@denx.de>
| Subject: Re: GPL and license cleanup questions
|
| Mr. Denk,
|
| Wolfgang Denk wrote:
| > - There are a number of files which do not include any specific
| > license information at all. Is it correct to assume that these files
| > are automatically covered by the "GPL v2 or later" clause as
| > specified by the COPYING file in the top level directory of the
| > U-Boot source tree?
|
| That is a very fact specific analysis and could be different across the
| various files.  However, if the contributor could reasonably be expected
| to have known that the project was licensed GPLv2 or later at the time
| she made her contribution, then a reasonably implication is that she
| consented to her contributions being distributed under those terms.
|
| > - Do such files need any clean up, for example should we add GPL
| > headers to them, or is this not needed?
|
| If the project as a whole is licensed under clear terms, you need not
| identify those same terms in each file, although there is no harm in
| doing so.
|
| > - There are other files, which include both a GPL license header
| > _plus_ some copyright note with an "All Rights Reserved" clause. It
| > has been my understanding that this is a conflict, and me must ask
| > the copyright holders to remove such "All Rights Reserved" clauses.
| > But then, some people claim that "All Rights Reserved" is a no-op
| > nowadays. License checking tools (like OSLC) seem to indicate this is
| > a problem, but then we see quite a lot of "All rights reserved" in
| > BSD-licensed files in gcc and glibc. So what is the correct way to
| > deal with such files?
|
| It is not a conflict to grant a license and also reserve all rights, as
| implicit in that language is that you are reserving all "other" rights
| not granted in the license.  Thus, a file with "Licensed under GPL, All
| Rights Reserved" would mean that it is licensed under the GPL, but no
| other rights are given to copy, modify or redistribute it.
|
| Warm regards,
| --Dan
|
| Daniel B. Ravicher, Legal Director
| Software Freedom Law Center (SFLC) and Moglen Ravicher LLC
| 1995 Broadway, 17th Fl., New York, NY 10023
| (212) 461-1902 direct  (212) 580-0800 main  (212) 580-0898 fax
| ravicher@softwarefreedom.org   www.softwarefreedom.org

[1] http://spdx.org/
[2] http://spdx.org/licenses/

Signed-off-by: Wolfgang Denk <wd@denx.de>
11 years agonds32: ag101/ag102: Fix setting lastdec and now values
Axel Lin [Mon, 8 Jul 2013 06:29:52 +0000 (14:29 +0800)]
nds32: ag101/ag102: Fix setting lastdec and now values

The timer3 counter unit for lastdesc and now values are inconsistent in current
code. The unit of "readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2)" is
second. However, CONFIG_SYS_HZ is defined as 1000 in board config file.
This means the accuracy of "lastdec" and "now" should be in millisecond,
thus fix the equation to set lastdec and now variables accordingly.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
11 years agonds32: Enable the function of passing parameters to Linux
ken kuo [Sat, 8 Jun 2013 03:14:12 +0000 (11:14 +0800)]
nds32: Enable the function of passing parameters to Linux

Add a header file, setup.h, which copy from Linux source code,
this file contain structures are used to pass initialisation parameters
to Linux. Enable this function on adp-ag101/adp-ag101p target

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
11 years agonds32: Enable SDIO and EXT2 command support for Andes board
ken kuo [Sat, 8 Jun 2013 03:14:11 +0000 (11:14 +0800)]
nds32: Enable SDIO and EXT2 command support for Andes board

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
11 years agonds32: Enable two banks of SDRAM on Andes board
ken kuo [Sat, 8 Jun 2013 03:14:09 +0000 (11:14 +0800)]
nds32: Enable two banks of SDRAM on Andes board

The original adp-ag101/adp-ag101p initialize only one bank(64MB)
by default at boot time, but it is not enough for some application,
so increasing to two banks(128M).

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
11 years agonds32: adp-ag102: use 'faraday/ftpci100.h' for pci_ftpci_init
Gabor Juhos [Sun, 26 May 2013 10:11:31 +0000 (12:11 +0200)]
nds32: adp-ag102: use 'faraday/ftpci100.h' for pci_ftpci_init

Due to improper external function declaration,
building U-Boot for the adp-ag102 board shows
this warning:

  adp-ag102.c: In function 'pci_init_board':
  adp-ag102.c:95: warning: function declaration isn't a prototype

Include the 'faraday/ftpci100.h' header which
provides the proper declaration and remove the
local declaration to get rid of the warning.

Compile tested only.

Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
11 years agopci: move pci_ftpci100.h to include/faraday/ftpci100.h
Gabor Juhos [Sun, 26 May 2013 10:11:30 +0000 (12:11 +0200)]
pci: move pci_ftpci100.h to include/faraday/ftpci100.h

Even though the header files is used only by the
pci_ftpci100 driver, it contains declaration for
a function which is used by external code.

Move the header file to a common location which
lets external code use it.

Compile tested only.

Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
11 years agopci: add prototype for pci_ftpci_init() function
Gabor Juhos [Sun, 26 May 2013 10:11:29 +0000 (12:11 +0200)]
pci: add prototype for pci_ftpci_init() function

The pci_ftpci_init() function is implemented
in 'drivers/pci/pci_ftpci100.c' however it is
always called by external code.

Add function declaration into ftpci100.h to
make it visible for external code.

Compile tested only.

Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
11 years agoblock: constify sect_buf argument of ide_write_data
Gabor Juhos [Sun, 26 May 2013 10:11:28 +0000 (12:11 +0200)]
block: constify sect_buf argument of ide_write_data

Add a const keyword to the sect_buf argument of
ide_write_data to fix the following warning:

  cmd_ide.c: In function '__ide_output_data':
  cmd_ide.c:548: warning: passing argument 2 of 'ide_write_data' discards qualifiers from pointer target type
  /devel/u-boot.git/include/ide.h:76: note: expected 'ulong *' but argument is of type 'const ulong *'

Also modify the driver-model documentation to
match with the new prototype.

Compile tested only.

Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
11 years agommc: ftsdc010_mci: fix build error if CONFIG_FTSDC010_SDIO is not defined
Gabor Juhos [Sun, 26 May 2013 10:11:27 +0000 (12:11 +0200)]
mmc: ftsdc010_mci: fix build error if CONFIG_FTSDC010_SDIO is not defined

The FTSDC010_DCR_FIFO_RST symbol is conditionally
defined in <faraday/ftsdc010.h> and it is available
available when CONFIG_FTSDC010_SDIO is enabled.

However the actual driver code unconditionally uses
the FTSDC010_DCR_FIFO_RST constant and this causes
build error if CONFIG_FTSDC010_SDIO is not enabled.

The following error happens when compiling for the
adp-ag101 board:

  ftsdc010_mci.c: In function 'ftsdc010_request':
  ftsdc010_mci.c:178: error: 'FTSDC010_DCR_FIFO_RST' undeclared (first use in this function)
  ftsdc010_mci.c:178: error: (Each undeclared identifier is reported only once
  ftsdc010_mci.c:178: error: for each function it appears in.)

The patch ensures that the FTSDC010_DCR_FIFO_RST
symbol gets used only if CONFIG_FTSDC010_SDIO is
defined.

Compile tested only.

Cc: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Reviewed-by: Kuo-Jung Su <dantesu@faraday-tech.com>
11 years agonds32: introduce macros for bit manipulation
Gabor Juhos [Sun, 26 May 2013 10:11:26 +0000 (12:11 +0200)]
nds32: introduce macros for bit manipulation

U-Boot does not compile for the adp-ag101 boards since
commit f6c3b34697bf8bf05cb4e81c2fd3cadb9a98daea (mmc:
update Faraday FTSDC010 for rw performance)

The driver assumes that the bit manipulation macros
are provided by all architectures. This is not the
case for nds32 and it causes a build error like this:

  ftsdc010_mci.c: In function 'ftsdc010_clkset':
  ftsdc010_mci.c:118: warning: implicit declaration of function 'setbits_le32'
  ftsdc010_mci.c:123: warning: implicit declaration of function 'clrbits_le32'
  drivers/mmc/libmmc.o: In function `ftsdc010_request':
  /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:234: undefined reference to `setbits_le32'
  /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:243: undefined reference to `clrbits_le32'
  /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:234: undefined reference to `clrbits_le32'
  drivers/mmc/libmmc.o: In function `ftsdc010_clkset':
  /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:118: undefined reference to `clrbits_le32'
  /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:118: undefined reference to `clrbits_le32'
  /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:121: undefined reference to `setbits_le32'
  /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:123: undefined reference to `setbits_le32'
  /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:123: undefined reference to `setbits_le32'

The patch adds bit manipulation macros for the
nds32 architecture to avoid the errors. The macros
are copied from the ARM implementation.

Compile tested only.

Cc: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
11 years agoPrepare v2013.07 v2013.07
Tom Rini [Mon, 22 Jul 2013 19:57:32 +0000 (15:57 -0400)]
Prepare v2013.07

Signed-off-by: Tom Rini <trini@ti.com>
11 years agofdtdec: Add compatible string for High speed i2c
naveen krishna chatradhi [Mon, 29 Apr 2013 22:58:52 +0000 (15:58 -0700)]
fdtdec: Add compatible string for High speed i2c

Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller
available on exynos5 SoCs from Samsung.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
11 years agoi2c: add Faraday FTI2C010 I2C controller support
Kuo-Jung Su [Wed, 8 May 2013 07:36:26 +0000 (15:36 +0800)]
i2c: add Faraday FTI2C010 I2C controller support

Faraday FTI2C010 is a multi-function I2C controller
which supports both master and slave mode.
This patch simplily implements the master mode only.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Heiko Schocher <hs@denx.de>
11 years agoI2C: mxc_i2c: Add support for Vybrid VF610 platform
Alison Wang [Mon, 17 Jun 2013 07:30:39 +0000 (15:30 +0800)]
I2C: mxc_i2c: Add support for Vybrid VF610 platform

This patch adds support for Vybrid VF610 platform.

There are some differences between i.MX6 and Vybrid for I2C controller.
(1) The registers' offset are different.
(2) The I2C clock divider values are different.
(3) In I2C control register, the enable/disable/reset bit is inverted for Vybrid comparing to i.MX6.
(4) In I2C status register, the interrupt flag bit is cleared by writing "1" for Vybrid.
For i.MX6, this bit is cleared by writing "0".
(5) In I2C status register, the arbitration lost flag bit is cleared by writing "1" for Vybrid.
For i.MX6, this bit is cleared by writing "0".

Signed-off-by: Alison Wang <b18965@freescale.com>
11 years agovf610: Add I2C support for Vybrid VF610 platform
Alison Wang [Mon, 17 Jun 2013 07:30:38 +0000 (15:30 +0800)]
vf610: Add I2C support for Vybrid VF610 platform

This patch adds I2C support for Vybrid VF610 platform and adds
I2C0 support to VF610TWR board.

Signed-off-by: Alison Wang <b18965@freescale.com>
11 years agocmd_i2c: Use ARRAY_SIZE instead of reinventing it
Axel Lin [Sat, 22 Jun 2013 13:56:35 +0000 (21:56 +0800)]
cmd_i2c: Use ARRAY_SIZE instead of reinventing it

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agoarm/km: fix u-boot update functionality
Holger Brunck [Mon, 6 May 2013 02:54:38 +0000 (02:54 +0000)]
arm/km: fix u-boot update functionality

Due to the new I2C framework we need to adapt the u-boot update
function. Due to the new framework all i2c leafs behind a mux are
present in the system and not only those who are defined and used. So it
is bus number 5 after the rework.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>

11 years agoi2c, ppc4xx_i2c: switch to new multibus/multiadapter support
Dirk Eibach [Thu, 25 Apr 2013 02:40:01 +0000 (02:40 +0000)]
i2c, ppc4xx_i2c: switch to new multibus/multiadapter support

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
11 years agotegra: i2c: Enable new CONFIG_SYS_I2C framework
Simon Glass [Tue, 30 Oct 2012 07:28:53 +0000 (07:28 +0000)]
tegra: i2c: Enable new CONFIG_SYS_I2C framework

This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra
i2c driver to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heiko Schocher <hs@denx.de>
11 years agotegra: i2c: Add function to know about current bus
Simon Glass [Tue, 30 Oct 2012 07:28:52 +0000 (07:28 +0000)]
tegra: i2c: Add function to know about current bus

Rather than using a variable in various places, add a single function,
tegra_i2c_get_bus(), which returns a pointer to information about a
bus.

This will make it easier to move to the new i2c framework.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoi2c, multibus, keymile: get rid of EEprom_ivm envvariable
Heiko Schocher [Thu, 25 Oct 2012 09:07:00 +0000 (11:07 +0200)]
i2c, multibus, keymile: get rid of EEprom_ivm envvariable

as the keymile boards use now the new i2c multibus/multiadapter
framework, remove the EEprom_ivm Environmentvar, as not longer
needed.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-By: Holger Brunck <holger.brunck@keymile.com>
11 years agoi2c, multibus: get rid of CONFIG_I2C_MUX
Heiko Schocher [Thu, 25 Oct 2012 08:32:14 +0000 (10:32 +0200)]
i2c, multibus: get rid of CONFIG_I2C_MUX

CONFIG_I2C_MUX is replaced through the new i2c multibus/multiadapter
framework, configured through CONFIG_SYS_I2C. As CONFIG_I2C_MUX
is only used on the keymile boards, and they are now completely
moved to the new framework, remove CONFIG_I2C_MUX.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-By: Holger Brunck <holger.brunck@keymile.com>
11 years agoi2c, fsl_i2c: switch to new multibus/multiadapter support
Heiko Schocher [Wed, 24 Oct 2012 11:48:22 +0000 (13:48 +0200)]
i2c, fsl_i2c: switch to new multibus/multiadapter support

- added to fsl_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
11 years agoi2c, soft-i2c: switch to new multibus/multiadapter support
Heiko Schocher [Tue, 29 Jan 2013 07:53:15 +0000 (08:53 +0100)]
i2c, soft-i2c: switch to new multibus/multiadapter support

- added to soft_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
11 years agoi2c: common changes for multibus/multiadapter support
Heiko Schocher [Mon, 16 Jan 2012 21:12:24 +0000 (21:12 +0000)]
i2c: common changes for multibus/multiadapter support

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Cc: Henrik Nordström <henrik@henriknordstrom.net>
11 years agoi2c: add i2c_core and prepare for new multibus support
Heiko Schocher [Mon, 16 Jan 2012 21:12:23 +0000 (21:12 +0000)]
i2c: add i2c_core and prepare for new multibus support

This Patch introduce the new i2c_core file, which holds
the I2C core functions, for the rework of the multibus/
multiadapter support.
Also adds changes in i2c.h for the new I2C multibus/multiadapter
support. This new support can be activated with the
CONFIG_SYS_I2C define.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
11 years agofs/ext4: fix log2blksz un-initialized error, by cacaulating its value from blksz
Lan Yixun (dlan) [Sat, 20 Jul 2013 00:17:59 +0000 (08:17 +0800)]
fs/ext4: fix log2blksz un-initialized error, by cacaulating its value from blksz

The problem here is that uboot can't mount ext4 filesystem with
commit "50ce4c07df1" applied. We use hard-coded "SECTOR_SIZE"(512)
before this commit, now we introduce (block_dev_desc_t *)->log2blksz
to replace this macro. And after we calling do_ls()->fs_set_blk_dev(),
the variable log2blksz is not initialized, which it's not correct.

And this patch try to solve the problem by caculating the value of
log2blksz from variable blksz.

11 years agoext4fs: le32_to_cpu() used on a 16-bit field
Rommel Custodio [Sun, 21 Jul 2013 08:53:25 +0000 (10:53 +0200)]
ext4fs: le32_to_cpu() used on a 16-bit field

Fix reading ext4_extent_header struture on BE machines.  Some 16 bit
fields where converted to 32 bit fields, due to the byte swap on BE
machines the containing value was corrupted. Therefore reading ext4
filesystems on BE machines where broken before.

Signed-off-by: Rommel Custodio <sessyargc+uboot@gmail.com>
[sent via git-send-email; rework commit message]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
11 years agoarm: at91sam9n12: change EBI IO to high drive mode
Bo Shen [Wed, 17 Jul 2013 09:14:17 +0000 (17:14 +0800)]
arm: at91sam9n12: change EBI IO to high drive mode

As both the DDR SDRAM and NAND flash connect to EBI on at91sam9n12
and share the lower 8 bits data line. If use low drive of the data
line, it will cause DDR data access corrupt in lower address, so
change the data line to high drive mode

This will fix the Linux kernel boot issue when use Lower address

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
11 years agoddr cfg: DRAM_RESET needs 0x00020030
Troy Kisky [Wed, 17 Jul 2013 19:46:15 +0000 (12:46 -0700)]
ddr cfg: DRAM_RESET needs 0x00020030

The old value of 0x000e0030 will cause ethernet
timeout issues on the sabrelite and possibly other
boards using the KSZ9021.
I have no explanation as to why.

But this is a correct change, the TRM will be updated
to show that 00b is the only valid setting for bits
19-18 of DRAM_RESET.

My thanks go to Liu Hui(Jason) for this information.

Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
11 years agonet: phy: Set SUPPORTED_1000baseX_Half flag in ESTATUS_1000_XHALF case
Fabio Estevam [Fri, 19 Jul 2013 13:01:34 +0000 (10:01 -0300)]
net: phy: Set SUPPORTED_1000baseX_Half flag in ESTATUS_1000_XHALF case

Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the
checking for ESTATUS_1000_XHALF, but it incorrectly sets the
SUPPORTED_1000baseX_Full flag in this case.

Set the SUPPORTED_1000baseX_Half flag instead.

Acked-by: Charles Coldwell <coldwell@gmail.com>
Reviewed-By: Sascha Silbe <t-uboot@infra-silbe.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
11 years agophy: fix 10/100Mbps operation on 1Gbps-capable links
Sascha Silbe [Fri, 19 Jul 2013 10:25:10 +0000 (12:25 +0200)]
phy: fix 10/100Mbps operation on 1Gbps-capable links

de1d786 [add support for Xilinx 1000BASE-X phy (GTX)] introduced a
check for the extended status register in order to support
1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since
Extended Status only indicates what the PHY (i.e. the local side) is
capable of, this broke communication with non-1Gbps peers.

Only check the extended status if the 1000BASE-T registers are
actually missing so we don't end up setting speed to 1Gbps even though
the previous test (for the combination of local and peer support for
1Gbps) already indicated we can't do 1Gbps with the current peer.

Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
11 years agomkimage: Use board config to get CONFIG_FIT_SIGNATURE value
Simon Glass [Wed, 17 Jul 2013 22:10:59 +0000 (15:10 -0700)]
mkimage: Use board config to get CONFIG_FIT_SIGNATURE value

The value of this config variable is not available to image.h on the host,
since the board config is not actually included. Bring this in so that
mkimage will be built with image-signing support for sandbox at least.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoarm:trats:fix: Correction of loaddtb environment variable.
Łukasz Majewski [Thu, 18 Jul 2013 11:14:22 +0000 (13:14 +0200)]
arm:trats:fix: Correction of loaddtb environment variable.

Missing space for loaddtb command has been added. When missing, ext4load
fails with wrong number of passed parameters.

Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>