David Brownell [Fri, 15 May 2009 21:47:13 +0000 (23:47 +0200)]
davinci dm6446evm NAND update
This updates the optional (non-default!) NAND support for the
DaVinci DM6446 EVM:
- include MTD partitioning, defaulting to what Linux uses
- use a flash-based BBT, which among other things speeds bootup
This matches code that's now queued for mainline Linux, and might
even merge in an upcoming 2.6.30-rc; and the MTIDS are set up so
that the U-Boot $mtdparts environment variable can be passed as-is
on the kernel command line as a cmdlinepart override.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Fri, 15 May 2009 21:47:12 +0000 (23:47 +0200)]
davinci: display correct clock info
Move the clock-rate dumping code into the cpu/.../davinci area
where it should have been, enabled by CONFIG_DISPLAY_CPUINFO,
updating the format and showing the DSP clock (where relevant).
Switch boards to use the cpuinfo() hook for this stuff.
Remove a few now-obsolete PLL #defines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Tom Rix [Fri, 15 May 2009 21:47:12 +0000 (23:47 +0200)]
LED Add documentation describing the status_led and colour led API.
This document describes the u-boot status LED API.
This allows common u-boot commands to use a board's leds to
provide status for activities like booting and downloading files.
David Brownell [Fri, 15 May 2009 21:44:09 +0000 (23:44 +0200)]
davinci: add basic dm355/dm350/dm335 support
Add some basic declarations for DaVinci DM355/DM350/DM335 support,
keyed on CONFIG_SOC_DM355. (DM35X isn't quite right because the
DM357 is very different; while the DM355 is like a DM355 without
the MPEG/JPEG coprocessor).
These have different peripherals than the DM6446, and some of
the peripherals are at different addresses. Notably for U-Boot,
there's no EMAC, and the NAND controller address is different
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Fri, 15 May 2009 21:44:09 +0000 (23:44 +0200)]
davinci: fix dm644x buglets
Fix two buglets in the dm644x support: don't set two must-be-zero
bits in the UART management register; and only include the I2C hooks
if the I2C driver is being included.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Fri, 15 May 2009 21:44:08 +0000 (23:44 +0200)]
davinci: cpu-specific build uses conditional make syntax
Update cpu/arm926ejs/davinci/Makefile to use COBJ-y type syntax.
Add the first conditional: for EMAC driver support. Not all
chips have an EMAC; and boards might not use it, anyway.
This doesn't touch PHY configuration; that should eventually
become conditional too.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Fri, 15 May 2009 21:44:06 +0000 (23:44 +0200)]
davinci: move psc support board-->cpu
Move DaVinci PSC support from board/* to cpu/* where it belongs.
The PSC module manages clocks and resets for all DaVinci-family
SoCs, and isn't at all board-specific.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Tue, 14 Apr 2009 15:52:58 +0000 (08:52 -0700)]
DaVinci now respects SKIP_LOWLEVEL_INIT
Don't needlessly include lowlevel init code; that's only really
needed with boot-from NOR (not boot-from-NAND). The 2nd stage
loader (UBL) handles that before it loads U-Boot.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Mon, 13 Apr 2009 05:49:26 +0000 (22:49 -0700)]
DaVinci Ethernet cleanup
Chips without the EMAC controller won't need the utilities
it uses to read an Ethernet address from EEPROM; so don't
include them needlessly.
Use is_valid_ether() to validate the address from EEPROM.
All-zero addresses aren't the only invalid addresses.
A fully erased EEPROM returns all-ones, also invalid...
Switch those Ethernet utilities to use "%pM" for printing
MAC addresses; and not say ROM when they mean EEPROM.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Ben Warren <biggerbadderben@gmail.com>
Stefan Roese [Mon, 11 May 2009 13:50:12 +0000 (15:50 +0200)]
lib_arch/board.c: Move malloc initialization before flash_init()
This patch moves the malloc initialization before calling flash_init().
Upcoming changes to the NOR FLASH common CFI driver with optional
MTD infrastructure and MTD concatenation support will call malloc().
And nothing really speaks against enabling malloc just a little earlier
in the boot stage. Some architectures already enable malloc before
calling flash_init() so they don't need any changes here.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Scott McNutt <smcnutt@psyent.com> Cc: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: John Rigby <jcrigby@gmail.com>
Stefan Roese [Mon, 11 May 2009 11:46:14 +0000 (13:46 +0200)]
ppc4xx: Add Sequoia RAM-booting target
This patch adds another build target for the AMCC Sequoia PPC440EPx
eval board. This RAM-booting version is targeted for boards without
NOR FLASH (NAND booting) which need a possibility to initially
program their NAND FLASH. Using a JTAG debugger (e.g. BDI2000/3000)
configured to setup the SDRAM, this debugger can load this RAM-
booting image to the target address in SDRAM (in this case 0x1000000)
and start it there. Then U-Boot's standard NAND commands can be
used to program the NAND FLASH (e.g. "nand write ...").
Here the commands to load and start this image from the BDI2000:
440EPX>reset halt
440EPX>load 0x1000000 /tftpboot/sequoia/u-boot.bin
440EPX>go 0x1000000
Please note that this image automatically scans for an already
initialized SDRAM TLB (detected by EPN=0). This TLB will not be
cleared. This TLB doesn't need to be TLB #0, this RAM-booting
version will detect it and preserve it. So booting via BDI2000
will work and booting with a complete different TLB init via
U-Boot works as well.
4xx: Remove binary cpld bitstream from DP405 board
This patch removes the cpld binary bitstream that is
used by esd's cpld command on DP405 boards.
Because u-boot with an external cpld bitstream may not
take more space in flash than before the u-boot binary is
shrinked a little bit. Some unused featues have been
removed therefore.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
4xx: Remove binary cpld bitstream from CMS700 board
This patch removes the cpld binary bitstream that is
used by esd's cpld command on CMS700 boards.
Because u-boot with an external cpld bitstream may not
take more space in flash than before the u-boot binary is
shrinked a little bit. Some unused featues have been
removed therefore.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
Peter Tyser [Sun, 19 Apr 2009 03:34:06 +0000 (22:34 -0500)]
cmd_i2c: Fix i2c help command output when CONFIG_I2C_MUX
When CONFIG_I2C_MUX was defined the output of 'help i2c' was not
correct, eg:
=> help i2c
i2c bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes.
speed [speed] - show or set I2C bus speed
i2c dev [dev] - show or set current I2C bus
...
It has been changed to:
i2c speed [speed] - show or set I2C bus speed
i2c bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes
i2c dev [dev] - show or set current I2C bus
...
Peter Tyser [Sun, 19 Apr 2009 03:34:03 +0000 (22:34 -0500)]
i2c: Update references to individual i2c commands
The individual i2c commands imd, imm, inm, imw, icrc32, iprobe, iloop,
and isdram are no longer available so all references to them have been
updated to the new form of "i2c <cmd>".
Peter Tyser [Sun, 19 Apr 2009 03:34:01 +0000 (22:34 -0500)]
i2c: Create common default i2c_[set|get]_bus_speed() functions
New default, weak i2c_get_bus_speed() and i2c_set_bus_speed() functions
replace a number of architecture-specific implementations.
Also, providing default functions will allow all boards to enable
CONFIG_I2C_CMD_TREE. This was previously not possible since the
tree-form of the i2c command provides the ability to display and modify
the i2c bus speed which requires i2c_[set|get]_bus_speed() to be
present.
Peter Tyser [Sun, 19 Apr 2009 03:34:00 +0000 (22:34 -0500)]
cm5200: Make function test command names more unique
Add "_test" to cm5200's function test command names to prevent
overlap with common, global function names. Originally, the
"do_i2c" function test command interfered with
common/cmd_i2c.c's "do_i2c" when CONFIG_I2C_CMD_TREE was defined.
The functions were also made static as they are not globally accessed.
Peter Tyser [Fri, 24 Apr 2009 20:34:08 +0000 (15:34 -0500)]
mpc7448hpc2: Add CONFIG_SYS_I2C_SPEED define
Add standard CONFIG_SYS_I2C_SPEED define for the mpc7448hpc2 so that
it can use the common 'i2c speed' command. Note that the I2C controller
utilized by the mpc7448hpc2 has a fixed speed and cannot be changed
dynamically.
Peter Tyser [Fri, 24 Apr 2009 20:34:07 +0000 (15:34 -0500)]
Marvell: i2c cleanup
The following changes were made, primarily to bring the Marvell i2c
driver in line with U-Boot's current I2C API:
- Made i2c_init() globally accessible
- Made i2c_read() and i2c_write() return an integer
- Updated i2c_init() calls to pass in CONFIG_SYS_I2C_SLAVE in the
offhand chance someone adds slave support in the future
Peter Tyser [Fri, 24 Apr 2009 20:34:06 +0000 (15:34 -0500)]
cpci750: i2c cleanup
The following changes were made, primarily to bring the cpci750 i2c
driver in line with U-Boot's current I2C API:
- Made i2c_init() globally accessible
- Made i2c_read() and i2c_write() return an integer
- Updated i2c_init() calls to pass in CONFIG_SYS_I2C_SLAVE in the
offhand chance someone adds slave support in the future
Kumar Gala [Fri, 12 Jun 2009 04:42:35 +0000 (23:42 -0500)]
fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
The ddr code computes most things as 64-bit quantities and had some places
in the middle that it was using phy_addr_t and phys_size_t.
Instead we use unsigned long long through out and only at the last stage of
setting the LAWs and reporting the amount of memory to the board code do we
truncate down to what we can cover via phys_size_t.
This has the added benefit that the DDR controller itself is always setup
the same way regardless of how much memory we have. Its only the LAW
setup that limits what is visible to the system.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Haiying Wang [Wed, 20 May 2009 16:30:32 +0000 (12:30 -0400)]
85xx: Add PIB support at CS4/CS5 for MPC8569MDS
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Yu Liu <Yu.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Haiying Wang [Thu, 4 Jun 2009 20:12:39 +0000 (16:12 -0400)]
85xx: Fix some settings for MPC8569MDS board
- Increase the size of malloc to 512KB because MPC8569MDS needs more memory for
malloc to support up to eight Ethernet interfaces.
- Move Environment address out of uboot thus the saved environment variables
will not be erased after u-boot is re-programmed.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Wolfgang Denk [Thu, 14 May 2009 22:16:01 +0000 (00:16 +0200)]
TQM85xx: adapt for new flash types
Old TQM85xx boards had 'M' type Spansion Flashes from the S29GLxxxM
series while new boards have 'N' type Flashes from the S29GLxxxN
series, which have bigger sectors: 2 x 128 instead of 2 x 64 KB.
We now change the configuration to the new flash types for all
boards; this also works on old boards - we just waste two flash
sectors for the environment which could be smaller there.
Dave Liu [Fri, 15 May 2009 02:27:44 +0000 (10:27 +0800)]
85xx: Fix the wrong BCSR address of 8569MDS
The BCSR17[7] = 1 will unlock the write protect of FLASH.
The WP# pin only controls the write protect of top/bottom sector,
That is why we can save env, but we can't write the first sector
before the patch.
Fredrik Arnerup [Tue, 2 Jun 2009 21:27:10 +0000 (16:27 -0500)]
85xx: bugfix for reading maximum TLB size on mpc85xx
The MAXSIZE field in the TLB1CFG register is 4 bits, not 8 bits.
This made setup_ddr_tlbs() try to set up a TLB larger than the e500 maximum
(256 MB)
which made u-boot hang in board_init_f() when trying to create a new stack
in RAM.
I have an mpc8540 with one 1GB dimm.
Signed-off-by: Fredrik Arnerup <fredrik.arnerup@edgeware.tv> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org>
Dave Liu [Fri, 27 Mar 2009 06:32:43 +0000 (14:32 +0800)]
85xx: Fix the clock adjust of mpc8569mds board
Currently the clk_adj is 6 (3/4 cycle), The settings will cause
the DDR controller hang at the data init. Change the clk_adj
from 6 to 4 (1/2 cycle), make the memory system stable.
This patch corrects the missing PLLB initialization in usb_cpu_init()
for AT91SAM9261.
Because of the missing PLLB initialization, the USB support for all
AT91SAM9261 based boards will work only if the PLLB is configured by a
precedent bootloader.
Felix Radensky [Sun, 31 May 2009 17:44:15 +0000 (20:44 +0300)]
ppc4xx/net: Fix MDIO clock setup
This patch fixes MDIO clock setup in case when OPB frequency is 100MHz.
Current code assumes that the value of sysinfo.freqOPB is 100000000
when OPB frequency is 100MHz. In reality it is 100000001. As a result
MDIO clock is set to incorrect value, larger than 2.5MHz, thus violating
the standard. This in not a problem on boards equipped with Marvell PHYs
(e.g. Canyonlands), since those PHYs support MDIO clocks up to 8.3MHz,
but can be a problem for other PHYs (e.g. Realtek ones).
Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
eth_halt() function in the smc911x drivers used to call the
smc911x_reset() function. eth_halt() used to be called after
tftp transfers. This used to put the ethernet chip in reset
while the linux boots up resulting in the ethernet driver
not coming up. NFS boot used to fail as a result.
This patch calls smc911x_shutdown() instead of smc911x_reset().
Some comments received has also been fixed.
Signed-off-by: Manikandan Pillai <mani.pillai@ti.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Remy Bohmer [Sun, 3 May 2009 10:11:40 +0000 (12:11 +0200)]
Add config option for disabling DM9000-SROM support.
Some boards do not have SROM support for the DM9000 network adapter.
Instead of listing these board names in the driver code, make this
option configurable from the board config file.
It also removes a build warning for the at91sam9261ek board:
'dm9000x.c:545: warning: 'read_srom_word' defined but not used'
And it repaires the trizepsiv board build which was broken around the
same routines
Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Kim Phillips [Fri, 5 Jun 2009 19:11:33 +0000 (14:11 -0500)]
mpc83xx: don't set SICRH_TSOBI1 to RMII/RTBI operation
In GMII mode (which operates at 3.3V) both SICRH TSEC1/2 output buffer
impedance bits should be clear, i.e., SICRH[TSIOB1] = 0 and SICRH[TSIOB2] = 0.
SICRH[TSIOB1] was erroneously being set high.
U-Boot always operated this PHY interface in GMII mode. It is assumed this
was missed in the clean up by the original board porters, and copied along
to the TQM and sbc boards.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Ira Snyder <iws@ovro.caltech.edu> Reviewed-by: David Hawkins <dwh@ovro.caltech.edu> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> CC: Dave Liu <DaveLiu@freescale.com>
Wolfgang Denk [Thu, 14 May 2009 22:16:03 +0000 (00:16 +0200)]
Redundant Environment: protect full sector size
Several boards used different ways to specify the size of the
protected area when enabling flash write protection for the sectors
holding the environment variables: some used CONFIG_ENV_SIZE and
CONFIG_ENV_SIZE_REDUND, some used CONFIG_ENV_SECT_SIZE, and some even
a mix of both for the "normal" and the "redundant" areas.
Normally, this makes no difference at all. However, things are
different when you have to deal with boards that can come with
different types of flash chips, which may have different sector
sizes.
Here we may have to chose CONFIG_ENV_SECT_SIZE such that it fits the
biggest sector size, which may include several sectors on boards using
the smaller sector flash types. In such a case, using CONFIG_ENV_SIZE
or CONFIG_ENV_SIZE_REDUND to enable the protection may lead to the
case that only the first of these sectors get protected, while the
following ones aren't.
This is no real problem, but it can be confusing for the user -
especially on boards that use CONFIG_ENV_SECT_SIZE to protect the
"normal" areas, while using CONFIG_ENV_SIZE_REDUND for the
"redundant" area.
To avoid such inconsistencies, I changed all sucn boards that I found
to consistently use CONFIG_ENV_SECT_SIZE for protection. This should
not cause any functional changes to the code.
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Paul Ruhland Cc: Pantelis Antoniou <panto@intracom.gr> Cc: Stefan Roese <sr@denx.de> Cc: Gary Jennejohn <garyj@denx.de> Cc: Dave Ellis <DGE@sixnetio.com> Acked-by: Stefan Roese <sr@denx.de>
Yauhen Kharuzhy [Thu, 7 May 2009 10:08:53 +0000 (13:08 +0300)]
mmc: Remove return from mmc_init for non SD 2.0 compatible cards.
Cards which are not compatible with SD 2.0 standard, may return response
for CMD8 command, but it will be invalid in terms of SD 2.0. We should
accept this case as admissible, just like Linux does.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Rabin Vincent [Sun, 5 Apr 2009 08:00:55 +0000 (13:30 +0530)]
mmc: fix response decoding on little endian
The mmc code defines the response as an array of chars. However, it
access the response bytes both as (i) an array of four uints (with
casts) and (ii) as individual chars. The former case is used more
often, including by the driver when it assigns the response.
The char-wise accesses are broken on little endian systems because they
assume that the bytes in the uints are in big endian byte order.
This patch fixes this by changing the response to be an array of four
uints and replacing the char-wise accesses with equivalent uint-wise
accesses.
Stefan Roese [Sat, 16 May 2009 10:04:22 +0000 (12:04 +0200)]
jffs2/mtdparts: Fix problem with usage from JFFS2 and MTDPARTS together
Currently using JFFS2 with MTDPARTS enabled doesn't work. This is because
mtdparts_init() is available in both files, cmd_mtdparts.c and
cmd_jffs2.c. Please note that in the original cmd_jffs2.c file (before
the jffs2/mtdparts command/file split those 2 different versions
already existed. So this is nothing new. The main problem is that the
variables "current_dev" and "current_partnum" are declared in both
files now. This doesn't work.
This patch now changes the names of those variable to more specific
names: "current_mtd_dev" and "current_mtd_partnum". This is because
this patch also changes the declaration from static to global, so
that they can be used from both files.
Please note that my first tests were not successful. The MTD devices
selected via mtdparts are now accessed but I'm failing to see the
directory listed via the "ls" command. Nothing is displayed. Perhaps
I didn't generate the JFFS2 image correctly (I never used JFFS2 in
U-Boot before). Not sure. Perhaps somebody else could take a look at
this as well. I'll continue looking into this on Monday.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Renaud barbier <renaud.barbier@ge.com>
Stefan Roese [Wed, 20 May 2009 08:58:03 +0000 (10:58 +0200)]
nand: Fix problem with ECC ordering for PPC4xx NDFC platforms
This patch enables Smart Media (SMC) ECC byte ordering which is used
on the PPC4xx NAND FLASH controller (NDFC). Without this patch we have
incompatible ECC byte ordering to the Linux kernel NDFC driver.
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
Stefan Roese [Wed, 20 May 2009 08:58:02 +0000 (10:58 +0200)]
ppc4xx: Fix problem with ECC ordering for PPC4xx NDFC platforms
This patch now uses the correct ECC byte order (Smart Media - SMC)
to be used on the 4xx NAND FLASH driver. Without this patch we have
incompatible ECC byte ordering to the Linux kernel NDFC driver.
Please note that we also have to enable CONFIG_MTD_NAND_ECC_SMC in
drivers/mtd/nand/nand_ecc.c for correct operation. This is done with
a seperate patch.
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
Stefan Roese [Wed, 20 May 2009 08:58:01 +0000 (10:58 +0200)]
ppc4xx: Move definition for PPC4xx NAND FLASH controller to header
This patch moves the definition for the PPC4xx NAND FLASH controller
(NDFC) CONFIG_NAND_NDFC into include/ppc4xx.h. This is needed for the
upcoming fix for the ECC byte ordering of the NDFC driver.
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
Graf Yang [Tue, 19 May 2009 08:40:08 +0000 (04:40 -0400)]
Blackfin: fix timer_init()/timer_reset()
The timer_init() function was not using the right csync instruction, nor
was it doing it right after disabling the core timer.
The timer_reset() function would reset the timestamp, but not the actual
timer, so there was a common edge case where get_timer() return a jump of
one timestamp (couple milliseconds) right after resetting. This caused
many functions to improperly timeout right away.
Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
projects / u-boot / log