Luca Ellero [Mon, 14 Feb 2011 21:46:53 +0000 (21:46 +0000)]
arm_adi_v5: add/move apsel member in struct adiv5_dap
This patch tries to make some order in "apsel" mess.
"dap apsel" command was quite useless (and broken) by itself.
With this patch we can use it to select between AHB or APB memory access
(previous patch 05ab8bdb813acdcd74afa71d6656c2df816cb230 was somehow broken).
- moves member apsel (in struct adiv5_dap) to ap_current
- adds apsel member
this strange choice is made trying to keep coherence in "dap apsel" command
and to keep compatibility with other code (for example cortex_a8).
Mathias K [Thu, 17 Feb 2011 08:11:25 +0000 (09:11 +0100)]
dsp563xx: minor fixes, code cleanup
This patch move the dsp563xx_target_create function to the
related code block. Also the target examine function was added
and the register cache is initialized in a separate function. The
missing functionality to invalidate the x memory context on memory
writes was also added.
Mathias K [Thu, 17 Feb 2011 08:05:42 +0000 (09:05 +0100)]
dsp563xx_once: Correct wrong return value on jtag communication errors
This patch change the return value on a jtag communication error
to TARGET_UNKNOWN because this function should return the current
target status and not a error code from the underlying api call.
Also the validity of the jtag_status is extended to all static
bits in this value.
Bjarne Steinsbo [Tue, 15 Feb 2011 19:23:40 +0000 (20:23 +0100)]
lpc32xx: Flash driver
Based on the lpc3180 driver, but released as a separate driver for two reasons:
1) I don't have an lpc3180 to test it against, so it might unintentionally break compatibility.
2) It's using a different OOB layout than lpc3180.
Rewritten so that it no longer borrows code from the NXP CDL library. Instead borrowing code from the u-boot port to lpc32xx, written by Kevin Wells.
Tested on lpc3250 (Hitex LPC3250-Stick). OOB layout is compatible with LPCLinux.
Phil Fong [Tue, 15 Feb 2011 19:17:33 +0000 (20:17 +0100)]
dsp563xx_once: Correct definition of JTAG_INSTR_CLAMP
I've been working on Rodrigo on adding support to flash
Freescale dsp56800e devices and have been looking at the
dsp563xx code. I think the define for the JTAG CLAMP
instruction in dsp563xx_once.c is incorrect. It should
be 0x05 according the Freescale AN2074 (and is also
0x05 in the dsp568xx according to AN1935). It won't
actually change anything in OpenOCD since this define
is not used anywhere (as far as I can tell).
Luca Ellero [Sat, 12 Feb 2011 11:54:42 +0000 (11:54 +0000)]
cortex_a9: move dap_ap_select to arm_avi_v5
dap_ap_select was used in the code at various points, but that can lead to
confusion, without any knowledge of what AP is really selected at some
points.
Some bugs derive from this (for example md/mw doesn't work well after
issueing "dap apsel" command).
Moving it to arm_adi_v5.c (using mem_ap_sel* functions instead of mem_ap_*)
make the code more clear and more easier to maintain.
In the future it should be made "static" to avoid its use outside arm_adi_v5
One further benefit is the various goto has been removed as well
Luca Ellero [Wed, 9 Feb 2011 20:36:14 +0000 (20:36 +0000)]
cortex_a9: implement read/write memory through APB-AP
This patch adds read/write capability to memory addresses not
accessible through AHB-AP (for example "boot ROM code").
To select AHB or APB, a "dap apsel" command must be issued:
dap apsel 0 -> following memory accesses are through AHB
dap apsel 1 -> following memory accesses are through APB
NOTE: at the moment APB memory accesses are very slow, compared
to AHB accesses. Work has to be done to get it faster (for
example LDR/STR instead od LDRB/STRB)
Mathias K [Tue, 1 Feb 2011 12:00:59 +0000 (13:00 +0100)]
more changes to dsp563xx code
Hello,
this patch adds the missing cpu registers and the correct read/write register functions and fixed
most of the halt/step/resume issues. The complete missing error propagation was added.
Aaron Carroll [Wed, 2 Feb 2011 07:16:26 +0000 (18:16 +1100)]
omap4430: fix reset sequence
* Write to the PRM reset control register should have been 'phys';
* Setup empty reset-assert handlers for the M3's, since the board-level reset
takes care of them;
* Remove the dbginit cruft, because it gets called implicitly on reset.
Aaron Carroll [Mon, 24 Jan 2011 07:06:44 +0000 (18:06 +1100)]
Add '-coreid' target option to support multiple cores per TAP.
ARM Cortex-A9 multi-core chips expose a single TAP/DAP which connects
to both cores. The '-coreid' option selects which core the target
should connect to.
Note that at present, OpenOCD can connect to either core, but not both
simulatenously, until ADI contexts can be shared.
fix segfault from stack corruption in ahbap_debugport_init
ahbap_debugport_init was queueing reads to a local stack variable but
didn't execute the queue before returning. Since the result of the reads
are not used anyway, it's better to pass NULL as the destination instead of
a dummy variable. I changed this throughout the function, even for the
reads that were actually executed.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Eric Wetzel [Tue, 18 Jan 2011 16:17:22 +0000 (11:17 -0500)]
stellaris: automatically generate and update device IDs
Added a Perl script to contrib that uses the header files in StellarisWare complete Firmware Development Package provided by TI/Luminary to generate a new list of device IDs
Used Perl script and revision 6734 of TI/Luminary StellarisWare to update device IDs
Erik Botö [Mon, 10 Jan 2011 18:13:52 +0000 (19:13 +0100)]
Flash driver for em357
Hi,
I took the stm32x NOR flash driver and adapted it for the Ember EM357
chip. This chip is very similar to em351 and stm32w so the driver
should be easily extended to support those as well if anyone can get
their hands on some of those for testing.
Santeri Salko [Thu, 13 Jan 2011 13:21:06 +0000 (15:21 +0200)]
str9xpec: Find flash controller from the chain.
Find the flash controller by position since it is before the core,
not after it.
This fixes the problem that str9xpec enable_turbo (or any other
str9xpec command) did not work. (See my post in
http://forum.sparkfun.com/viewtopic.php?f=18&t=25542)
Freddie Chopin [Sat, 8 Jan 2011 11:29:31 +0000 (12:29 +0100)]
Add another level of procedures to LPC2xxx initialization - procedures for specific targets (setup_lpc<number>) take core clock and adapter clock as parameters. This way "constant" parameters (flash size and type, CPUTAPID, etc.) do not need to be copied if one wishes to change the "variable" parameters - like the core clock or adapter clock - in a board config file or somewhere else.
Spencer Oliver [Tue, 4 Jan 2011 12:29:49 +0000 (12:29 +0000)]
mips32: add fastdata loader working area
Add a working area that is preserved between calls to
mips_m4k_bulk_write_memory - this gives us a speed increase
of approx 3kb/sec during flash writes to the pic32mx.
This area is released during a resume/reset.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
cfi_protect is not implemented on Spansion flashes (many do not even have protection bits). Demote from error to warning, so that common board code can use "flash write_image erase unlock" regardless of the flash type.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
non-CFI flash code uses data from CFI structures. Make sure that timeouts are filled in on non-CFI flashes, and print CFI information in all cases, nut just on CFI flashes.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
Jon Povey [Sun, 2 Jan 2011 14:52:48 +0000 (23:52 +0900)]
svf: implement sleep for RUNTEST min_time
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
min_time was effectively ignored, I needed it to program a Lattice MachXO
which uses a RUNTEST to wait for an erase operation, amongst other things.
With this patch pauses happen and I can program the device with an SVF
generated in LSC ispVM (with "Rev D Standard" checked to suppress
nonstandard LOOP statements)
Antonio Borneo [Fri, 31 Dec 2010 11:18:09 +0000 (19:18 +0800)]
NAND/CORE: Replace decimal dot in messages
Table of NAND devices reports operating voltage.
Replace comma with proper decimal dot.
Øyvind: "." is correct for UK/US, but incorrect for
many other languages. OpenOCD is not localized at this
point, so sticking to "." for US/UK should be OK.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Antonio Borneo [Fri, 31 Dec 2010 11:18:08 +0000 (19:18 +0800)]
flash/nand: review NAND driver interface
From struct nand_flash_controller :
- remove unused field register_commands;
- remove field controller_ready, exported but
never referenced.
Remove dead code pointed by controller_ready.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Andrew MacIsaac [Wed, 29 Dec 2010 20:15:48 +0000 (12:15 -0800)]
Compilation Warnings on OS X 10.5
I received a number of "-Wshadow" related warnings (treated as errors) while
trying to build on OS X Leopard. In addition, there were two miscellaneous
other warnings in the flash drivers. Attached are two patches which correct
these issues and the commit messages to accompany them.
My system has the following configuration (taken from uname -a):
Darwin 9.8.0 Darwin Kernel Version 9.8.0: Wed Jul 15 16:55:01 PDT 2009;
root:xnu-1228.15.4~1/RELEASE_I386 i386
=== Werror_patch.txt Commit Message ===
compilation: fixes for -Wshadow warnings on OS X
These changes fix -Wshadow compilation warnings on OS X 10.5.8
=== flash_patch.txt Commit Message ===
compilation: fixes for flash driver warnings on OS X
These changes fix two compilation warnings on OS X 10.5.8:
../../../../src/flash/nor/at91sam3.c:2767: warning: redundant redeclaration
of 'at91sam3_flash'
../../../../src/flash/nor/at91sam3.c:101: warning: previous declaration of
'at91sam3_flash' was here
and
../../../../src/flash/nor/stmsmi.c:205: warning: format not a string literal
and no format arguments
David Brownell [Sat, 25 Dec 2010 02:50:41 +0000 (18:50 -0800)]
initial SWD transport (SWD infrastructure #2)
This piggy backs on JTAG so it's not yet pretty, but that
seems unavoidable so far given today's OpenOCD internals.
SWD init and data transfer are unfinished and untested, but
that should cause no regressions, and will be addressed by
the time drivers start using this infrastructure. Checking
in whould get the code working better sooner, and turn up any
structural/architectural issues while they're easier to fix.
The debug adapter drivers will provide simple SWD driver
structs with methods that kick in as needed (instead of JTAG).
So far just one adapter driver has been updated (not yet
ready to use or circulate).
The biggest issues are probably
- fault handling, where the ARM Debug Interface V5 pipelining
needs work in both JTAG and SWD modes and
- missing rewrite of block I/O code to work on both of our
Cortex-ready transports (Current code is hard-wired to JTAG);
relates also to the pipelining issue.
- omitted support to activate/deactivate SWO/SWV trace (this is
technically trivial, but configuring what to trace is NOT.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
----
Spencer Oliver [Thu, 23 Dec 2010 12:39:22 +0000 (12:39 +0000)]
flash: print flash bank name on flash info cmd
The flash bank name is a required element in adding flash banks,
however other than looking at the config file there is no way of
getting the name used in openocd.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
projects / openocd / log