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u-boot
6 years agoARC: Cache: Add more HW configuration checks
Eugeniy Paltsev [Wed, 21 Mar 2018 12:59:03 +0000 (15:59 +0300)]
ARC: Cache: Add more HW configuration checks

Add additional cache configuration checks and note about
supported configurations.

It is unlikely to face some configuration in real life but
it's better to be prepared and refuse to work on those.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Implement a function to sync and cleanup caches
Eugeniy Paltsev [Wed, 21 Mar 2018 12:59:02 +0000 (15:59 +0300)]
ARC: Implement a function to sync and cleanup caches

Implement specialized function to clenup caches (and therefore
sync instruction and data caches) which can be used for cleanup before linux
launch or to sync caches during U-Boot self-relocation.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Cache: Fix SLC operations when SLC is bypassed for data
Eugeniy Paltsev [Wed, 21 Mar 2018 12:59:01 +0000 (15:59 +0300)]
ARC: Cache: Fix SLC operations when SLC is bypassed for data

If L1 D$ is disabled SLC is bypassed for data and all
load/store requests are sent directly to main memory.

If L1 I$ is disabled SLC is NOT bypassed for instructions
and all instruction requests are fetched through SLC.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Cache: Implement [i,d]cache_enabled() as separate functions
Eugeniy Paltsev [Wed, 21 Mar 2018 12:59:00 +0000 (15:59 +0300)]
ARC: Cache: Implement [i,d]cache_enabled() as separate functions

Implement icache_enabled() and dcache_enabled() as separate functions
which can be used with "inline" attribute. This is a preparation to
make them always_inline.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Move IOC enabling to compile-time options
Eugeniy Paltsev [Wed, 21 Mar 2018 12:58:59 +0000 (15:58 +0300)]
ARC: Move IOC enabling to compile-time options

Use CONFIG_ARC_DBG_IOC_ENABLE Kconfig option instead of
ioc_enable global variable.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Cache: Move PAE exists check into slc_upper_region_init()
Eugeniy Paltsev [Wed, 21 Mar 2018 12:58:58 +0000 (15:58 +0300)]
ARC: Cache: Move PAE exists check into slc_upper_region_init()

Move check for PAE existence into slc_upper_region_init()
instead of its caller as more appropriate place.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Move cache global variables to arch_global_data
Eugeniy Paltsev [Wed, 21 Mar 2018 12:58:57 +0000 (15:58 +0300)]
ARC: Move cache global variables to arch_global_data

There is a problem with current implementation if we start U-Boot
from ROM, as we use global variables before ther initialization,
so these variables get overwritten when we copy .data section
from ROM.

Instead we move these global variables into our "global data"
structure so that we may really start from ROM.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Cache: Get rid of [slc,pae,icache,dcache]_exists global variables
Eugeniy Paltsev [Wed, 21 Mar 2018 12:58:56 +0000 (15:58 +0300)]
ARC: Cache: Get rid of [slc,pae,icache,dcache]_exists global variables

There is a problem with current implementation if we start U-Boot
from ROM, as we use global variables before ther initialization,
so these variables get overwritten when we copy .data section
from ROM.

Instead we'll use icache_exists(), dcache_exists(), slc_exists(), pae_exists()
functions which directly check BCRs every time.

In U-Boot case ops are used only during self-relocation and DMA
so we shouldn't be hit by noticeable performance degradation.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Cache: Move SLC status check into slc_entire_op() and slc_rgn_op()
Eugeniy Paltsev [Wed, 21 Mar 2018 12:58:55 +0000 (15:58 +0300)]
ARC: Cache: Move SLC status check into slc_entire_op() and slc_rgn_op()

As of today we check SLC status before each call of __slc_rgn_op()
or __slc_entire_op(). So move status check into __slc_rgn_op()
and __slc_entire_op().

As we need to check status before *each* function execution and we
call slc_entire_op() and slc_rgn_op() from different places we add
this check directly into SLC entire/line functions instead of
their callers to avoid code duplication.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Cache: Use is_isa_arcv2() instead of CONFIG_ISA_ARCV2 ifdef
Eugeniy Paltsev [Wed, 21 Mar 2018 12:58:54 +0000 (15:58 +0300)]
ARC: Cache: Use is_isa_arcv2() instead of CONFIG_ISA_ARCV2 ifdef

Use is_isa_arcv2() function where it is possible instead of
CONFIG_ISA_ARCV2 define check to make code cleaner at the same time
keeping pretty much the same functionality - code in branches
under "if (is_isa_arcv2())" won't be compiled if CONFIG_ISA_ARCV2
is not defined, still we need a couple of CONFIG_ISA_ARCV2
ifdefs to make compiler happy. That's because code in
!is_isa_x() branch gets compiled and only then gets optimized
away.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Cache: Allways check D$ status before entire/line ops
Eugeniy Paltsev [Wed, 21 Mar 2018 12:58:53 +0000 (15:58 +0300)]
ARC: Cache: Allways check D$ status before entire/line ops

As we are planning to get rid of dozens of ifdef's in cache.c we
would better check D$ status before each entire/line operation
then check CONFIG_SYS_DCACHE_OFF config option.

This makes the code cleaner as well as D$ entire/line functions
remain functional even if we enable or disable D$ in run-time.

As we need to check status before *each* function execution and we
call D$ entire/line functions from different places we add
this check directly into D$ entire/line functions instead of
their callers to avoid code duplication.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Move BCR encodings to separate header file
Eugeniy Paltsev [Wed, 21 Mar 2018 12:58:52 +0000 (15:58 +0300)]
ARC: Move BCR encodings to separate header file

We're starting to use more and more BCRs and having their
definitions in-lined in sources becomes a bit annoying
so we move it all to a separate header.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Cache: Move IOC initialization to a separate function
Eugeniy Paltsev [Wed, 21 Mar 2018 12:58:51 +0000 (15:58 +0300)]
ARC: Cache: Move IOC initialization to a separate function

Move IOC initialization from cache_init() to a separate function.

This is the preparation for the next patch where we'll switch
to is_isa_arcv2() function usage instead of "CONFIG_ISA_ARCV2"
ifdef.

Also it makes cache_init function a bit cleaner.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Flush & invalidate D$ with a single command
Eugeniy Paltsev [Wed, 21 Mar 2018 12:58:50 +0000 (15:58 +0300)]
ARC: Flush & invalidate D$ with a single command

We don't implement separate flush_dcache_all() intentionally as
entire data cache invalidation is dangerous operation even if we flush
data cache right before invalidation.

There is the real example:
We may get stuck in the following code if we store any context (like
BLINK register) on stack in invalidate_dcache_all() function.

BLINK register is the register where return address is automatically saved
when we do function call with instructions like 'bl'.

void flush_dcache_all() {
__dc_entire_op(OP_FLUSH);
// Other code //
}

void invalidate_dcache_all() {
__dc_entire_op(OP_INV);
// Other code //
}

void foo(void) {
flush_dcache_all();
invalidate_dcache_all();
}

Now let's see what really happens during that code execution:

foo()
  |->> call flush_dcache_all
   [return address is saved to BLINK register]
   [push BLINK] (save to stack)              ![point 1]
   |->> call __dc_entire_op(OP_FLUSH)
   [return address is saved to BLINK register]
   [flush L1 D$]
   return [jump to BLINK]
   <<------
   [other flush_dcache_all code]
   [pop BLINK] (get from stack)
   return [jump to BLINK]
  <<------
  |->> call invalidate_dcache_all
   [return address is saved to BLINK register]
   [push BLINK] (save to stack)               ![point 2]
   |->> call __dc_entire_op(OP_FLUSH)
   [return address is saved to BLINK register]
   [invalidate L1 D$]                 ![point 3]
   // Oops!!!
   // We lose return address from invalidate_dcache_all function:
   // we save it to stack and invalidate L1 D$ after that!
   return [jump to BLINK]
   <<------
   [other invalidate_dcache_all code]
   [pop BLINK] (get from stack)
   // we don't have this data in L1 dcache as we invalidated it in [point 3]
   // so we get it from next memory level (for example DDR memory)
   // but in the memory we have value which we save in [point 1], which
   // is return address from flush_dcache_all function (instead of
   // address from current invalidate_dcache_all function which we
   // saved in [point 2] !)
   return [jump to BLINK]
  <<------
  // As BLINK points to invalidate_dcache_all, we call it again and
  // loop forever.

Fortunately we may do flush and invalidation of D$ with a single one
instruction which automatically mitigates a situation described above.

And because invalidate_dcache_all() isn't used in common U-Boot code we
implement "flush and invalidate dcache all" instead.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Introduce is_isa_X() functions
Eugeniy Paltsev [Wed, 21 Mar 2018 12:58:49 +0000 (15:58 +0300)]
ARC: Introduce is_isa_X() functions

Introduce is_isa_arcv2() and is_isa_arcompact() functions.

These functions only check configuration options and return
compile-time constant so they can be used instead of #ifdef's to
to write cleaner code.

Now we can write:
-------------->8---------------
if (is_isa_arcv2())
ioc_configure();
-------------->8---------------
instead of:
-------------->8---------------
ifdef CONFIG_ISA_ARCV2
ioc_configure();
endif
-------------->8---------------

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Cache: Add support for FLUSH_N_INV D$ operations
Eugeniy Paltsev [Wed, 21 Mar 2018 12:58:48 +0000 (15:58 +0300)]
ARC: Cache: Add support for FLUSH_N_INV D$ operations

As of today __dc_line_op() and __dc_entire_op() support
only separate flush (OP_FLUSH) and invalidate (OP_INV) operations.

Add support of combined flush and invalidate (OP_FLUSH_N_INV)
operation which we planing to use in subsequent patches.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Cache: Remove per-line I$ operations as unused
Eugeniy Paltsev [Wed, 21 Mar 2018 12:58:47 +0000 (15:58 +0300)]
ARC: Cache: Remove per-line I$ operations as unused

__cache_line_loop() function was copied from Linux kernel
where per-line instruction cache operations are really used.

In U-Boot we use only entire I$ ops, so we can drop support of
per-line I$ ops from __cache_line_loop() because __cache_line_loop()
is never called with OP_INV_IC parameter.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Cache: Move I$ entire operation to a separate function
Eugeniy Paltsev [Wed, 21 Mar 2018 12:58:46 +0000 (15:58 +0300)]
ARC: Cache: Move I$ entire operation to a separate function

Move instruction cache entire operation to a separate function
because we are planing to use it in other places like
sync_icache_dcache_all().

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoarc: Fine-tune implementation of memory barriers
Alexey Brodkin [Wed, 21 Feb 2018 09:58:00 +0000 (12:58 +0300)]
arc: Fine-tune implementation of memory barriers

We improve on 2 things:
 1. Only ARC HS family has "dmb" instructions so do compile-time
    check for automatically defined macro __ARCHS__.
    Previous check for ARCv2 ISA was not good enough because ARC EM
    family is v2 ISA as well but still "dmb" instaruction is not
    supported in EM family.

 2. Still if there's no dedicated instruction for memory barrier
    let's at least insert compile-time barrier to make sure
    compiler deosn't reorder critical memory operations.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoarc: Introduce a possibility to not relocate U-boot
Alexey Brodkin [Wed, 16 Dec 2015 16:24:10 +0000 (19:24 +0300)]
arc: Introduce a possibility to not relocate U-boot

Disabling relocation might be useful on ARC for 2 reasons:
 a) For advanced debugging with Synopsys proprietary MetaWare debugger
    which is capable of accessing much more specific hardware resources
    compared to gdb. For example it may show contents of L1 and L2 caches,
    internal states of some hardware blocks etc.

    But on the downside MetaWare debugger still cannot work with PIE.
    Even though that limitation could be work-arounded with change of ELF's
    header and stripping down all debug info but with it we won't have
    debug info for source-level debugging which is quite inconvenient.

 b) Some platforms which might benefit from usage of U-Boot basically
    don't have enough RAM to accommodate relocation of U-Boot so we
    keep code in flash and use as much of RAM as possible for more
    interesting things.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefan Roese <sr@denx.de>
6 years agoarc: Eliminate unused code and data with GCC's garbage collector
Alexey Brodkin [Wed, 24 Jan 2018 21:25:12 +0000 (00:25 +0300)]
arc: Eliminate unused code and data with GCC's garbage collector

Finally GCC's garbage collector works on ARC so let's use it.
That's what I may see for HSDK:

Before:
   text    data     bss     dec     hex filename
 290153   10068  222616  522837   7fa55 u-boot

After:
   text    data     bss     dec     hex filename
 261999    9460  222360  493819   788fb u-boot

Overall ~5% of memory footprint saved.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoarc: Don't halt slaves
Alexey Brodkin [Wed, 24 Jan 2018 12:27:04 +0000 (15:27 +0300)]
arc: Don't halt slaves

This commit basically reverts two commits:
 1. cf628f772ef2 ("arc: arcv1: Disable master/slave check")
 2. 6cba327bd96f ("arcv2: Halt non-master cores")

With mentioned commits in-place we experience more trouble than
benefits. In case of SMP Linux kernel this is really required as
we have all the cores running from the very beginning and then we
need to allow master core to do some preparatory work while slaves
are not getting in the way.

In case of U-Boot we:
 a) Don't really run more than 1 core in parallel
 b) We may use whatever core for that

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoarc: Get rid of handwritten string routines
Alexey Brodkin [Wed, 24 Jan 2018 20:22:33 +0000 (23:22 +0300)]
arc: Get rid of handwritten string routines

U-Boot is a bit special piese of software because it is being
only executed once on power-on as compared to operating system
for example. That's why we don't care much about performance
optimizations instead we're more concerned about size. And up-to-date
compilers might produce much smaller code compared to
performance-optimized routines copy-pasted from the Linux kernel.

Here's an example:
------------------------------->8--------------------------
--- size_asm_strings.txt
+++ size_c_strings.txt
@@ -1,2 +1,2 @@
    text    data     bss     dec     hex filename
- 121260    3784    3308  128352   1f560 u-boot
+ 120448    3784    3308  127540   1f234 u-boot
------------------------------->8--------------------------

See we were able to shave off ~800 bytes of .text section.

Also usage of string routines implemented in C gives us an ability
to support more HW flavors for free: generated instructions will match
our target as long as correct compiler option is used.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Tue, 20 Mar 2018 22:39:27 +0000 (18:39 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq

6 years agoLS2088ARDB: Secure Boot: Fix fall back option failure
Vinitha V Pillai [Tue, 27 Feb 2018 07:27:31 +0000 (12:57 +0530)]
LS2088ARDB: Secure Boot: Fix fall back option failure

Fix NOR, SD and QSPI fallback option in case of secure boot failure.

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1088aqds: Add IFC-NOR as boot source for LS1088
Ashish Kumar [Mon, 19 Feb 2018 08:46:58 +0000 (14:16 +0530)]
armv8: ls1088aqds: Add IFC-NOR as boot source for LS1088

IFC-NOR and QSPI-NOR pins are multiplexed on SoC, so they cannot be
accessed simultaneously. IFC-NOR can be accessed along with SD-BOOT.

Ls1088aqds_sdcard_ifc_defconfig is default config for SD boot and
IFC-NOR to be used as flash. This allows writing to IFC-NOR flash.
QSPI and DSPI cannot be accessed in this defconfig.
IFC-NOR image is generated using ls1088aqds_defconfig.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1088a: Add i2c_early_init() func for LS1088AQDS
Ashish Kumar [Mon, 19 Feb 2018 08:44:53 +0000 (14:14 +0530)]
armv8: ls1088a: Add i2c_early_init() func for LS1088AQDS

This function is required for enabling access to early i2c function
for correct usage of QIXIS_READ and QIXIS_WRITE.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1088a: Add clock related function in CONFIG_SPL_BUILD
Ashish Kumar [Mon, 19 Feb 2018 08:44:52 +0000 (14:14 +0530)]
armv8: ls1088a: Add clock related function in CONFIG_SPL_BUILD

get_board_ddr_clk(), get_board_sys_clk() and if_board_diff_clk() is
now available for SPL build.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1088qds: Remove CONFIG_ from local defines for FPGA
Ashish Kumar [Mon, 19 Feb 2018 08:44:09 +0000 (14:14 +0530)]
armv8: ls1088qds: Remove CONFIG_ from local defines for FPGA

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoMerge git://git.denx.de/u-boot-usb
Tom Rini [Tue, 20 Mar 2018 00:10:15 +0000 (20:10 -0400)]
Merge git://git.denx.de/u-boot-usb

6 years agoMerge git://git.denx.de/u-boot-sunxi
Tom Rini [Mon, 19 Mar 2018 22:39:14 +0000 (18:39 -0400)]
Merge git://git.denx.de/u-boot-sunxi

6 years agobootm: optee: Add a bootm command for type IH_OS_TEE
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:36 +0000 (16:50 +0000)]
bootm: optee: Add a bootm command for type IH_OS_TEE

This patch makes it possible to verify the contents and location of an
OPTEE image in DRAM prior to handing off control to that image. If image
verification fails we won't try to boot any further.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Andrew F. Davis <afd@ti.com>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
6 years agoimage: Add IH_OS_TEE for TEE chain-load boot
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:35 +0000 (16:50 +0000)]
image: Add IH_OS_TEE for TEE chain-load boot

This patch adds a new type IH_OS_TEE. This new OS type will be used for
chain-loading to Linux via a TEE.

With this patch in-place you can generate a bootable OPTEE image like this:

mkimage -A arm -T kernel -O tee -C none -d tee.bin uTee.optee

where "tee.bin" is the input binary prefixed with an OPTEE header and
uTee.optee is the output prefixed with a u-boot wrapper header.

This image type "-T kernel -O tee" is differentiated from the existing
IH_TYPE_TEE "-T tee" in that the IH_TYPE is installed by u-boot (flow
control returns to u-boot) whereas for the new IH_OS_TEE control passes to
the OPTEE firmware and the firmware chainloads onto Linux.

Andrew Davis gave the following ASCII diagram:

IH_OS_TEE: (mkimage -T kernel -O tee)
Non-Secure       Secure

                 BootROM
                   |
      -------------
     |
     v
    SPL
     |
     v
   U-Boot ------>
          <-----  OP-TEE
      |
      V
    Linux

IH_TYPE_TEE: (mkimage -T tee)
Non-Secure       Secure

                 BootROM
                   |
      -------------
     |
     v
    SPL ------->
         <-----  OP-TEE
     |
     v
   U-Boot
      |
      V
    Linux

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Andrew F. Davis <afd@ti.com>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Link: http://mrvan.github.io/optee-imx6ul
6 years agooptee: Add error printout
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:34 +0000 (16:50 +0000)]
optee: Add error printout

When encountering an error in OPTEE verification print out various details
of the OPTEE header to aid in further debugging of encountered errors.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
6 years agooptee: Add optee_verify_bootm_image()
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:33 +0000 (16:50 +0000)]
optee: Add optee_verify_bootm_image()

This patch adds optee_verify_bootm_image() which will be subsequently used
to verify the parameters encoded in the OPTEE header match the memory
allocated to the OPTEE region, OPTEE header magic and version prior to
handing off control to the OPTEE image.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
6 years agooptee: Add optee_image_get_load_addr()
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:32 +0000 (16:50 +0000)]
optee: Add optee_image_get_load_addr()

This patch adds optee_image_get_load_addr() a helper function used to
calculate the load-address of an OPTEE image based on the lower
entry-point address given in the OPTEE header.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
6 years agooptee: Add optee_image_get_entry_point()
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:31 +0000 (16:50 +0000)]
optee: Add optee_image_get_entry_point()

Add a helper function for extracting the least significant 32 bits from the
OPTEE entry point address, which will be good enough to load OPTEE binaries
up to (2^32)-1 bytes.

We may need to extend this out later on but for now (2^32)-1 should be
fine.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
6 years agooptee: Add CONFIG_OPTEE_LOAD_ADDR
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:30 +0000 (16:50 +0000)]
optee: Add CONFIG_OPTEE_LOAD_ADDR

CONFIG_OPTEE_LOAD_ADDR is used to tell u-boot where to load the OPTEE
binary into memory prior to handing off control to OPTEE.

We need to pull this value out of u-boot in order to produce an IMX IVT/CSF
signed pair for the purposes of secure boot. The best way to do that is to
have CONFIG_OPTEE_LOAD_ADDR appear in u-boot.cfg.

Adding new CONFIG entires to u-boot should be kconfig driven so this patch
does just that.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
6 years agooptee: Add CONFIG_OPTEE_TZDRAM_BASE
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:29 +0000 (16:50 +0000)]
optee: Add CONFIG_OPTEE_TZDRAM_BASE

OPTEE is currently linked to a specific area of memory called the TrustZone
DRAM. This patch adds a CONFIG entry for the default address of TrustZone
DRAM that a board-port can over-ride. The region that U-Boot sets aside for
the OPTEE run-time should be verified before attempting to hand off to the
OPTEE run-time. Each board-port should carefully ensure that the TZDRAM
address specified in the OPTEE build and the TZDRAM address specified in
U-Boot match-up.

Further patches will use TZDRAM address with other defines and variables to
carry out a degree of automated verification in U-Boot prior to trying to
boot an OPTEE image.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agooptee: Add CONFIG_OPTEE_TZDRAM_SIZE
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:28 +0000 (16:50 +0000)]
optee: Add CONFIG_OPTEE_TZDRAM_SIZE

OPTEE is currently linked to a specific area of memory called the TrustZone
DRAM. This patch adds a CONFIG entry for the default size of TrustZone DRAM
that a board-port can over-ride. The region that U-Boot sets aside for the
OPTEE run-time should be verified before attempting to hand off to the
OPTEE run-time. Each board-port should carefully ensure that the TZDRAM
size specified in the OPTEE build and the TZDRAM size specified in U-Boot
match-up.

Further patches will use TZDRAM size with other defines and variables to
carry out a degree of automated verification in U-Boot prior to trying to
boot an OPTEE image.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
6 years agooptee: Add lib entries for sharing OPTEE code across ports
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:27 +0000 (16:50 +0000)]
optee: Add lib entries for sharing OPTEE code across ports

This patch adds code to lib to enable sharing of useful OPTEE code between
board-ports and architectures. The code on lib/optee/optee.c comes from the
TI omap2 port. Eventually the OMAP2 code will be patched to include the
shared code. The intention here is to add more useful OPTEE specific code
as more functionality gets added.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
6 years agoMAINTAINERS: Remove unused ppc4xx entry
Stefan Roese [Tue, 13 Mar 2018 07:41:10 +0000 (08:41 +0100)]
MAINTAINERS: Remove unused ppc4xx entry

ppc4xx support was removed some time ago. Lets remove the now unused
entry in MAINTAINERS as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agopci: Remove unused ppc4xx variable from struct pci_controller
Stefan Roese [Tue, 13 Mar 2018 07:41:09 +0000 (08:41 +0100)]
pci: Remove unused ppc4xx variable from struct pci_controller

ppc4xx support was removed some time ago. Lets remove the now unused
"pci_fb" variable from "struct pci_controller" as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
6 years agonand: Remove unused ppc4xx NAND driver and references
Stefan Roese [Tue, 13 Mar 2018 07:41:08 +0000 (08:41 +0100)]
nand: Remove unused ppc4xx NAND driver and references

ppc4xx support was removed some time ago. Lets remove the now unused
NAND driver and all its references for this platform as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Scott Wood <oss@buserror.net>
6 years agoboard: st: add generic board for STM32MP1 family
Patrick Delaunay [Mon, 12 Mar 2018 09:46:18 +0000 (10:46 +0100)]
board: st: add generic board for STM32MP1 family

Add first support for STM32MP157C-ED1 board with "Basic" boot chain
1/ Boot Rom: load SPL with STM32 image header in SYSRAM
2/ SPL: power up and initialize the DDR and load U-Boot image
        from SDCARD in DDR
3/ U-Boot: search and load extlinux.conf in SDCARD
           (DISTRO activated)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agodts: add device tree for STM32MP157C-ED1 board
Patrick Delaunay [Mon, 12 Mar 2018 09:46:17 +0000 (10:46 +0100)]
dts: add device tree for STM32MP157C-ED1 board

Add minimal devicetree for STM32MP157C-ED1 board,
with only the devices to allow boot from SDCARD:
- RCC for clock and reset
- UART4 for console
- I2C and PMIC
- DDR
- SDMMC0 for SDCard

Waiting Kernel upstream for alignment.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agoclk: stm32mp1: add clock tree initialization
Patrick Delaunay [Mon, 12 Mar 2018 09:46:16 +0000 (10:46 +0100)]
clk: stm32mp1: add clock tree initialization

add binding and code for clock tree initialization from device tree

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agoclk: add driver for stm32mp1
Patrick Delaunay [Mon, 12 Mar 2018 09:46:15 +0000 (10:46 +0100)]
clk: add driver for stm32mp1

add RCC clock driver for STMP32MP157
- base on driver model = UCLASS_CLK
- support ops to enable, disable and get rate
  of all SOC clock needed by U-Boot

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agoreset: stm32: adapt driver for stm32mp1
Patrick Delaunay [Mon, 12 Mar 2018 09:46:14 +0000 (10:46 +0100)]
reset: stm32: adapt driver for stm32mp1

- move to livetree and allow to get address to parent
- add stm32mp1 compatible for probe

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agopinctrl: stm32: update pincontrol for stmp32mp157
Patrick Delaunay [Mon, 12 Mar 2018 09:46:13 +0000 (10:46 +0100)]
pinctrl: stm32: update pincontrol for stmp32mp157

- add the 2 new compatible used by STM32MP157
"st,stm32mp157-pinctrl"
"st,stm32mp157-z-pinctrl"
- update the mask for the port

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agopmic: add stpmu1 support
Patrick Delaunay [Mon, 12 Mar 2018 09:46:12 +0000 (10:46 +0100)]
pmic: add stpmu1 support

This driver implements register read/write operations for STPMU1.

The STPMU1 PMIC provides 4 BUCKs, 6 LDOs, 1 VREF
and 2 power switches. It is accessed via an I2C interface.
This device is used with STM32MP1 SoCs.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agoram: stm32mp1: add driver
Patrick Delaunay [Mon, 12 Mar 2018 09:46:11 +0000 (10:46 +0100)]
ram: stm32mp1: add driver

Add driver and binding for stm32mp1 ddr controller and phy

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agoarm: stm32: add new architecture for STM32MP family
Patrick Delaunay [Mon, 12 Mar 2018 09:46:10 +0000 (10:46 +0100)]
arm: stm32: add new architecture for STM32MP family

- add new arch stm32mp for STM32 MPU/Soc based on Cortex A
- support for stm32mp157 SOC
- SPL is used as first boot stage loader
- using driver model for all the drivers, even in SPL
- all security feature are deactivated (ETZC and TZC)
- reused STM32 MCU drivers when it is possible

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agostm32mp: stm32f7_i2c: use calloc instead of kmalloc
Patrick Delaunay [Mon, 12 Mar 2018 09:46:09 +0000 (10:46 +0100)]
stm32mp: stm32f7_i2c: use calloc instead of kmalloc

Kmalloc is using memalign allocation function. It is not necessary to
align this structure so to save bytes, we move to calloc.

And kmalloc function can't be used in SPL early stage (in board_init_f())

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agogpio: stm32f7_gpio: handle node ngpios
Patrick Delaunay [Mon, 12 Mar 2018 09:46:08 +0000 (10:46 +0100)]
gpio: stm32f7_gpio: handle node ngpios

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agodm: gpio: Convert stm32f7 driver to livetree
Patrick Delaunay [Mon, 12 Mar 2018 09:46:07 +0000 (10:46 +0100)]
dm: gpio: Convert stm32f7 driver to livetree

Update the GPIO driver to support a live device tree.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agoarm: armv7: solve issue for timer_rate_hz in arch timer
Patrick Delaunay [Mon, 12 Mar 2018 09:46:06 +0000 (10:46 +0100)]
arm: armv7: solve issue for timer_rate_hz in arch timer

The current value timer_rate_hz causes a problem with function
timer_get_us() from lib time and then an issue with
readx_poll_timeout() function.

With corrected value for tbclk() = timer_rate_hz = CONFIG_SYS_HZ_CLOCK
the weak functions in lib timer can be used:
- get_timer()
- __udelay()
So the specific function in this file are removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agospl: add SPL_RESET_SUPPORT
Patrick Delaunay [Mon, 12 Mar 2018 09:46:05 +0000 (10:46 +0100)]
spl: add SPL_RESET_SUPPORT

Add option to include RESET driver and uclass in SPL.
That can be useful to handle IP reset with same driver
in U-Boot and in SPL.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agotools/mkimage: add support for STM32 image format
Patrick Delaunay [Mon, 12 Mar 2018 09:46:04 +0000 (10:46 +0100)]
tools/mkimage: add support for STM32 image format

STM32MP157 bootrom needs a specific header for first boot stage.
This patch adds support of this header in mkimage.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agotools: env: Implement atomic replace for filesystem
Alex Kiernan [Fri, 9 Mar 2018 12:13:02 +0000 (12:13 +0000)]
tools: env: Implement atomic replace for filesystem

If the U-Boot environment is stored in a regular file and redundant
operation isn't set, then write to a temporary file and perform an
atomic rename.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
6 years agotools: env: Refactor write path of flash_io()
Alex Kiernan [Fri, 9 Mar 2018 12:13:01 +0000 (12:13 +0000)]
tools: env: Refactor write path of flash_io()

Extract write path of flash_io() into a separate function. This patch
should be a functional no-op.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agotools: env: Fix CamelCasing style violation
Alex Kiernan [Fri, 9 Mar 2018 12:13:00 +0000 (12:13 +0000)]
tools: env: Fix CamelCasing style violation

Replace HaveRedundEnv with have_redund_env to fix style violation.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
6 years agotools: env: Pass through indent
Alex Kiernan [Fri, 9 Mar 2018 12:12:59 +0000 (12:12 +0000)]
tools: env: Pass through indent

Pass tools/env/fw_env.c through indent to correct style violations. This
commit consists of only one non-whitespace change:

  tools/env/fw_env.c:549: error: do not use assignment in if condition

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
6 years agoSPL: Add signature verification when loading image
Jun Nie [Tue, 27 Feb 2018 08:55:58 +0000 (16:55 +0800)]
SPL: Add signature verification when loading image

U-boot proper signature is not verified by SPL on most platforms
even config SPL_FIT_SIGNATURE is enabled. Only fsl-layerscape
platform support secure boot in platform specific code. So
verified boot cannot be achieved if u-boot proper is loaded by
SPL.

This patch add signature verification to u-boot proper images
when loading FIT image in SPL. It is tested on Allwinner bananapi
zero board with H2+ SoC.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
6 years agoMerge git://git.denx.de/u-boot-video
Tom Rini [Mon, 19 Mar 2018 13:56:34 +0000 (09:56 -0400)]
Merge git://git.denx.de/u-boot-video

6 years agosunxi: Add DRAM_SUN8I_A83T kconfig entry
Jagan Teki [Wed, 10 Jan 2018 10:50:26 +0000 (16:20 +0530)]
sunxi: Add DRAM_SUN8I_A83T kconfig entry

Add proper and simple kconfig option for dram_sun8i_a83t.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
6 years agosunxi: Add DRAM_SUN8I_A33 kconfig entry
Jagan Teki [Wed, 10 Jan 2018 10:47:39 +0000 (16:17 +0530)]
sunxi: Add DRAM_SUN8I_A33 kconfig entry

Add proper and simple kconfig option for dram_sun8i_a33.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
6 years agosunxi: Add DRAM_SUN8I_A23 kconfig entry
Jagan Teki [Wed, 10 Jan 2018 10:45:14 +0000 (16:15 +0530)]
sunxi: Add DRAM_SUN8I_A23 kconfig entry

Add proper and simple kconfig option for dram_sun8i_a23.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
6 years agosunxi: Add DRAM_SUN9I kconfig entry
Jagan Teki [Fri, 16 Mar 2018 18:48:01 +0000 (00:18 +0530)]
sunxi: Add DRAM_SUN9I kconfig entry

Add proper and simple kconfig option for dram_sun9i.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
6 years agosunxi: Add DRAM_SUN4I kconfig entry
Jagan Teki [Wed, 10 Jan 2018 10:33:34 +0000 (16:03 +0530)]
sunxi: Add DRAM_SUN4I kconfig entry

Add proper and simple kconfig option for dram_sun4i.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
6 years agosunxi: add DRAM_SUN6I kconfig
Jagan Teki [Fri, 16 Mar 2018 18:46:36 +0000 (00:16 +0530)]
sunxi: add DRAM_SUN6I kconfig

Add proper and simple kconfig option for dram_sun6i.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
6 years agosunxi: Add AXP_PMIC_BUS kconfig entry
Jagan Teki [Wed, 14 Feb 2018 16:58:30 +0000 (22:28 +0530)]
sunxi: Add AXP_PMIC_BUS kconfig entry

Add simple and meaningful kconfig option for pmic_bus.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
6 years agosunxi: Add SUN8I_RSB kconfig entry
Jagan Teki [Thu, 11 Jan 2018 07:53:52 +0000 (13:23 +0530)]
sunxi: Add SUN8I_RSB kconfig entry

Add simple and meaningful kconfig option for rsb.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
6 years agosunxi: Use SUN6I_PRCM if used
Jagan Teki [Thu, 11 Jan 2018 07:53:02 +0000 (13:23 +0530)]
sunxi: Use SUN6I_PRCM if used

SUN6I_PRCM is also used for SUN8I and SUN9I, so
select the same on respective MACH types.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
6 years agosunxi: Add SUN6I_P2WI kconfig entry
Jagan Teki [Thu, 11 Jan 2018 07:51:58 +0000 (13:21 +0530)]
sunxi: Add SUN6I_P2WI kconfig entry

Add simple and meaningful kconfig option for p2wi.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
6 years agosunxi: Add SUN6I_PRCM kconfig entry
Jagan Teki [Thu, 11 Jan 2018 07:51:15 +0000 (13:21 +0530)]
sunxi: Add SUN6I_PRCM kconfig entry

Add simple and meaningful kconfig option for prcm.c
instead of using MACH type on Makefile.

PRCM (Power/Reset/Clock Management) is considered as a
Multi-Functional Device, so used the same on Kconfig definition.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
6 years agoboard: Add display to STM32F746 SoC discovery board
yannick fertre [Fri, 2 Mar 2018 14:59:29 +0000 (15:59 +0100)]
board: Add display to STM32F746 SoC discovery board

Signed-off-by: yannick fertre <yannick.fertre@st.com>
6 years agostm32f7: board: add splash screen
yannick fertre [Fri, 2 Mar 2018 14:59:28 +0000 (15:59 +0100)]
stm32f7: board: add splash screen

Support several pixel format (8bits, 16bits, 24bits & 32bits).
Add new file st_logo_data.h which contains logo
stmicroelectronics_uboot_logo_8bit_rle.bmp.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
6 years agoarm: dts: stm32: add display for STM32F746 disco board
yannick fertre [Fri, 2 Mar 2018 14:59:27 +0000 (15:59 +0100)]
arm: dts: stm32: add display for STM32F746 disco board

Enable the display controller, panel & backlight.
Set panel display timings & set the RGB data bus.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
6 years agoarm: dts: stm32: add ltdc for STM32F746
Philippe CORNU [Fri, 2 Mar 2018 14:59:26 +0000 (15:59 +0100)]
arm: dts: stm32: add ltdc for STM32F746

Add display controller node in device-tree.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
[agust: rebased on master]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
6 years agovideo: stm32: stm32_ltdc: set the blending factor
yannick fertre [Fri, 2 Mar 2018 14:59:25 +0000 (15:59 +0100)]
video: stm32: stm32_ltdc: set the blending factor

Set the blending factor regarding the pixel format

Signed-off-by: yannick fertre <yannick.fertre@st.com>
6 years agovideo: stm32: stm32_ltdc: missing set of line interrupt position
yannick fertre [Fri, 2 Mar 2018 14:59:24 +0000 (15:59 +0100)]
video: stm32: stm32_ltdc: missing set of line interrupt position

Set LIPCR (line interrupt position conf) register with line length.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
6 years agovideo: stm32: stm32_ltdc: set rate of the pixel clock
yannick fertre [Fri, 2 Mar 2018 14:59:23 +0000 (15:59 +0100)]
video: stm32: stm32_ltdc: set rate of the pixel clock

pxclk is useless to set pixel clock.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
6 years agovideo: stm32: stm32_ltdc: update file header & footer
yannick fertre [Fri, 2 Mar 2018 14:59:22 +0000 (15:59 +0100)]
video: stm32: stm32_ltdc: update file header & footer

Modified copyright & driver name.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
6 years agovideo: stm32: stm32_ltdc: add reset
yannick fertre [Fri, 2 Mar 2018 14:59:21 +0000 (15:59 +0100)]
video: stm32: stm32_ltdc: add reset

Add reset of LTDC display controller.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
6 years agovideo: exynos: remove redundant assignments
Heinrich Schuchardt [Mon, 19 Mar 2018 06:46:08 +0000 (07:46 +0100)]
video: exynos: remove redundant assignments

No need to initialize variables if the next usage is an assignment.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agovideo, da8xx-fb: fix time out in wait_for_event()
Heinrich Schuchardt [Sun, 18 Mar 2018 13:48:06 +0000 (14:48 +0100)]
video, da8xx-fb: fix time out in wait_for_event()

If an event does not occur the current coding stays in an endless loop.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agovideo: stb_truetype: simplify expression
Heinrich Schuchardt [Sun, 18 Mar 2018 13:31:43 +0000 (14:31 +0100)]
video: stb_truetype: simplify expression

Eliminate (x2 - x2) which is always zero.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agovideo: cfb_console: simplify logical constraint
Heinrich Schuchardt [Sun, 18 Mar 2018 13:24:39 +0000 (14:24 +0100)]
video: cfb_console: simplify logical constraint

(A || !A && B) == (A || B)

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agousb: dwc2: Replace printf, pr_err by dev_info, dev_err
Patrice Chotard [Thu, 15 Mar 2018 17:00:32 +0000 (18:00 +0100)]
usb: dwc2: Replace printf, pr_err by dev_info, dev_err

Replace printf() call by dev_info() and pr_err() by dev_err()

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agousb: dwc2: increase timeout in wait_for_chhltd
Christophe Kerello [Thu, 15 Mar 2018 17:00:31 +0000 (18:00 +0100)]
usb: dwc2: increase timeout in wait_for_chhltd

This patch increases timeout to 2s.
It was seen on 2 USB devices (Verbatim STORE N GO 070B4AED0FB22358 and
USB DISK 2.0 9000729BA41DDF40) that the request sense command takes
between 1.3s and and 1.5s.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agousb: dwc2: disable external vbus supply when the device is removed
Christophe Kerello [Thu, 15 Mar 2018 17:00:30 +0000 (18:00 +0100)]
usb: dwc2: disable external vbus supply when the device is removed

This patch adds an interface to disable the power in dwc2 driver.
This new interface is called when the device is removed.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agousb: ohci-generic: replace pr_err() by dev_err()
Patrice Chotard [Wed, 14 Mar 2018 16:48:58 +0000 (17:48 +0100)]
usb: ohci-generic: replace pr_err() by dev_err()

As we get access to struct udevice, use dev_err() instead
of pr_err().

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agousb: ohci-generic: factorize PHY operation
Patrice Chotard [Wed, 14 Mar 2018 16:48:57 +0000 (17:48 +0100)]
usb: ohci-generic: factorize PHY operation

Factorize PHY get/init/poweron and PHY poweroff/exit operations
into separate function, it simplify the error path.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agousb: ohci-generic: handle phy power on/off
Patrice Chotard [Wed, 14 Mar 2018 16:48:56 +0000 (17:48 +0100)]
usb: ohci-generic: handle phy power on/off

Add generic_phy_power_on() and generic_phy_power_off()
calls to switch ON/OFF phy during probe and remove functions.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agousb: ehci-generic: replace pr_err() by dev_err()
Patrice Chotard [Wed, 14 Mar 2018 16:48:55 +0000 (17:48 +0100)]
usb: ehci-generic: replace pr_err() by dev_err()

As we get access to struct udevice, use dev_err() instead
of pr_err().

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agousb: ehci-generic: factorize PHY operation
Patrice Chotard [Wed, 14 Mar 2018 16:48:54 +0000 (17:48 +0100)]
usb: ehci-generic: factorize PHY operation

Factorize PHY get/init/poweron and PHY poweroff/exit operations
into separate function, it simplify the error path.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agousb: ehci-generic: handle phy power on/off
Patrice Chotard [Wed, 14 Mar 2018 16:48:53 +0000 (17:48 +0100)]
usb: ehci-generic: handle phy power on/off

Add generic_phy_power_on() and generic_phy_power_off()
calls to switch ON/OFF phy during probe and remove functions.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agousb: Remove unused ppc4xx EHCI host driver
Stefan Roese [Tue, 13 Mar 2018 07:41:07 +0000 (08:41 +0100)]
usb: Remove unused ppc4xx EHCI host driver

ppc4xx support was removed some time ago. Lets remove the now unused
EHCI driver and all its references for this platform as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Marek Vasut <marex@denx.de>
6 years agoubs: xhci-dwc3: Enable USB3 PHY when available
Vignesh R [Wed, 7 Mar 2018 09:20:10 +0000 (14:50 +0530)]
ubs: xhci-dwc3: Enable USB3 PHY when available

DWC3 USB3 controllers will need USB3 PHY to be enabled, in addition to
USB2 PHY, to be functional. Therefore enable USB3 PHY when available.

Signed-off-by: Vignesh R <vigneshr@ti.com>