York Sun [Fri, 7 Nov 2014 20:14:36 +0000 (12:14 -0800)]
driver/ddr/fsl: Adjust timing_cfg_0 to better support two DDR slots
Increase write-to-write and read-to-read turnaround time for two-slot DDR
configurations. Previously only quad-rank and two dual-rank configurations
have this additional turnaround time. A recent test on two single-rank
DIMMs shows the shorter additional turnaround time is also needed.
Holger Brunck [Thu, 6 Nov 2014 13:54:18 +0000 (14:54 +0100)]
km/km82xx: remove CONFIG_SYS_RAMBOOT
This define is never set in our setup, so we can remove it safely. The
former code causes cppcheck to complain about:
[board/keymile/km82xx/km82xx.c:311]: (error) Uninitialized variable:
psize
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Wolfgang Denk <wd@denx.de> Reviewed-by: York Sun <yorksun@freescale.com>
Ying Zhang [Fri, 31 Oct 2014 10:06:18 +0000 (18:06 +0800)]
powerpc/t208xqds: VID support
The fuse status register provides the values from on-chip
voltage ID efuses programmed at the factory.
These values define the voltage requirements for
the chip. u-boot reads FUSESR and translates the values
into the appropriate commands to set the voltage output
value of an external voltage regulator.
Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
T2080 v1.0 has this errata while v1.1 has fixed
this errata by hardware, add a new function has_errata_a007186
to check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first,
if the sil has errata a007186, then run the errata code,
if not, doesn't run the code.
Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
powerpc/mpc85xx:Put errata number for T104x NAND boot issue
When device is configured to load RCW from NAND flash IFC_A[16:31] are driven
low after RCW loading. Hence Devices connected on IFC_CS[1:7] and using
IFC_A[16:31] lines are not accessible.
Workaround is already in-place.
Put the errata number to adhere errata handling framework.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
York Sun [Mon, 27 Oct 2014 18:45:11 +0000 (11:45 -0700)]
powerpc/t1040qds: Update DDR option
Enable interactive debugging by default. Remove DDR controller interleaving
because this SoC only has one controller. Use auto chip-select interleaving
to detect number of ranks.
Signed-off-by: York Sun <yorksun@freescale.com> CC: Poonam Aggrwal <poonam.aggrwal@freescale.com>
York Sun [Mon, 27 Oct 2014 18:31:32 +0000 (11:31 -0700)]
mpc85xx/t208xqds: Adjust DDR timing parameters
Adjust timing for dual-rank UDIMM, verified on M3CQ-8GHS3C0E for speed of
1066, 1333, 1600, 1866MT/s. The 1866 timing is copied to 2133 timing in
case such DIMM comes available.
Also update single-rank 1866 timing. Enable interactive debugging as well.
Signed-off-by: York Sun <yorksun@freescale.com> CC: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Joakim Tjernlund [Fri, 24 Oct 2014 14:49:02 +0000 (16:49 +0200)]
Freescale t104x: Do not exclude SGMII
fman_port_enet_if() tests if FM1_DTSEC2 or FM1_DTSEC4 uses
RGMII or MII and if not returns PHY_INTERFACE_MODE_NONE.
This excludes testing for SGMII further down.
Remove the unconditional "else return PHY_INTERFACE_MODE_NONE"
so SGMII can be tested too.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Reviewed-by: York Sun <yorksun@freescale.com>
Alison Wang [Wed, 3 Dec 2014 07:00:44 +0000 (15:00 +0800)]
common: spl: Add interactive DDR debugger support for SPL image
To support interactive DDR debugger, cli_simple.o, cli.o, cli_readline.o,
command.o, s_record.o, xyzModem.o and cmd_disk.o are all needed for
drivers/ddr/fsl/interactive.c.
In current common/Makefile, the above .o files are only produced when
CONFIG_SPL_BUILD is disabled.
For LS102xA, interactive DDR debugger is needed in SD/NAND boot too, and
I enabled CONFIG_FSL_DDR_INTERACTIVE. But according to the current
common/Makfile, all the above .o files are not produced in SPL part
because CONFIG_SPL_BUILD is enabled in SPL part, the following error
will be shown,
drivers/ddr/fsl/built-in.o: In function `fsl_ddr_interactive':
/home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1871:
undefined reference to `cli_readline_into_buffer'
/home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1873:
undefined reference to `cli_simple_parse_line'
make[1]: *** [spl/u-boot-spl] Error 1
make: *** [spl/u-boot-spl] Error 2
So this patch fixed this issue and the above .o files will be produced
no matter CONFIG_SPL_BUILD is enabled or disabled.
Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Heiko Schocher [Tue, 18 Nov 2014 10:51:06 +0000 (11:51 +0100)]
arm, am335x: siemens boards add FIT support
add FIT support and set "boardid" from factoryset records
"DEV/id" and "COMP/ver". "boardid" is used for selecting
which fit configuration gets booted on the board.
a record could contain other records, so after an ">" (begin mark)
there not always come an end mark "<", instead a ">" is possible.
Take care of this.
Stefan Roese [Thu, 13 Nov 2014 02:43:39 +0000 (03:43 +0100)]
mtd: nand: omap_gpmc: Always use ready/busy pin
The functions to detect the state of the ready / busy signal is already
available but only used in the SPL case. Lets use it always, also for the
main U-Boot. As all boards should have this HW connection.
Testing on Siemens Draco (am335x) showed a small perfomance gain by using
this ready pin to detect the NAND chip state. Here the values tested on
Draco with Hynix 4GBit NAND:
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Samuel Egli <samuel.egli@siemens.com>
Stefan Roese [Wed, 12 Nov 2014 10:57:33 +0000 (11:57 +0100)]
arm: am33xx: Handle NAND+I2C boot-device the same way as NAND
Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
Otherwise the SPL boot IF can't handle this device correctly.
Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
Draco leads to this boot-device passed to SPL from the BootROM.
With this change, Draco boots just fine into main U-Boot.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Samuel Egli <samuel.egli@siemens.com>
Lubomir Popov [Mon, 10 Nov 2014 16:34:10 +0000 (18:34 +0200)]
ARM: OMAP5: DRA7xx: Fix misleading comments in mux_data.h
The comments on the QSPI pad assignments erronously swapped
the qspi1_d0 and qspi1_d1 functionality and could cause
confusion. QSPI1_D[0] is in fact muxed on pad U1 (gpmc_a16),
and QSPI1_D[1] - on pad P3 (gpmc_a17). Fixing comments.
Signed-off-by: Lubomir Popov <l-popov@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
omap_hsmmc: Board-specific TWL4030 MMC power initializations
Boards using the TWL4030 regulator may not all use the LDOs the same way
(e.g. MMC2 power can be controlled by another LDO than VMMC2).
This delegates TWL4030 MMC power initializations to board-specific functions,
that may still call twl4030_power_mmc_init for the default behavior.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@ti.com>
[trini: Fix omap3_evm warning, add twl4030.h] Signed-off-by: Tom Rini <trini@ti.com>
Renesas R-Mobile/R-Car ARM SoC of MMC has the same IP that are supported by
sh_mmcif. This adds support R-Mobile/R-Car ARM SoC with the setting of the
clock support.
mmc: sh_mmcif: Change maximum and minimum value of MMC clock
Maximum value and the minimum value of clock for sh_mmcif instead by
base of MMC clock. This removes fixed clock, make the changes to be calculated
according to environment.
arm: rmobile: rcar: Add structure for infomation of module control register
The infomation of module control register for R-Car ARM SoC (r8a7790, r8a7791,
r8a7793 and r8a7794) are almost the same, they can be combined into one
structure. This provides structure that summarizes infomation of module control
register and default register values.
And this structure is the module control use of the kernel at boot time.
arm: rmobile: rcar: Add mstp_setclrbits and mstp_setclrbits_le32
This addes macro for set and clear bit control for module control register.
This is used when user want to disable the function of the devices
corresponding to register.
arm: rmobile: rcar: Move arch_preboot_os function to rcar-gen2-common/common.c
The arch_preboot_os function used in boards using R-Car ARM SoC (r8a7790,
r8a7791, r8a7793 and r8a7794) is common.
This makes rcar-gen2-common/common.c file providing common function for
R-Car ARM SoC, and moves this function to this file.
CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION ought to be called
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION to keep it consistent with other config
options such as: CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR.
In addition, it is not related to raw mode booting but to fs mode instead.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@ti.com>
twl4030: device-index-specific MMC power initializations, common ramp-up delay
Not every device has multiple MMC slots available, so it makes sense to enable
only the required LDOs for the available slots. Generic code in omap_hsmmc will
enable both VMMC1 and VMMC2, in doubt.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@ti.com>
Some devices may use non-standard combinations of regulators to power MMC:
this allows these devices to provide a board-specific MMC power init function
to set everything up in their own way.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@ti.com>
Felipe Balbi [Mon, 10 Nov 2014 20:02:44 +0000 (14:02 -0600)]
beagle_x15: add board support for Beagle x15
BeagleBoard-X15 is the next generation Open Source
Hardware BeagleBoard based on TI's AM5728 SoC
featuring dual core 1.5GHZ A15 processor. The
platform features 2GB DDR3L (w/dual 32bit busses),
eSATA, 3 USB3.0 ports, integrated HDMI (1920x108@60),
separate LCD port, video In port, 4GB eMMC, uSD,
Analog audio in/out, dual 1G Ethernet.
For more information, refer to:
http://www.elinux.org/Beagleboard:BeagleBoard-X15
Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
configs: omap5_common : Boot rootfs from sd card by default
* Since the emmc isn't always programed trying to load the fs from the
emmc causes boot failures/kernel panic.
* The current bootcmd is set to:
bootcmd=run findfdt; run mmcboot;setenv mmcdev 1; setenv bootpart 1:2; \
setenv mmcroot /dev/mmcblk0p2 rw; run mmcboot;
My guess is the env variables should be set so that sd card boot
(dt,kernel,fs) is the default and then fallback to emmc if it fails (no
sd card detected)
The current bootcmd attempts to set mmcroot to the sd card rootfs but
that code doesn't run due to mmcboot being ran early on.
Signed-off-by: Franklin Cooper Jr. <fcooper@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
Felipe Balbi [Thu, 6 Nov 2014 14:28:45 +0000 (08:28 -0600)]
usb: phy: omap_usb_phy: fix build breakage
there's no such function usb3_phy_power(),
it's likely that author meant to call,
usb_phy_power() instead, but that's already
called properly from xhci-omap.c.
Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
Felipe Balbi [Thu, 6 Nov 2014 14:28:42 +0000 (08:28 -0600)]
arm: omap5: don't enable misc_init_r by default
Out of all OMAP5-like boards, only one of them
needs CONFIG_MISC_INIT_R, so it's best to enable
that for that particular board only, instead of
enabling for all boards unconditionally.
Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
Tom Rini [Mon, 24 Nov 2014 16:50:46 +0000 (11:50 -0500)]
fs/ext4/ext4fs.c, fs/fs.c fs/fat/fat_write.c: Adjust 64bit math methods
The changes to introduce loff_t into filesize means that we need to do
64bit math on 32bit platforms. Make sure we use the right wrappers for
these operations.
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Suriyan Ramasami <suriyan.r@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Pierre Aubert <p.aubert@staubli.com>
Hans de Goede [Fri, 28 Nov 2014 13:23:51 +0000 (14:23 +0100)]
fdt: Fix regression in fdt_pack_reg()
After commit 933cdbb479: "fdt: Try to use fdt_address_cells()/fdt_size_cells()"
I noticed that allwinner boards would no longer boot.
Switching to fdt_address_cells / fdt_size_cells changes the result from
bytes to 32 bit words, so when we increment pointers into the blob, we must
do so by 32 bit words now.
This commit makes allwinner boards boot again.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Vince Hsu <vinceh@nvidia.com>
Fabio Estevam [Thu, 27 Nov 2014 22:41:45 +0000 (20:41 -0200)]
mx6sabre_common: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the characters of the error message:
"Unknown command '' - try 'help'".
Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.
Fabio Estevam [Thu, 27 Nov 2014 22:41:44 +0000 (20:41 -0200)]
config_fallbacks: Add a default entry for CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the characters of the error message:
"Unknown command '' - try 'help'".
Provide a default size for CONFIG_SYS_PBSIZE so that it can store the error
message and allows the error message to be printed correctly with no hang.
Soeren Moch [Thu, 27 Nov 2014 20:21:44 +0000 (21:21 +0100)]
tbs2910: fix lost characters on serial input
With enabled console_mux for serial input and usb keyboard sometimes
characters get lost when typing too fast at the serial input (pasting
strings in serial console window). Fix this by using INT_QUEUE for
polling the usb keyboard.
Soeren Moch [Thu, 27 Nov 2014 09:11:41 +0000 (10:11 +0100)]
sata: fix reset_sata for dwc_ahsata
- fix crash when sata device is not initialized
- remove disable_sata_clock() since it is not clear which clock for which
device should be disabled here
- call disable_sata_clock() for mx6 in preboot_os instead
Hector Palacios [Fri, 21 Nov 2014 16:54:43 +0000 (17:54 +0100)]
mxs_ocotp: check for errors from the OTP controller after writing
The write operation may fail when trying to write to a locked area. In
this case the ERROR bit is set in the CTRL register. Check for that
condition and return an error.
Hector Palacios [Fri, 21 Nov 2014 16:54:42 +0000 (17:54 +0100)]
mxs_ocotp: prevent error path from returning success
The code may goto 'fail' upon error with 'ret' variable set to an error
code, but this variable was being overwritten by a final preparation
function to restore the HCLK, so success was (in general) returned even
after an error was hit previously.
With this change, the function may now return success even if the final
preparation function fails, but it's probably enough to print a message
because (if successful) the real programming of the fuses has already
completed.
Guillaume GARDET [Thu, 20 Nov 2014 07:38:31 +0000 (08:38 +0100)]
imx: mx53loco: Add raw initrd support
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Liu <r64343@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
Masahiro Yamada [Wed, 26 Nov 2014 09:34:01 +0000 (18:34 +0900)]
usb: UniPhier: support OF configuration
If CONFIG_OF_CONTROL is defined, search device tree nodes that are
compatible with "panasonic,uniphier-ehci" and take the base address
from their "reg" property.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Marek Vasut <marex@denx.de>
Masahiro Yamada [Wed, 26 Nov 2014 09:33:58 +0000 (18:33 +0900)]
ARM: UniPhier: add dummy gpio.h to enable CONFIG_OF_CONTROL
If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled.
It includes <asm/gpio.h> and then <asm/gpio.h> includes
<asm/arch/gpio.h>. Consequently, all the SoCs that enable
CONFIG_OF_CONTROL must have <asm/arch/gpio.h> even if they do not
support GPIO.
In the first place, GPIO has nothing to do with OF_CONTROL.
It is wrong that lib/fdtdec.c includes GPIO functions; it should
be split into two files, FDT-common things and GPIO things.
It is, however, a pretty big work to fix that correctly.
This is a compromised commit to add a dummy <asm/arch/gpio.h>
to support OF_CONTROL for UniPhier platform. This dummy header
will be removed after FDT-GPIO stuff is fixed correctly.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Simon Glass <sjg@chromium.org>
The initramfs is currently only relocated if the user calls
the bootm ramdisk subcommand. If bootm should be used without
subcommands, the arch-specific bootm code needs to implement
the relocation.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
To get correct stack walking and backtrace functionality in gdb,
registers fp and ra should be initialized before calling board_init_f
or board_init_r. Thus allocating stack space and zeroing it as it is
currently done in board.c becomes obsolete.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Marek Vasut [Sat, 11 Oct 2014 16:42:52 +0000 (18:42 +0200)]
mtd: nand: s3c: Unify the register definition and naming
Merge struct s3c2410_nand and struct s3c2440_nand into one unified
struct s3c24x0_nand. While at it, fix up and rename the functions
to retrieve the NAND base address and fix up the s3c NAND driver to
reflect this change.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Vladimir Zapolskiy <vz@mleia.com>
Simon Glass [Thu, 16 Oct 2014 07:05:56 +0000 (01:05 -0600)]
buildman: Don't default to -e when building current source
We probably don't need to enable this option by default. It is useful to
display only failure boards (not errors) and it is easy to add -e if it
is required. Also update the docs.
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Albert Aribaud <albert.u.boot@aribaud.net>
Sanchayan Maity [Mon, 24 Nov 2014 05:33:59 +0000 (11:03 +0530)]
mtd/nand/vf610_nfc: Disable subpage writes
This patch disables subpage writes for vf610_nfc nand
driver. This is required, as without this fix, writing
unaligned u-boot images with DFU results in a hang.
Trying to write unalgined binary images also results
in a hang, without disabling subpage writes.
Masahiro Yamada [Thu, 13 Nov 2014 11:31:51 +0000 (20:31 +0900)]
mtd: denali: set some registers after nand_scan_ident()
Some but not all of implementations of the Denali NAND controller
have hardware circuits to detect the device parameters such as
page_size, erase_size, etc. Even on those SoCs with such hardware
supported, the hardware is known to detect wrong parameters for some
nasty (almost buggy) NAND devices. The device parameters detected
during nand_scan_ident() are more trustworthy.
This commit sets some hardware registers to mtd->pagesize,
mtd->oobsize, etc. in the code between nand_scan_ident() and
nand_scan_tail().
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Chin Liang See <clsee@altera.com>
Masahiro Yamada [Thu, 13 Nov 2014 11:31:50 +0000 (20:31 +0900)]
mtd: denali: use CONFIG_SYS_NAND_SELF_INIT
Some variants of the Denali NAND controller need some registers
set up based on the device information that has been detected during
nand_scan_ident().
CONFIG_SYS_NAND_SELF_INIT has to be defined to insert code between
nand_scan_ident() and nand_scan_tail(). It is also helpful to reduce
the difference between this driver and its Linux counterpart because
this driver was ported from Linux. Moreover, doc/README.nand recommends
to use CONFIG_SYS_NAND_SELF_INIT.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Chin Liang See <clsee@altera.com>