net: lpc32xx: fix ignored MDIO busy wait status on read
The change fixes PHY write operation, which incorrectly waits for
released busy state before issuing a write operation, this breaks
sequential write/read operation logic, because read operation
starts immediately on request and it completes, when busy state is
gone.
Instead of adding the second preceding busy state check to read
function, do busy state release check after issuing a write operation,
this method of operation is also recommended by the LPC32xx User's
Manual, see MII Mgmt Indicators Register notes:
For PHY Write if scan is not used:
1. Write 0 to MCMD
2. Write PHY address and register address to MADR
3. Write data to MWTD
4. Wait for busy bit to be cleared in MIND
Reported-by: Alexandre Messier <amessier@tycoint.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Alexandre Messier <amessier@tycoint.com>
The change updates DevKit3250 board powerd by NXP LPC3250 SoC:
* due to increased resulting U-boot image size give more space to
store loaded and relocated versions,
* add DMA support, which is used by NAND SLC driver,
* add NXP OHCI and PHY drivers to the image,
* add USB, JFFS and FAT commands.
For NXP LPC32xx boards the change enables SPL_DM option, this allows
to use any driver model UART driver in SPL images, hence a restriction
on HSUART in SPL image is removed and well as definitions for non-DM
NS16550 driver, its DM version is used instead.
Because SPL_DM requires malloc(), enable CONFIG_SPL_SYS_MALLOC_SIMPLE
for LPC32xx boards.
The change adds about 5KB to the resulting SPL image (for devkit3250
board SPL image is increased from 10672 to 15608 bytes).
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
arm: lpc32xx: switch serial console to driver model
On NXP LPC32xx platform for non-SPL builds the change adds
standard (NS16550) and high-speed UARTs to driver model.
Due to specific of DM NS16550 device description UART clock can not be
got in runtime and by default it is set to 13MHz, if board PERIPH_CLK
is different, this should be specified in board configuration file.
For SPL builds HSUARTs are disabled and non-DM NS16550 driver is
compiled, if needed.
The change also updates default configs of devkit3250 and work_92105
boards to reflect updates in platform files.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Mon, 14 Dec 2015 22:01:15 +0000 (15:01 -0700)]
test/fs: error case fixes/enhancements
- Use "mkdir -p" to avoid errors when intermediate directories are
missing.
- Fall back to "dd" when "fallocate" fails. For example, fallocate isn't
supported on ext4.
- Add error checking for test image generation. Without this, the test
simply plows on spewing all kinds of errors which are hard to
immediately root-cause.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tom Rini [Thu, 10 Dec 2015 21:42:21 +0000 (16:42 -0500)]
ext4_common.c: Clean up failure cases in alloc_triple_indirect_block
As noted by Coverity, when we have an error in
alloc_triple_indirect_block we will leak ti_pbuff_start_addr as it's not
being freed. Further inspection here shows that we could also leak
ti_cbuff_start_addr in one corner case so free that as well.
Reported-by: Coverity (CID 131205, 131206) Signed-off-by: Tom Rini <trini@konsulko.com>
Stephen Warren [Mon, 7 Dec 2015 18:38:50 +0000 (11:38 -0700)]
ums: support multiple LUNs at once
Extend the ums command to accept a list of block devices. Each of these
will be exported as a separate LUN. An example use-case would be:
ums 0 mmc 0,0.1,0.2
... which would export LUNs for eMMC 0's user data, boot0, and boot1 HW
partitions. This is useful since it allows the host access to everything
on the eMMC without having to somehow stop the ums command from executing
and restart it with different parameters.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Stephen Warren [Mon, 7 Dec 2015 18:38:49 +0000 (11:38 -0700)]
mmc: store hwpart in the block device
This will allow us to have multiple block device structs each referring
to the same eMMC device, yet different HW partitions.
For now, there is still a single block device per eMMC device. As before,
this block device always accesses whichever HW partition was most recently
selected. Clients wishing to make use of multiple block devices referring
to different HW partitions can simply take a copy of this block device
once it points at the correct HW partition, and use each one as they wish.
This feature will be used by the next patch.
In the future, perhaps get_device() could be enhanced to return a
dynamically allocated block device struct, to avoid the client needing to
copy it in order to maintain multiple block devices. However, this would
require all users to be updated to free those block device structs at some
point, which is rather a large change.
Most callers of mmc_switch_part() wish to permanently switch the default
MMC block device's HW partition. Enhance mmc_switch_part() so that it does
this. This removes the need for callers to do this. However,
common/env_mmc.c needs to save and restore the current HW partition. Make
it do this more explicitly.
Replace use of mmc_switch_part() with mmc_select_hwpart() in order to
remove duplicate code that skips the call if that HW partition is already
selected.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Stephen Warren [Mon, 7 Dec 2015 18:38:48 +0000 (11:38 -0700)]
block: pass block dev not num to read/write/erase()
This will allow the implementation to make use of data in the block_dev
structure beyond the base device number. This will be useful so that eMMC
block devices can encompass the HW partition ID rather than treating this
out-of-band. Equally, the existence of the priv field is crying out for
this patch to exist.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Albert ARIBAUD [Wed, 25 Nov 2015 16:56:33 +0000 (17:56 +0100)]
arm: move gd handling outside of C code
As of gcc 5.2.1 for Thumb-1, it is not possible any
more to assign gd from C code, as gd is mapped to r9,
and r9 may now be saved in the prolog sequence, and
restored in the epilog sequence, of any C functions.
Therefore arch_setup_gd(), which is supposed to set
r9, may actually have no effect, causing U-Boot to
use a bad address to access GD.
Fix this by never calling arch_setup_gd() for ARM,
and instead setting r9 in arch/arm/lib/crt0.S, to
the value returned by board_init_f_alloc_reserve().
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Simon Glass <sjg@chromium.org>
Albert ARIBAUD [Wed, 25 Nov 2015 16:56:32 +0000 (17:56 +0100)]
Fix board init code to respect the C runtime environment
board_init_f_mem() alters the C runtime environment's
stack it is actually already using. This is not a valid
behaviour within a C runtime environment.
Split board_init_f_mem into C functions which do not alter
their own stack and always behave properly with respect to
their C runtime environment.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Thomas Chou <thomas@wytron.com.tw>
The function hash_show is now only called by hash_command, so mark it as
static (and drop from hash.h). We only call hash_command when any of
CONFIG_CMD_CRC32, CONFIG_CMD_SHA1SUM or CONFIG_CMD_HASH are set. Since
hash.c is linked in unconditionally we must take extra care with
functions that bring in read-only strings as these will not be
discarded.
Masahiro Yamada [Thu, 17 Dec 2015 08:19:35 +0000 (17:19 +0900)]
image: check "bootm_low" and "bootm_size" if "initrd_high" is missing
To boot Linux, we should prevent Initramdisk and FDT from going too
high.
Currently, boot_relocate_fdt() checks "fdt_high" environment first,
and then falls back to getenv_bootm_mapsize() + getenv_bootm_low()
if "fdt_high" is missing.
On the other hand, boot_ramdisk_high() only checks "initrd_high" to
get the address limit for the Initramdisk. We also want to let this
case fall back to getenv_bootm_mapsize() + getenv_bootm_low().
Mugunthan V N [Wed, 23 Dec 2015 15:09:36 +0000 (20:39 +0530)]
dm: core: Add a new api to get indexed device address
Add new api to get device address based on index.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Jagan Teki <jteki@openedev.com>
[Rebased on master] Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Tue, 5 Jan 2016 08:14:26 +0000 (13:44 +0530)]
power: pmic.h: Drop include <spi.h>
include/power/pmic.h never used any generic spi code
from include/spi.h, but this has been added in below commit.
"dm: pmic: add implementation of driver model pmic uclass"
(sha1: 4d9057e82be11a862db411c4867e859fe0d4ca2a)
Adding functionalities in include/spi.h will trigger a build
issue as this been added used in include/power/pmic.h
Build issue on trats2 with adding BIT macro on spi.h:
----------------------------------------------------
CC lib/asm-offsets.s
In file included from include/power/pmic.h:15:0,
from include/power/max77686_pmic.h:11,
from include/configs/trats2.h:212,
from include/config.h:5,
from include/common.h:18,
from lib/asm-offsets.c:15:
include/spi.h: In function 'spi_w8r8':
include/spi.h:327:2: warning: implicit declaration of function 'BIT' [-Wimplicit-function-declaration]
Cc: Simon Glass <sjg@chromium.org> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
Mugunthan V N [Wed, 23 Dec 2015 15:09:49 +0000 (20:39 +0530)]
defconfig: am437x_sk_evm: enable spi driver model
enable spi driver model for am437x_sk_evm as ti_qspi supports
driver model
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
Mugunthan V N [Wed, 23 Dec 2015 15:09:46 +0000 (20:39 +0530)]
defconfig: dra74_evm: enable spi driver model
enable spi driver model for dra74_evm as ti_qspi supports
driver model
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
Mugunthan V N [Wed, 23 Dec 2015 15:09:45 +0000 (20:39 +0530)]
defconfig: dra72_evm: enable spi driver model
enable mmc driver model for dra72_evm as ti_qspi supports
driver model
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
Mugunthan V N [Wed, 23 Dec 2015 15:09:40 +0000 (20:39 +0530)]
drivers: spi: ti_qspi: convert driver to adopt device driver model
adopt ti_qspi driver to device driver model
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
Mugunthan V N [Wed, 23 Dec 2015 15:09:37 +0000 (20:39 +0530)]
spi: Add support for dual and quad mode
spi bus can support dual and quad wire data transfers for tx and
rx. So defining dual and quad modes for both tx and rx. Also add
support to parse bus width used for spi tx and rx transfers.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Mugunthan V N [Wed, 23 Dec 2015 15:09:34 +0000 (20:39 +0530)]
drivers: spi:ti_qspi: change ti_qspi_slave to ti_qspi_priv for driver model conversion
Changing the ti_qspi_priv structure and its instance names from
to priv for driver mode conversion.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
Mugunthan V N [Wed, 23 Dec 2015 15:09:33 +0000 (20:39 +0530)]
drivers: spi: ti_qspi: do not hard code chip select for memory map configuration
To enable memory map in dra7xx, specific chip select must be
written to control module register. But this hard coded to chip
select 1, fixing it by writing the specific chip select value to
control module register.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 28 Dec 2015 17:25:50 +0000 (22:55 +0530)]
spi: Add SPI_TX_DUAL mode
Added SPI_TX_DUAL mode flag.
Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Tue, 29 Dec 2015 06:42:30 +0000 (12:12 +0530)]
spi: Minor cleanup
- Add comments on mode_rx
- Tab space's
Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 28 Dec 2015 16:54:08 +0000 (22:24 +0530)]
spi: Use BIT macro
Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n
Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Wed, 16 Dec 2015 10:21:06 +0000 (15:51 +0530)]
spi: Fix bit assignment with flags
Fixed bit assignment with flags members on spi_slave{}
Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 28 Dec 2015 16:53:14 +0000 (22:23 +0530)]
spi: Move flags macro's to spi_slave{} members
This patch moves flags macro's to respective member
position on spi_slave{}, for better readabilty and
finding the respective member macro's easily.
Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Wed, 16 Dec 2015 09:54:24 +0000 (15:24 +0530)]
spi: Rename op_mode_rx to mode_rx
Since spi rx mode macro's are renamed to simple and
meaninfull, this patch will rename the respective
structure members.
Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Wed, 16 Dec 2015 09:31:23 +0000 (15:01 +0530)]
spi: Remove SPI_OPM_RX_DIO|QIOF
SPI_OPM_RX_DIO and SPI_OPM_RX_QIOF are rx IO
commands/opmodes for dual and quad. Usually IO
operation's are referred to flash protocol rather
with spi controller protocol, these are still present
in flash side for the usage of spi-nor controllers.
Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Wed, 16 Dec 2015 09:23:59 +0000 (14:53 +0530)]
spi: Remove SPI_OPM_RX_EXTN
SPI_OPM_RX_EXTN is a combination of all rx opmode's
and spi driver shall use any one of the rx mode at
a time not the combination and it is true in case of
flash where spi_flash_table mention combination of
supported read opmodes so-that the required one
will pick based on the rx mode from spi driver.
Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Wed, 16 Dec 2015 08:18:08 +0000 (13:48 +0530)]
sf: Write quad bit along with read status
While setting quad bit on spansion, macronix code
is writing only particular quad bit this may give
wrong functionality with other register bits,
So this patch fix the issue where it with write
previous read reg status along particular quad bit.
Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Tue, 15 Dec 2015 07:12:02 +0000 (12:42 +0530)]
sf: Read back and check once macronix quad bit set
One macronix quad bit set using SR, it's good to
read back and check the written bit and also if
it's already been set check for the bit and return.
Cc: Vignesh R <vigneshr@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Tue, 15 Dec 2015 06:58:39 +0000 (12:28 +0530)]
sf: Read back and check once spansion quad bit set
One spansion quad bit set using CR, it's good to
read back and check the written bit and also if
it's already been set check for the bit and return.
Cc: Vignesh R <vigneshr@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 14 Dec 2015 12:45:39 +0000 (18:15 +0530)]
sf: Fix quad bit set for micron devices
Setting up quad bit for micron devices need to do the
same way as other flash devices like spansion, winbond
etc does using enhanced volatile config register so this
patch adds this support instead of printing "QEB is volatile"
Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Peter Pan <peterpandong@micron.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Sun, 13 Dec 2015 14:40:33 +0000 (20:10 +0530)]
spi: Use mode instead of op_mode_tx
Used mode member from spi_slave{} instead of op_mode_tx.
Cc: Simon Glass <sjg@chromium.org> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 14 Dec 2015 06:45:17 +0000 (12:15 +0530)]
spi: make mode visible to both dm and non-dm
Couldn't find the exact reason to define 'mode' for dm,
probably it is not using in non-dm drivers but it need
to visible both dm and non-dm as mode data is getting
dereferred in spi flash core ie common to both.
Cc: Simon Glass <sjg@chromium.org> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Sat, 12 Dec 2015 06:21:57 +0000 (11:51 +0530)]
sf: Get spi locally from spi_flash
For better code readabilty, get the spi pointer from
spi_flash{} locally and use it instead of direct
dereferring spi pinter as flash->spi->*
Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Nathan Rossi [Thu, 7 Jan 2016 17:00:47 +0000 (03:00 +1000)]
arm: mvebu: Select SPL_DM_SEQ_ALIAS
Select SPL_DM_SEQ_ALIAS which is required for certain uclasses,
specifically SPI Flash.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tom Rini [Tue, 8 Dec 2015 03:26:34 +0000 (22:26 -0500)]
sandbox: eth-raw-os.c: Ensure that our interface name is not too long
Coverity notes that we do not ensure when we copy ifname we still have
space left to ensure NULL termination. As cannot control the size of
ifr_name we must make sure that our argument will not overflow the
buffer.
Reported-by: Coverity (CID 131094) Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stefan Roese [Mon, 14 Dec 2015 15:18:15 +0000 (16:18 +0100)]
dm: core: Add option to configure an offset for the address translation
Some platforms need to ability to configure an offset to the standard
addresses extracted from the device-tree. This patch allows this by
adding a function to DM to configure this offset (if needed).
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org>
Fixed space before tab: Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 14 Dec 2015 04:37:00 +0000 (21:37 -0700)]
rockchip: Use the debug UART on rk3036
Rather than using a new debug UART implementation, use the standard one
provided by U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Simon Glass [Sun, 29 Nov 2015 20:18:10 +0000 (13:18 -0700)]
dm: net: usb: Refactor mcs7830 driver ready for DM conversion
Remove stamp data and create common functions for the main Ethernet
operations. This will make it easier to convert this driver to support
driver model.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Glass [Sun, 29 Nov 2015 20:18:09 +0000 (13:18 -0700)]
pci: Tidy up comments in pci_bind_bus_devices()
The current comments are confusing. We don't actually bind a generic device
when the device tree has no information. We try to scan available PCI
drivers. Update the comments to reflect this.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 29 Nov 2015 20:18:08 +0000 (13:18 -0700)]
dm: Convert PCI MMC over to use DM PCI API
At present pci_mmc_init() does not correctly use the PCI function since the
list it passes is not terminated. The array size passed to pci_mmc_init() is
actually not used correctly. Fix this and adjust the pci_mmc_init() to scan
all available MMC devices.
Adjust this code to use the new driver model PCI API.
This should move over to the new MMC uclass at some point.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 29 Nov 2015 20:17:55 +0000 (13:17 -0700)]
dm: x86: ivybridge: Convert graphics init to use DM PCI API
Use the driver-model PCI functions here where possible. For now we have to
search for the device with pci_bus_find_bdf() but at some point we can put
this in a proper driver and avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 29 Nov 2015 20:17:54 +0000 (13:17 -0700)]
dm: serial: Convert ns16550 driver to use driver model PCI API
Use the driver model version of the function to find the BAR. This updates
the fdtdec function, of which ns16550 is the only user.
The fdtdec_get_pci_bdf() function is dropped for several reasons:
- with driver model we should use 'struct udevice *' rather than passing the
device tree offset explicitly
- there are no other users in the tree
- the function parses for information which is already available in the PCI
device structure (specifically struct pci_child_platdata which is available
at dev_get_parent_platdata(dev)
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 29 Nov 2015 20:17:49 +0000 (13:17 -0700)]
dm: pci: Use driver model PCI API in auto-config
At present we are using legacy functions even in the auto-configuration code
used by driver model. Add a new pci_auto.c version which uses the correct
API.
Create a new pci_internal.h header to hold functions that are used within
the PCI subsystem, but are not exported to other drivers.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 29 Nov 2015 20:17:48 +0000 (13:17 -0700)]
dm: pci: Add a dm_ prefix to pci_bus_find_bdf()
Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we
will drop that prefix.
For consistency, we should use the dm_ prefix for all driver model
functions. Update pci_bus_find_bdf() accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 29 Nov 2015 20:17:47 +0000 (13:17 -0700)]
dm: pci: Add a dm_ prefix to pci_get_bdf()
Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we
will drop that prefix.
For consistency, we should use the dm_ prefix for all driver model
functions. Update pci_get_bdf() accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>