Alexey Firago [Thu, 26 May 2016 13:28:44 +0000 (16:28 +0300)]
net: phy: micrel: add support for KSZ886x switches in MIIM mode
This patch adds a phy driver for the Micrel KSZ886x switches.
Similarly to the KSZ8895, SoC MAC is directly connected to the switch
MAC on the switch CPU port, so the link to the switch is always up.
KSZ886x switches can be used in the following configuration modes:
- Unmanaged mode with config stored in external EEPROM
- Managed mode over SPI
- Managed mode over I2C
- Managed mode over mdio/mdc (aka MIIM or SMI)
This patch supports only unmanaged and MIIM modes.
Based on Micrel KSZ886x driver from Linux kernel and
Micrel KSZ8895 driver from U-Boot.
Verified with the KSZ8863MLL.
Signed-off-by: Alexey Firago <alexey_firago@mentor.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Stephen Warren [Tue, 26 Apr 2016 21:29:00 +0000 (15:29 -0600)]
net: rtl8169: fix switching between adapters
The rtl8169 driver uses a global variable to store the register address
of the adapter being operated upon. This is updated to point at the
correct adapter when sending or receiving a packet, or shutting down the
adapter, but not when initializing the adapter. Consequently, switching
between different adapters within the same U-Boot runtime does not work
correctly since the driver programs the wrong registers during
rtl8169_eth_start() -> rtl8169_common_start() -> rtl8169_hw_start().
Note that since rtl8169_eth_stop() does set the global variable, the
second consecutive attempt to use the "new" adapter did work even before
this patch, because each time network usage is shut down, the network
core calls stop, which sets the variable so that the next start does
actually initialize the hardware, and the adapter works.
Equally, rtl8169_eth_probe() calls rtl_init() which sets the global, so
if using only a single device, or if picking the "right" device (based on
probe order) when multiple devices are present, ioaddr will already be set
correctly from the get-go, so the issue does not occur.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Hans de Goede [Mon, 20 Jun 2016 21:16:28 +0000 (23:16 +0200)]
Kconfig: Add a new DISTRO_DEFAULTS Kconfig option
DISTRO_DEFAULTS is intended to mirror / replace
include/config_distro_defaults.h.
The intend is for boards which include this file to select this from
their Kconfig files and when moving setting to Kconfig which are #define-ed
in config_distro_defaults.h to select this from DISTRO_DEFAULTS so that
boards which have selected DISTRO_DEFAULTS will keep the same configuration
as before without needing any defconfig file changes.
The initial list of selected things matches all settings recently removed
from config_distro_defaults.h because they have been converted to Kconfig,
with the exception of CMD_ELF and CMD_NET, which have a default of y, if
the default of these ever changes they should be selected by DISTRO_DEFAULTS
too.
For testing and example purposes this commit also converts ARCH_SUNXI
to use DISTRO_DEFAULT instead of selecting everything it needs itself.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Tue, 7 Jun 2016 02:54:34 +0000 (10:54 +0800)]
sunxi: Add PSCI implementation in C
To make the PSCI backend more maintainable and easier to port to newer
SoCs, rewrite the current PSCI implementation in C.
Some inline assembly bits are required to access coprocessor registers.
PSCI stack setup is the only part left completely in assembly. In theory
this part could be split out of psci_arch_init into a separate common
function, and psci_arch_init could be completely in C.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Tue, 7 Jun 2016 02:54:31 +0000 (10:54 +0800)]
sunxi: Group cpu core related controls together
Instead of listing individual registers for controls to each processor
core, list them as an array of registers. This makes accessing controls
by core index easier.
Also rename "cpucfg_sun6i.h" (which was unused anyway) to the more generic
"cpucfg.h", and add packed attribute to struct sunxi_cpucfg.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Tue, 7 Jun 2016 02:54:27 +0000 (10:54 +0800)]
ARM: allocate extra space for PSCI stack in secure section during link phase
The PSCI implementation expects at most 2 pages worth of space reserved
at the end of the secure section for its stacks. If PSCI is relocated to
secure SRAM, then everything is fine. If no secure SRAM is available,
and PSCI remains in main memory, the reserved memory space doesn't cover
the space used by the stack.
If one accesses PSCI after Linux has fully booted, the memory that should
have been reserved for the PSCI stacks may have been used by the kernel
or userspace, and would be corrupted. Observed after effects include the
system hanging or telinit core dumping when trying to reboot. It seems
the init process gets hit the most on my test bed.
This fix allocates the space used by the PSCI stacks in the secure
section by skipping pages in the linker script, but only when there is
no secure SRAM, to avoid bloating the binary.
This fix is only a stop gap. It would be better to rework the stack
allocation mechanism, maybe with proper usage of CONFIG_ macros and an
explicit symbol.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Tue, 7 Jun 2016 02:54:24 +0000 (10:54 +0800)]
ARM: PSCI: use only r0 and r3 in psci_get_cpu_stack_top()
For psci_get_cpu_stack_top() to be usable in C code, it must adhere to
the ARM calling conventions. Since it could be called when the stack
is still unavailable, and the entry code to linux also expects r1 and
r2 to remain unchanged, stick to r0 and r3.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Sun, 12 Jun 2016 09:57:07 +0000 (11:57 +0200)]
sunxi: Revert "sunxi: make SoC variant choice mandatory"
This reverts commit 1a5f0de08e86("sunxi: make SoC variant choice
mandatory").
With the optional marking in the Kconfig "make savedefconfig"
will drop CONFIG_MACH_SUN4I=y from all the A10 boards, making it
hard to see at a glance which family of sunxi chips the defconfig
is for.
This commit therefore restores the optional, and restores
CONFIG_MACH_SUN4I=y to all defconfig's which had it dropped
because of this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sun, 12 Jun 2016 17:44:42 +0000 (19:44 +0200)]
sunxi: Add defconfig and dts file for inet86dz board
The inet86dz board is a board used in 7" tablets from various oems.
These tablets are a23 based 7" tablets featuring a 1024x600 LCD,
512MB RAM, 4G NAND, rtl8188etv usb wifi, gsl1680 touchschreen,
micro-sd slot, 3.5mm headphone jack and a micro-usb otg connector
which doubles as charging port.
The dts file this commit adds is identical to the one submitted to
the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 11 Jun 2016 13:19:38 +0000 (15:19 +0200)]
sunxi: Add defconfig and dts file for Polaroid MID2407PXE03 tablet
The Polaroid MID2407PXE03 is an a23 based 7" tablet based on a M86_MB V2.0
PCB, featuring a 800x480 LCD, 512MB RAM, 4G NAND, esp8089 wifi, gsl1680
touchschreen, micro-sd slot, 3.5mm headphone jack and a micro-usb otg
connector which doubles as charging port.
The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Masahiro Yamada [Mon, 20 Jun 2016 08:33:39 +0000 (17:33 +0900)]
autoboot: add CONFIG_AUTOBOOT to allow to not compile autoboot.c
Since commit bb597c0eeb7e ("common: bootdelay: move CONFIG_BOOTDELAY
into a Kconfig option"), CONFIG_BOOTDELAY is defined for all boards.
Prior to that commit, it was allowed to unset CONFIG_BOOTDELAY to
not compile common/autoboot.c, as described in common/Makefile:
# This option is not just y/n - it can have a numeric value
ifdef CONFIG_BOOTDELAY
obj-y += autoboot.o
endif
It was a bit odd to enable/disable code with an integer type option,
but it was how this option worked before that commit, and several
boards actually unset it to opt out of the autoboot feature.
This commit adds a new bool option, CONFIG_AUTOBOOT, and makes
CONFIG_BOOTDELAY depend on it.
I chose "default y" for this option because most boards use the
autoboot. I added "# CONFIG_AUTOBOOT is not set" for the boards that
had not set CONFIG_BOOTDELAY prior to the bad commit.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
[scottwood: fix usage to show size as optional, and add misssing braces] Signed-off-by: Scott Wood <oss@buserror.net>
Boris Brezillon [Mon, 6 Jun 2016 08:17:02 +0000 (10:17 +0200)]
spl: nand: sunxi: add support for NAND config auto-detection
NAND chips are supposed to expose their capabilities through advanced
mechanisms like READID, ONFI or JEDEC parameter tables. While those
methods are appropriate for the bootloader itself, it's way to
complicated and takes too much space to fit in the SPL.
Replace those mechanisms by a dumb 'trial and error' mechanism.
With this new approach we can get rid of the fixed config list that was
used in the sunxi NAND SPL driver.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
Boris Brezillon [Mon, 6 Jun 2016 08:17:01 +0000 (10:17 +0200)]
spl: nand: sunxi: split 'load page' and 'read page' logic
Split the 'load page' and 'read page' logic in 2 different functions so
we can later load the page and test different ECC configs without the
penalty of reloading the same page in the NAND cache.
We also move common setup to a dedicated function (nand_apply_config()) to
avoid rewriting the same values in NFC registers each time we read a page.
These new functions are passed a pointer to an nfc_config struct to limit
the number of parameters.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
Boris Brezillon [Mon, 6 Jun 2016 08:17:00 +0000 (10:17 +0200)]
spl: nand: sunxi: rework status polling loop
check_value_xxx() helpers are using a 1ms delay between each test, which
can be quite long for some operations (like a page read on an SLC NAND).
Since we don't have anything to do but to poll this register, reduce the
delay between each test to 1us.
While we're at it, rename the max_number_of_retries parameters and the
MAX_RETRIES macro into timeout_us and DEFAULT_TIMEOUT_US to reflect that
we're actually waiting a given amount of time and not only a number of
retries.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
Boris Brezillon [Mon, 6 Jun 2016 08:16:59 +0000 (10:16 +0200)]
spl: nand: sunxi: stop guessing the redundant u-boot offset
Use CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND value instead of trying to guess
where the redundant u-boot image is based on simple (and most of the time
erroneous) heuristics.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
# Conflicts:
# drivers/mtd/nand/sunxi_nand_spl.c
Boris Brezillon [Mon, 6 Jun 2016 08:16:58 +0000 (10:16 +0200)]
spl: nand: support redundant u-boot image
On modern NAND it's more than recommended to have a backup copy of the
u-boot binary to recover from corruption: bitflips are quite common on
MLC NANDs, and the read-disturbance will corrupt your u-boot partitition
more quickly than what you would see on an SLC NAND.
Add an extra Kconfig option to specify the offset of the redundant u-boot
image.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
[scottwood: added ifdef to fix build break] Signed-off-by: Scott Wood <oss@buserror.net>
The SYS_NAND_U_BOOT_OFFS is quite generic, but the Kconfig entry is forced
to explicitly depend on platforms that are not already defining it in their
include/configs/<board>.h header.
Add the SYS_NAND_U_BOOT_LOCATIONS option, make the SYS_NAND_U_BOOT_OFFS
depends on it, remove the dependency on NAND_SUNXI and make it dependent
on SPL selection.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
Boris Brezillon [Mon, 6 Jun 2016 08:16:56 +0000 (10:16 +0200)]
spl: nand: sunxi: remove support for so-called 'syndrome' mode
The sunxi SPL NAND controller driver supports use 'BootROM'-like configs,
that is, configs where the ECC bytes and real data are interleaved in the
page instead of putting ECC bytes in the OOB area.
Doing that has several drawbacks:
- since you're interleaving data and ECC bytes you can't use the whole page
otherwise you might override the bad block marker with non-FF bytes.
- to solve the bad block marker problem, the ROM code supports partially
using the page, but this introduces a huge penalty both in term of read
speed and NAND memory usage. While this is fine for rather small
binaries(like the SPL one which is at maximum 24KB large), it becomes
non-negligible for the bootloader image (several hundred of KB).
- auto-detection of the page size is not reliable (this is in my opinion
the biggest problem). If you get the page size wrong, you'll end up
reading data at a different offset than what was specified by the caller
and the reading may succeed (if valid data were written at this address).
For all those reasons I think it's wiser to completely remove support for
'syndrome' configs. If we ever need to support it again, then I'd recommend
specifying all the config parameters through Kconfig options.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
Stephen Warren [Fri, 17 Jun 2016 15:44:00 +0000 (09:44 -0600)]
clk: convert API to match reset/mailbox style
The following changes are made to the clock API:
* The concept of "clocks" and "peripheral clocks" are unified; each clock
provider now implements a single set of clocks. This provides a simpler
conceptual interface to clients, and better aligns with device tree
clock bindings.
* Clocks are now identified with a single "struct clk", rather than
requiring clients to store the clock provider device and clock identity
values separately. For simple clock consumers, this isolates clients
from internal details of the clock API.
* clk.h is split so it only contains the client/consumer API, whereas
clk-uclass.h contains the provider API. This aligns with the recently
added reset and mailbox APIs.
* clk_ops .of_xlate(), .request(), and .free() are added so providers
can customize these operations if needed. This also aligns with the
recently added reset and mailbox APIs.
* clk_disable() is added.
* All users of the current clock APIs are updated.
* Sandbox clock tests are updated to exercise clock lookup via DT, and
clock enable/disable.
* rkclk_get_clk() is removed and replaced with standard APIs.
Buildman shows no clock-related errors for any board for which buildman
can download a toolchain.
test/py passes for sandbox (which invokes the dm clk test amongst
others).
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Fri, 17 Jun 2016 15:43:59 +0000 (09:43 -0600)]
reset: implement a reset test
This adds a sandbox reset implementation (provider), a test client
device, instantiates them both from Sandbox's DT, and adds a DM test
that excercises everything.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Fri, 17 Jun 2016 15:43:58 +0000 (09:43 -0600)]
Add a reset driver framework/uclass
A reset controller is a hardware module that controls reset signals that
affect other hardware modules or chips.
This patch defines a standard API that connects reset clients (i.e. the
drivers for devices affected by reset signals) to drivers for reset
controllers/providers. Initially, DT is the only supported method for
connecting the two.
The DT binding specification (reset.txt) was taken from Linux kernel
v4.5's Documentation/devicetree/bindings/reset/reset.txt.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Fri, 17 Jun 2016 15:43:57 +0000 (09:43 -0600)]
mailbox: add Tegra186 HSP driver
Tegra186's HSP module implements doorbells, mailboxes, semaphores, and
shared interrupts. This patch provides a driver for HSP, and hooks it
into the mailbox API. Currently, only doorbells are supported.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
Robert P. J. Day [Mon, 23 May 2016 09:40:55 +0000 (05:40 -0400)]
lib/libfdt/: General aesthetic/style fixes.
A number of style fixes across the files in this directory, including:
* Correct invalid kernel-doc content.
* Tidy up massive comment in fdt_region.c.
* Use correct spelling of "U-Boot".
* Replace tests of "! <var>" with "!<var>".
* Replace "libfdt_env.h" with <libfdt_env.h>.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Acked-by: Simon Glass <sjg@chromium.org>
A bug in the pca953x driver prevents correct reading of GPIO input
values beyond the 8th GPIO; all values are reported as zero. Setting of
GPIO output values is not affected.
This patch fixes the reading behavior.
Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Peng Fan <van.freenix@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Fri, 17 Jun 2016 10:24:29 +0000 (19:24 +0900)]
ARM: uniphier: reserve memory for DRAM PHY training on PH1-LD20
The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters
periodically. This compensates for the voltage and temperature
deviation and improves the PHY parameter adjustment. Instead, it
requires 64 byte scratch memory in each DRAM channel for the dynamic
training. The memory regions must be reserved in DT before jumping
to the kernel.
The scratch area can be anywhere in each DRAM channel, but the DRAM
init code in SPL currently assigns it at the end of each channel.
So, it makes sense to reserve the regions on run-time by U-Boot
instead of statically embedding it in the DT in Linux. Anyway,
a boot-loader should know much more about memory initialization
than the kernel.
Masahiro Yamada [Wed, 15 Jun 2016 05:46:09 +0000 (14:46 +0900)]
ARM: uniphier: change CPU_RELEASE_ADDR to the head of DRAM space
At first, 256 byte of the head of DRAM space was reserved for some
reasons. However, as the progress of development, it turned out
unnecessary, and it was never used in the end. Move the CPU release
address to leave no space.
Guillaume GARDET [Fri, 17 Jun 2016 09:45:37 +0000 (11:45 +0200)]
fs: cbfs: Fix build of fs/cbfs/cbfs.c when building u-boot sandbox on x86 32-bit
Fix the following build errors when building sandbox on x86 32-bit:
In file included from fs/cbfs/cbfs.c:8:0:
include/malloc.h:364:7: error: conflicting types for 'memset'
void* memset(void*, int, size_t);
^
In file included from include/compiler.h:123:0,
from include/cbfs.h:10,
from fs/cbfs/cbfs.c:7:
include/linux/string.h:78:15: note: previous declaration of 'memset' was here
extern void * memset(void *,int,__kernel_size_t);
^
In file included from fs/cbfs/cbfs.c:8:0:
include/malloc.h:365:7: error: conflicting types for 'memcpy'
void* memcpy(void*, const void*, size_t);
^
In file included from include/compiler.h:123:0,
from include/cbfs.h:10,
from fs/cbfs/cbfs.c:7:
include/linux/string.h:81:15: note: previous declaration of 'memcpy' was here
extern void * memcpy(void *,const void *,__kernel_size_t);
^
scripts/Makefile.build:280: recipe for target 'fs/cbfs/cbfs.o' failed
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Thu, 16 Jun 2016 18:59:34 +0000 (12:59 -0600)]
test/py: fix printenv signon message disable code
CONFIG_VERSION_VARIABLE isn't always defined, so we can't simply look up
its value directly, or an exception will occur if it isn't defined.
Instead, we must use .get() to supply a default value if the variable
isn't defined.
Fixes: da37f006e7c5 ("tests: py: disable main_signon check for printenv cmd") Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Peng Fan [Wed, 15 Jun 2016 06:18:39 +0000 (14:18 +0800)]
imx: mx6ulevk: change QSPI PAD DSE to 120ohm
The current pad DSE for QSPI is 60ohm. This setting cause
too strong drive to clock and data signals. Need to change
the DSE to 120ohm for better signal quality.
Ye Li [Wed, 15 Jun 2016 06:18:36 +0000 (14:18 +0800)]
mx7dsabresd: Fix LCD_PWR_EN output setting
LCD_PWR_EN controls the G pin of Q13 PMOS which needs low voltage to connect
D to S for outputting LCD 3.3V. If LCD_PWR_EN is high, we measured the LCD 3v3
is actually 1.2V.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Peng Fan [Wed, 15 Jun 2016 05:15:46 +0000 (13:15 +0800)]
usb: ehci: only shutdown opened controller
If the usb controller is not running, no need to shutdown it,
otherwise `usb stop` complains about:
"EHCI failed to shut down host controller".
To i.MX7D SDB, there are two usb ports, one Host, one OTG.
If we only plug one udisk to the Host port and then `usb start`,
the OTG controller for OTG port does not run actually. Then,
if `usb stop`, the OTG controller for OTG port will also be
shutdown, but it is not running.
This patch adds a check to only shutdown the running controller.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: "Stefan Brüns" <stefan.bruens@rwth-aachen.de> Cc: Stephen Warren <swarren@nvidia.com>
Peng Fan [Fri, 17 Jun 2016 06:18:11 +0000 (14:18 +0800)]
cmd: usb: check if_type before using this device
For legacy usb storage driver, USB_MAX_STOR_DEV is defined as 7.
If we only have one usb disk on board, `usb dev 0` is ok.
But if `usb dev 1`, still ok, then `usb read xxx` will trigger
system fault and reboot.
So check if_type before using this device.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stephen Warren <swarren@nvidia.com>
Sriram Dash [Mon, 13 Jun 2016 04:28:35 +0000 (09:58 +0530)]
armv8/ls2080: Remove workaround for erratum A008751
This errata a008751 is applied on Soc specific file currently.This will be
moved to a file where all the errata implementation will take place for usb
for fsl. This patch removes the errata workaround from soc specific file
for LS2080.
Sriram Dash [Mon, 13 Jun 2016 04:28:34 +0000 (09:58 +0530)]
fsl: usb: make errata function common for PPC and ARM
This patch does the following things:
1. Makes the errata checking code common for PPC and ARM
2. Moves all these static inline functions into a dedicated C file
Lokesh Vutla [Fri, 10 Jun 2016 04:05:42 +0000 (09:35 +0530)]
board: am57xx: Rename TARGET_BEAGLE_X15 as TARGET_AM57XX_EVM
board/am57xx supports all boards based on am57xx. Rename the taget
as TARGET_AM57XX_EVM.
Fixes: 74cc8b097d9af ("board: ti: beagle_x15: Rename to indicate support for TI am57xx evms") Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Eddy Petrișor [Sun, 5 Jun 2016 00:43:00 +0000 (03:43 +0300)]
armv8: s32v234: Introduce basic support for s32v234evb
Add initial support for NXP's S32V234 SoC and S32V234EVB board.
The S32V230 family is designed to support computation-intensive applications
for image processing. The S32V234, as part of the S32V230 family, is a
high-performance automotive processor designed to support safe
computation-intensive applications in the area of vision and sensor fusion.
The Linflex module is integrated on some NXP automotive SoCs part of the former
Freescale portfolio, like S32V234, an SoC for Advanced Driver Assistance
Systems.
projects / u-boot / log