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6 years agoboard: ti: am574x-idk: Add ddr data support
Lokesh Vutla [Fri, 29 Dec 2017 06:17:54 +0000 (11:47 +0530)]
board: ti: am574x-idk: Add ddr data support

AM574x-idk has the following DDR parts attached:
EMIF1: MT41K256M16HA (1GB with ECC)
EMIF2: MT41K256M16HA (1GB without ECC)

Enabling 2GB DDR without interleaving between EMIFs. And
enabling ECC on EMIF1.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
6 years agoboard: ti: am574x-idk: Add hw data support
Lokesh Vutla [Fri, 29 Dec 2017 06:17:53 +0000 (11:47 +0530)]
board: ti: am574x-idk: Add hw data support

Update prcm, voltages and pinmux support for am574x-idk.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
6 years agoboard: ti: am574x-idk: Add epprom support
Lokesh Vutla [Fri, 29 Dec 2017 06:17:52 +0000 (11:47 +0530)]
board: ti: am574x-idk: Add epprom support

am574x-idk is a board based on TI's am574 processor
Add eeprom support.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
6 years agoarm: dra762: Add support for device package identification
Lokesh Vutla [Fri, 29 Dec 2017 06:17:51 +0000 (11:47 +0530)]
arm: dra762: Add support for device package identification

DRA762 comes in two packages:
- ABZ: Pin compatible package with DRA742 with DDR@1333MHz
- ACD: High performance(OPP_PLUS) package with new IPs

Both the above packages uses the same IDCODE hence needs to
differentiate using package information in DIE_ID_2.
Add support for the same. Also update clock, ddr, emif information.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
6 years agocmd: ti: Generalize cmd_ddr3 command
Lokesh Vutla [Fri, 29 Dec 2017 06:17:50 +0000 (11:47 +0530)]
cmd: ti: Generalize cmd_ddr3 command

Keystone and DRA7 based TI platforms uses same
EMIF memory controller. cmd_ddr3 command is customized
for keystone platforms, make it generic so that it can
be re used for DRA7  platforms.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
6 years agoarm: keystone: Move cmd_ddr3 to a common place
Lokesh Vutla [Fri, 29 Dec 2017 06:17:49 +0000 (11:47 +0530)]
arm: keystone: Move cmd_ddr3 to a common place

Move cmd_ddr3 to cmd/ti in order to make
it build for non-keystone TI platforms.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Rename to ddr3.c not cmd_ddr3.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoarm: emif-common: Add suppport for enabling ECC
Lokesh Vutla [Fri, 29 Dec 2017 06:17:48 +0000 (11:47 +0530)]
arm: emif-common: Add suppport for enabling ECC

For data integrity, the EMIF1 supports ECC on the data
written or read from the SDRAM. Add support for enabling
ECC support in EMIF1.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
6 years agoarm: emif-common: Add ecc specific emif registers
Lokesh Vutla [Fri, 29 Dec 2017 06:17:47 +0000 (11:47 +0530)]
arm: emif-common: Add ecc specific emif registers

This is a slight difference in emif_ddr_phy_status register offsets for
DRA7xx EMIF and older versions. And ecc registers are available only
in DRA7xx EMIC. Add support for this difference and ecc registers.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
6 years agodrivers: dma: ti-edma3: add support for memory fill
Tero Kristo [Fri, 29 Dec 2017 06:17:46 +0000 (11:47 +0530)]
drivers: dma: ti-edma3: add support for memory fill

Add support for simple memory fill operation. With large data sizes
it is much faster to use EDMA for memory fill rather than CPU.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
6 years agodt-bindings: leds: adopt Linux PCA9532 binding constants
Felix Brack [Thu, 28 Dec 2017 17:06:50 +0000 (18:06 +0100)]
dt-bindings: leds: adopt Linux PCA9532 binding constants

I'm working on a v2 patch to add support for a board named pdu001. Its
Linux DTS file uses the include file added by this patch. To keep Linux
and U-Boot DTS files in sync U-Boot requires a copy of this file,
although there is no driver for NXP's PCA9532 i2c LED driver chip (yet).

Signed-off-by: Felix Brack <fb@ltec.ch>
6 years agoboard: ti: k2g: Make ddr3* declarations as static
Lokesh Vutla [Thu, 28 Dec 2017 15:10:03 +0000 (20:40 +0530)]
board: ti: k2g: Make ddr3* declarations as static

All ddr3_emif declarations are not used outside ddr3_k2g.c
file. So make all of them as static.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agoboard: ti: dra76: mux wakeup2 as gpio1_2
Tomi Valkeinen [Thu, 28 Dec 2017 15:10:02 +0000 (20:40 +0530)]
board: ti: dra76: mux wakeup2 as gpio1_2

gpio1_2 is used for HPD interrupt with DRA76's DVI add-on board, so mux
the pin as gpio and PIN_INPUT.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
6 years agoarm: am33xx: Avoid writing into reserved DPLL divider
Lokesh Vutla [Thu, 28 Dec 2017 15:10:01 +0000 (20:40 +0530)]
arm: am33xx: Avoid writing into reserved DPLL divider

DPLL DRR doesn't have an M4 divider. But the clock driver is trying
to configure M4 divider as 4(writing into a reserved register).
Fixing it by making M4 divider as -1.

Reported-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
6 years agotools: omapimage: Fix mismatch of image size in header
Lokesh Vutla [Thu, 28 Dec 2017 15:10:00 +0000 (20:40 +0530)]
tools: omapimage: Fix mismatch of image size in header

The size field in GP header that is expected by ROM is size of the
image + size of the header. But omapimage tool is updating size
as image size + 2 * header size. Remove this extra header size bytes.

Reported-by: Denys Dmytriyenko <denys@ti.com>
Debugged-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
6 years agoboard: ti: K2G FC SoC 1GHz and DDR3 1066 MT/s support
Rex Chang [Thu, 28 Dec 2017 15:09:59 +0000 (20:39 +0530)]
board: ti: K2G FC SoC 1GHz and DDR3 1066 MT/s support

Added support for K2G EVM with FlipChip SoC of which
ARM/DDR3 runs at 1GHz/1066 MT/s. The patch is also
backward compatible with old revision EVM and EVM
with WireBond SoC. Their ARM/DDR3 run at 600MHz/800 MT/s.

The new SoC supports 2 different speeds at 1GHz and 600MHz.
Modyfied the CPU Name to show which SoC is used in the EVM.
Modified the DDR3 configuration to reflect New SoC supports
2 different CPU and DDR3 speeds, 1GHz/1066MT and 600MHz/800MT.

Added new inline function board_it_k2g_g1() for the new FlipChip 1GHz,
and set the u-boot env variable board_name accordingly.

Modified findfdt script in u-boot environment variable to include new k2g board type.

Signed-off-by: Rex Chang <rchang@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
6 years agoconfigs: k2g_evm: Allocate more space for u-boot
Lokesh Vutla [Thu, 28 Dec 2017 15:09:58 +0000 (20:39 +0530)]
configs: k2g_evm: Allocate more space for u-boot

Now that we have multi dtb enabled in u-boot allocate
128K space for u-boot.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
6 years agoboard: ti: dra7xx: Select MCAN instead of DCAN on DRA76 EVM
Vignesh R [Tue, 12 Dec 2017 11:44:27 +0000 (17:14 +0530)]
board: ti: dra7xx: Select MCAN instead of DCAN on DRA76 EVM

MCAN can be accessed via DCAN1 or DCAN2. Determining which DCAN instance
to use if any at all is done through
CTRL_CORE_CONTROL_SPARE_RW.SEL_ALT_MCAN. Since general pinmuxing is
handled in U-boot. Handle this additional pinmuxing requirement in U-boot
to ensure that MCAN is used by default via the DCAN1 pins.

Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
[fcooper@ti.com: Update commit message and use DCAN1 not DCAN2 for MCAN]
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
6 years agommc: omap_hsmmc: Fix incorrect bit operations for disabling a bit
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:51:36 +0000 (16:51 +0200)]
mmc: omap_hsmmc: Fix incorrect bit operations for disabling a bit

omap_hsmmc driver uses "|" in a couple of places for disabling a bit.
While it's okay to use it in "mmc_reg_out" (since mmc_reg_out has a
_mask_ argument to take care of resetting a bit), it's incorrectly used
for resetting flags in "omap_hsmmc_send_cmd".

Fix it here by using "&= ~()" to reset a bit.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agommc: omap_hsmmc: Enable Auto command (CMD12) enable
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:51:35 +0000 (16:51 +0200)]
mmc: omap_hsmmc: Enable Auto command (CMD12) enable

Instead of sending STOP TRANSMISSION command from MMC core, enable
the auto command feature so that the Host Controller issues CMD12
automatically when last block transfer is completed.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agommc: omap_hsmmc: Add support for DMA (ADMA2)
Kishon Vijay Abraham I [Thu, 21 Sep 2017 14:51:34 +0000 (16:51 +0200)]
mmc: omap_hsmmc: Add support for DMA (ADMA2)

The omap hsmmc host controller can have the ADMA2 feature. It brings better
read and write throughput.
On most SOC, the capability is read from the hl_hwinfo register. On OMAP3,
DMA support is compiled out.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agoomap: Update the base address of the MMC controllers
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:51:33 +0000 (16:51 +0200)]
omap: Update the base address of the MMC controllers

Align the base address defined in header files with the base address used
in the DTS. This will facilitate the introduction of the DMA support.

Of all HSMMC users, only omap3 doesn't have the 0x100 reserved region at
the top. This region will be used to determine if the controller supports
DMA transfers

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agoRevert "omap_hsmmc: update struct hsmmc to accommodate omap3 from DT"
Jean-Jacques Hiblot [Thu, 21 Sep 2017 14:51:32 +0000 (16:51 +0200)]
Revert "omap_hsmmc: update struct hsmmc to accommodate omap3 from DT"

This reverts commit 46831c1a4cda75d92f7ad18d4e2b1eb196c62b2f.
This reserved area at the beginning of struct hsmm, will be used later to
support ADMA

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Wed, 17 Jan 2018 18:48:35 +0000 (13:48 -0500)]
Merge git://git.denx.de/u-boot-fsl-qoriq

6 years agoarmv8: ls1088ardb: Add environment variable address location for QSPI-NOR
Ashish Kumar [Thu, 14 Dec 2017 12:07:09 +0000 (17:37 +0530)]
armv8: ls1088ardb: Add environment variable address location for QSPI-NOR

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoenv: sf: Add support for env init for QSPI-NOR
Ashish Kumar [Thu, 14 Dec 2017 12:07:08 +0000 (17:37 +0530)]
env: sf: Add support for env init for QSPI-NOR

ENV variables can now be used before relocation.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1088: Add USB and PCI configs in SD-BOOT defconfig
Ashish Kumar [Tue, 2 Jan 2018 05:26:04 +0000 (10:56 +0530)]
armv8: ls1088: Add USB and PCI configs in SD-BOOT defconfig

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarm64: ls1012a: Add sata distro boot support
Yuantian Tang [Wed, 3 Jan 2018 07:53:10 +0000 (15:53 +0800)]
arm64: ls1012a: Add sata distro boot support

Sata is equipped on ls1012a and can be a boot source. Add sata boot
support as an option if available.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarm64: ls1046a: Add sata distro boot support
Yuantian Tang [Wed, 3 Jan 2018 07:53:09 +0000 (15:53 +0800)]
arm64: ls1046a: Add sata distro boot support

Sata is equipped on ls1046a and can be a boot source. Add sata boot
support as an option if available.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agofreescale: Ensure common commands are not included in SPL binary
Tom Rini [Wed, 3 Jan 2018 13:57:50 +0000 (08:57 -0500)]
freescale: Ensure common commands are not included in SPL binary

Both the "qixis_reset" and esbc_validate" commands can only be used in
full U-Boot so do not build them in SPL.  As part of this rework the
qixis code to declare things as static and make use of __weak for
function aliases.

Cc; York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agotools: Update python "help" tests to cope with "more" oddities
Tom Rini [Tue, 16 Jan 2018 20:29:50 +0000 (15:29 -0500)]
tools: Update python "help" tests to cope with "more" oddities

In some cases when "more" is told to page a given file it will prepend
the output with:
::::::::::::::
/PATH/TO/THE/FILE
::::::::::::::

And when this happens the output will not match the expected length.
Further, if we use a different pager we will instead fail the coverage
tests as we will not have 100% coverage.  Update the help test to remove
the string in question.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge git://git.denx.de/u-boot-i2c
Tom Rini [Tue, 16 Jan 2018 15:13:38 +0000 (10:13 -0500)]
Merge git://git.denx.de/u-boot-i2c

6 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Tue, 16 Jan 2018 15:12:40 +0000 (10:12 -0500)]
Merge git://git.denx.de/u-boot-dm

6 years agoi2c: mxc_i2c: Use or operation
Peng Fan [Fri, 29 Dec 2017 07:06:08 +0000 (15:06 +0800)]
i2c: mxc_i2c: Use or operation

The operation should be OR, not BIT OR.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
6 years agoimx: mx7ulp: modify lpi2c seq number
Peng Fan [Tue, 2 Jan 2018 07:41:53 +0000 (15:41 +0800)]
imx: mx7ulp: modify lpi2c seq number

Modify the lpi2c alias seq number to align with device.
Then no need to add 4 to get the device index.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
6 years agoi2c: lpi2c: do not add 4 for bus seq
Peng Fan [Tue, 2 Jan 2018 07:41:52 +0000 (15:41 +0800)]
i2c: lpi2c: do not add 4 for bus seq

The number 4 is dedicated on i.MX7ULP, but lpi2c will be reused on i.MX8,
4 is not valid. The seq number could be configured by alias node.

The following patch will use i2c4 as the begin for i.MX7ULP.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
6 years agotest: Set the DTC environment variable
Simon Glass [Sun, 24 Dec 2017 19:12:08 +0000 (12:12 -0700)]
test: Set the DTC environment variable

Set this to our own device-tree compiler since we know it is new enough to
run the tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodtoc: Allow DTC environment variable to provide path to dtc
Simon Glass [Sun, 24 Dec 2017 19:12:07 +0000 (12:12 -0700)]
dtoc: Allow DTC environment variable to provide path to dtc

The system device-tree compiler may not be new enough to run the tests we
use in U-Boot (e.g. with binman). Allow use of a DTC environment variable
to point to the correct dtc. If not defined, the dtc on the default PATH
is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agoarmv8: secure firmware: fix incorrect unit address in node name
Andre Przywara [Mon, 4 Dec 2017 02:05:13 +0000 (02:05 +0000)]
armv8: secure firmware: fix incorrect unit address in node name

The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Remove the unit address from the config node name when U-Boot deals with
secure firmware FIT images.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
6 years agotools: fix incorrect usage of DT node unit address
Andre Przywara [Mon, 4 Dec 2017 02:05:12 +0000 (02:05 +0000)]
tools: fix incorrect usage of DT node unit address

The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Correct the generated unit names when U-Boot's mkimage creates a FIT
image.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
6 years agosunxi: arm64: correct usage of DT node address in FIT generation
Andre Przywara [Mon, 4 Dec 2017 02:05:11 +0000 (02:05 +0000)]
sunxi: arm64: correct usage of DT node address in FIT generation

The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Adjust the FIT build script for 64-bit Allwinner boards to remove the
bogus addresses from the node names and avoid the warnings.
This avoids a warning with recent versions of the dtc tool.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
6 years agofix incorrect usage of DT node unit address in comments
Andre Przywara [Mon, 4 Dec 2017 02:05:10 +0000 (02:05 +0000)]
fix incorrect usage of DT node unit address in comments

The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the tree where node names were mentioned in
comments, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
6 years agodoc: fix incorrect usage of DT node unit address
Andre Przywara [Mon, 4 Dec 2017 02:05:09 +0000 (02:05 +0000)]
doc: fix incorrect usage of DT node unit address

The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in various documentation files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
6 years agodoc: FIT image: fix incorrect examples of DT node unit address
Andre Przywara [Mon, 4 Dec 2017 02:05:08 +0000 (02:05 +0000)]
doc: FIT image: fix incorrect examples of DT node unit address

The DT spec demands a unit-address of a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the FIT image example files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
6 years agodoc: FIT image: fix incorrect description of DT node unit address
Andre Przywara [Mon, 4 Dec 2017 02:05:07 +0000 (02:05 +0000)]
doc: FIT image: fix incorrect description of DT node unit address

The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the FIT image documentation files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
6 years agobinman: Run code coverage tests
Simon Glass [Mon, 27 Nov 2017 03:26:01 +0000 (20:26 -0700)]
binman: Run code coverage tests

Binman has 100% test coverage for the code as it is at present. To
encourage it to stay that way, run the code-coverage test as part of the
normal U-Boot tests.

This is RFC because it requires the Python code coverage tools to be
available.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agotravis.yml: Run tests for tools
Simon Glass [Mon, 27 Nov 2017 03:26:00 +0000 (20:26 -0700)]
travis.yml: Run tests for tools

Run tests for the Python tools used by U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agotest: Run dtoc tests
Simon Glass [Mon, 27 Nov 2017 03:25:59 +0000 (20:25 -0700)]
test: Run dtoc tests

Update the test script to run the dtoc tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agotest: Run buildman tests
Simon Glass [Mon, 27 Nov 2017 03:25:58 +0000 (20:25 -0700)]
test: Run buildman tests

Update the test script to run the buildman tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agotest: Run patman tests
Simon Glass [Mon, 27 Nov 2017 03:25:57 +0000 (20:25 -0700)]
test: Run patman tests

Update the test script to run the patman tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agotest: Run binman tests
Simon Glass [Mon, 27 Nov 2017 03:25:56 +0000 (20:25 -0700)]
test: Run binman tests

Update the test script to run the binman tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agoMerge git://git.denx.de/u-boot-net
Tom Rini [Tue, 16 Jan 2018 00:01:23 +0000 (19:01 -0500)]
Merge git://git.denx.de/u-boot-net

6 years agoMerge git://git.denx.de/u-boot-imx
Tom Rini [Mon, 15 Jan 2018 21:44:18 +0000 (16:44 -0500)]
Merge git://git.denx.de/u-boot-imx

6 years agodb410c: on aarch64 the fdtfile is in per-vendor subdirectory
Rob Clark [Wed, 10 Jan 2018 10:34:40 +0000 (11:34 +0100)]
db410c: on aarch64 the fdtfile is in per-vendor subdirectory

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodb410c: add reserved-memory node to dts
Rob Clark [Wed, 10 Jan 2018 10:34:39 +0000 (11:34 +0100)]
db410c: add reserved-memory node to dts

If lk lights up display and populates simple-framebuffer node, it will
also setup a reserved-memory node (needed by simplefb on linux).  But
it isn't clever enough to cope when the reserved-memory node is not
present.

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodb410c: use the device tree parsed by the lk loader.
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:34:38 +0000 (11:34 +0100)]
db410c: use the device tree parsed by the lk loader.

We dont need to keep copies of the properties that we are going to
fixup since we will be using the dtb provided by the firmware.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agofdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE
Rob Clark [Wed, 10 Jan 2018 10:34:37 +0000 (11:34 +0100)]
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE

Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by
u-boot build.  This allows the board to patch the fdt, etc.

In the specific case of dragonboard 410c, we pass the u-boot generated
fdt to the previous stage of bootloader (by embedding it in the
u-boot.img that is loaded by lk/aboot), which patches the fdt and passes
it back to u-boot.

Signed-off-by: Rob Clark <robdclark@gmail.com>
[trini: Update board_fdt_blob_setup #if check]
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agodb410c: replace reset driver with psci
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:34:36 +0000 (11:34 +0100)]
db410c: replace reset driver with psci

this should be the norm for armv8 platforms.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agodb410c: update wlan and bt mac addresses from firmware
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:34:35 +0000 (11:34 +0100)]
db410c: update wlan and bt mac addresses from firmware

The firmware that runs before u-boot modifies u-boot's device tree
adding the local-mac-address and local-bd-address properties for the
compatibles "qcom,wcnss-bt" and "qcom,wcnss-wlan".

This commit reads that firmware, retrieves the properties and fixups
the device tree that is passed to the kernel before booting.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agodb410c: configs: increase gunzip buffer size for the kernel
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:34:34 +0000 (11:34 +0100)]
db410c: configs: increase gunzip buffer size for the kernel

the kernel fails to boot when it goes over the limit.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agodb820c: stop autoboot when vol- pressed
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:33:52 +0000 (11:33 +0100)]
db820c: stop autoboot when vol- pressed

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agodb820c: enable pmic gpios for pm8994
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:33:51 +0000 (11:33 +0100)]
db820c: enable pmic gpios for pm8994

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agodb820c: add qualcomm dragonboard 820C support
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:33:50 +0000 (11:33 +0100)]
db820c: add qualcomm dragonboard 820C support

This commit adds support for 96Boards Dragonboard820C.

The board is based on APQ8086 Qualcomm Soc, complying with the
96Boards specification.

Features
 - 4x Kyro CPU (64 bit) up to 2.15GHz
 - USB2.0
 - USB3.0
 - ISP
 - Qualcomm Hexagon DSP
 - SD 3.0 (UHS-I)
 - UFS 2.0
 - Qualcomm Adreno 530 GPU
 - GPS
 - BT 4.2
 - Wi-Fi 2.4GHz, 5GHz (802.11ac)
 - PCIe 2.0
 - MIPI-CSI, MIPI-DSI
 - I2S

U-Boot boots chained from LK (LK implements the fastboot protocol) in
64-bit mode.

For detailed build instructions see readme.txt in the board directory.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agoarm: mach-snapdragon: refactor clock driver
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:33:49 +0000 (11:33 +0100)]
arm: mach-snapdragon: refactor clock driver

In preparation to add support for the Dragonboard820c (APQ8096),
refactor the current Snapdragon clock driver.

No new functionality has been added.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agoenv: enable accessing the environment in an EXT4 partition
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:33:48 +0000 (11:33 +0100)]
env: enable accessing the environment in an EXT4 partition

For example to store the environment in a file named "/uboot.env" in MMC
"0", where partition "1" contains the EXT4 filesystem, the following
configs should be added to the board's default config:

  CONFIG_ENV_IS_IN_EXT4=y
  CONFIG_ENV_EXT4_DEVICE_AND_PART="0:1"
  CONFIG_ENV_EXT4_FILE="/uboot.env"
  CONFIG_ENV_EXT4_INTERFACE="mmc"

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
[trini: Fix some line over 80 chars issues]
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoarm: ls1021atwr: Rework local commands to not be included in SPL
Tom Rini [Wed, 3 Jan 2018 14:01:33 +0000 (09:01 -0500)]
arm: ls1021atwr: Rework local commands to not be included in SPL

Move some of the code for the "lane_bank" and "cpld" code local
commands so that they are not built for SPL as they can only be
used in full U-Boot.  This means we can mark a few functions as
static as well now.

Cc: Alison Wang <alison.wang@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
Tested-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agopowerpc: P1010RDB: Rework local command to not be included in SPL
Tom Rini [Wed, 3 Jan 2018 14:13:04 +0000 (09:13 -0500)]
powerpc: P1010RDB: Rework local command to not be included in SPL

Add a CONFIG_SPL_BUILD guard around the code for the "mux" command so
it is not included in SPL.

Cc: Qiang Zhao <qiang.zhao@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
6 years agoboard/ls2081ard: Correct code to get QMAP value in checkboard
Priyanka Jain [Mon, 8 Jan 2018 06:50:42 +0000 (12:20 +0530)]
board/ls2081ard: Correct code to get QMAP value in checkboard

QMAP value contains information about QSPI chip-selects. These bits
are used to display information of boot device in checkboard()
function.

QMAP value is stored in most significant 3-bits of 8-bit register
brdcfg[0] in Qixis, this patch corrects code to get QMAP bits using
below logic:
(brdcfg[0] >> 5) & 0x7

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoboard/ls2081ardb: Update board related prints
Priyanka Jain [Mon, 8 Jan 2018 07:29:31 +0000 (12:59 +0530)]
board/ls2081ardb: Update board related prints

Remove Board Arch print as its value is always constant '1' and does
not contain any important information to display during boot.
Add print to display Board FPGA version.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoconfigs: SECURE_BOOT: Enable CONFIG_CMD_EXT4_WRITE
Sumit Garg [Mon, 8 Jan 2018 19:57:46 +0000 (01:27 +0530)]
configs: SECURE_BOOT: Enable CONFIG_CMD_EXT4_WRITE

As part of chain of trust with confidentiality along with distro
boot, linux kernel image needs to be stored in encrypted form on
ext4 boot partition. So enable CONFIG_CMD_EXT4_WRITE in case of
Secure boot on ARM based platforms.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8/ls1088a: configure PMU's PCTBENR to enable WDT
Zhang Ying-22455 [Tue, 9 Jan 2018 08:25:46 +0000 (16:25 +0800)]
armv8/ls1088a: configure PMU's PCTBENR to enable WDT

The SP805-WDT module on LS1088A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.

Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoserial: lpuart: Proper device identification
Sriram Dash [Wed, 10 Jan 2018 06:27:14 +0000 (11:57 +0530)]
serial: lpuart: Proper device identification

Identify and distinguish between platform device type of MX7ULP
and LS1021A.

This is a fix to commit 7edf5c45("serial: lpuart: add i.MX7ULP
support").

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoboard: ls1012a: LS1012A-2G5RDB board support
Bhaskar Upadhaya [Thu, 11 Jan 2018 14:33:31 +0000 (20:03 +0530)]
board: ls1012a: LS1012A-2G5RDB board support

LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII
PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8/kconfig: Align boards of same family at one place
Bhaskar Upadhaya [Thu, 11 Jan 2018 14:33:30 +0000 (20:03 +0530)]
armv8/kconfig: Align boards of same family at one place

Align boards belonging to LS1012A, LS2080A SoC at one place.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agophy: atheros: set auto-negotiation for AR8021
Zhao Qiang [Thu, 14 Dec 2017 01:50:46 +0000 (09:50 +0800)]
phy: atheros: set auto-negotiation for AR8021

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: sh-eth: Add to Kconfig and convert
Nobuhiro Iwamatsu [Fri, 1 Dec 2017 07:08:03 +0000 (16:08 +0900)]
net: sh-eth: Add to Kconfig and convert

This adds SH_ETHER to drivers/net/Kconfig and convert to Kconfig.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: sh-eth: Fix misaligned cache operation warning
Nobuhiro Iwamatsu [Fri, 1 Dec 2017 04:56:08 +0000 (13:56 +0900)]
net: sh-eth: Fix misaligned cache operation warning

When we using network on board using sh-eth, it prints a lot of
"CACHE: Misaligned operation at range" messages.
This commit fixes this problem.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: sh-eth: Change read/write() param to struct sh_eth_info
Nobuhiro Iwamatsu [Thu, 30 Nov 2017 23:10:32 +0000 (08:10 +0900)]
net: sh-eth: Change read/write() param to struct sh_eth_info

This changes Change structure used in sh_eth_read and sh_eth_write function
from struct sh_eth_dev to struct sh_eth_info. This is necessary to convert
to Driver Model.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: sh-eth: Remove bd_t from sh_eth_config()
Nobuhiro Iwamatsu [Thu, 30 Nov 2017 23:08:47 +0000 (08:08 +0900)]
net: sh-eth: Remove bd_t from sh_eth_config()

bd_t is not used in sh_eth_config(). This deletes bd_t from sh_eth_config()

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: sh-eth: Fix coding style checked by checkpatch.pl
Nobuhiro Iwamatsu [Thu, 30 Nov 2017 23:08:00 +0000 (08:08 +0900)]
net: sh-eth: Fix coding style checked by checkpatch.pl

This fixes the chord style checked by checkpatch.pl.
Details of change details are as follows:

 - Fix typo
    Change from alligned to aligned.
 - Remove whitespace before ','
 - Add spaces preferred around that '|'
 - Fix missing a blank line after declarations
 - Remove space after a cast declaration
 - Fix format of block comments
 - Add a blank line after function/struct/union/enum declarations

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: dhcp: Allow "MAY_FAIL" to still try each adapter
Joe Hershberger [Wed, 8 Nov 2017 02:13:40 +0000 (18:13 -0800)]
net: dhcp: Allow "MAY_FAIL" to still try each adapter

This change allows the "MAY_FAIL" DHCP option to still attempt to
contact a DHCP server on each adapter and only give up once each
adapter has failed once.  To get the existing behavior, set the
already-existing ethrotate=no variable.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
6 years agoconfigs: Update Lamobo_R1 with B53 switch options
Florian Fainelli [Sat, 9 Dec 2017 22:59:57 +0000 (14:59 -0800)]
configs: Update Lamobo_R1 with B53 switch options

Enable CONFIG_B53_SWITCH, define the CPU/management port number (8) and
enable all 5 ports of the switch to be usable.

Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
6 years agonet: phy: b53: Add b53_reg read/write commands
Florian Fainelli [Sat, 9 Dec 2017 22:59:56 +0000 (14:59 -0800)]
net: phy: b53: Add b53_reg read/write commands

Add a b53_reg read/write command which allows inspecting the switch
registers. Because the Broadcom BCM53xx registers have different sizes,
we need to split the accesses in 8, 16, 32, 48 or 64 bits to obtain
expected results.

Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
6 years agonet: designware: Pad small packets
Florian Fainelli [Sat, 9 Dec 2017 22:59:55 +0000 (14:59 -0800)]
net: designware: Pad small packets

Make sure that we pad small packets to a minimum length of 60 bytes
(without FCS). This is necessary to interface with Ethernet switches
that will reject RUNT frames unless padded correctly.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
6 years agonet: phy: Add Broadcom BCM53xx switch driver
Florian Fainelli [Sat, 9 Dec 2017 22:59:54 +0000 (14:59 -0800)]
net: phy: Add Broadcom BCM53xx switch driver

Add a minimalistic Broadcom BCM53xx (roboswitch) switch driver similar
to the Marvell MV88E617x. This takes care of configuring the minimum
amount out of the switch hardware such that each user visible port
(configurable) and the CPU port can forward packets between each other
while preserving isolation with other ports.

This is useful for e.g: the Lamobo R1 board featuring a Broadcom
BCM53125 switch.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
6 years agonet: designware: add clock support
Patrice Chotard [Wed, 29 Nov 2017 08:06:11 +0000 (09:06 +0100)]
net: designware: add clock support

This implementation manages several clocks, disable and
free all of them in case of error during probe and in remove
callback.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agodm: core: add missing dev_count_phandle_with_args()
Patrice Chotard [Wed, 29 Nov 2017 08:06:10 +0000 (09:06 +0100)]
dm: core: add missing dev_count_phandle_with_args()

Add missing dev_count_phandle_with_args() to avoid
compilation issue.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: mvneta - Fixed recv() when multiple packets have arrived.
Jason Brown [Tue, 28 Nov 2017 19:12:43 +0000 (11:12 -0800)]
net: mvneta - Fixed recv() when multiple packets have arrived.

This patch fixes a problem in the mvneta driver where if more than
one packet arrives between calls to mvneta_recv(), the additional
descriptors will be marked as free even though only one descriptor
has been read and processed from the receive queue.  This causes
the additional packet(s) to be delayed until the next packet arrives.
>From this point on all packets will be delayed because the receive
queue will contain unprocessed packets but the hardware shows no
busy descriptors.

Signed-off-by: Jason Brown <jason.brown@apcon.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: miiphybb: fix casting error
Chris Brandt [Fri, 3 Nov 2017 13:30:13 +0000 (08:30 -0500)]
net: miiphybb: fix casting error

Since the return value is a signed int, if the leading MSB of rdreg is a 1,
it will get signed extended and will return a negative value which is an
error even though we read the correct value.

Fixes: dfcc496ed7e2 ("net: mii: Changes not made by spatch")
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: sh-eth: remove sh_eth_offset_rz table
Chris Brandt [Fri, 3 Nov 2017 13:30:12 +0000 (08:30 -0500)]
net: sh-eth: remove sh_eth_offset_rz table

First, this table could never be included in the build anyway because
SH_ETH_TYPE_RZ is not defined until later in the file.
Second, the register PIR was missing, so PHY MDIO never worked.
Third, after adding the PIR register, the table is EXACTLY the same as
sh_eth_offset_gigabit, so there is no value to it.

Therefore, just delete it use the gigabit one.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: sh-eth: fix inl and outl definitions
Chris Brandt [Fri, 3 Nov 2017 13:30:11 +0000 (08:30 -0500)]
net: sh-eth: fix inl and outl definitions

The macros inl and outl maybe already be defined from file
arch/arm/include/asm/io.h so there may be no reason to define them.
And if you do try defined them here, you get a redefined complier warning.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: phy: marvell: Add functions to read PHY's extended registers
Lukasz Majewski [Mon, 30 Oct 2017 21:57:53 +0000 (22:57 +0100)]
net: phy: marvell: Add functions to read PHY's extended registers

This commit allows extended Marvell registers to be read with:

foo > mdio rx FEC 3.10
Reading from bus FEC
PHY at address 0:
3.16 - 0x1063
foo > mdio wx FEC 3.10 0x1011

The above code changes the way ETH connector LEDs blink.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: Remove nfs.h include from bootp.c
Joe Hershberger [Wed, 30 Aug 2017 22:38:42 +0000 (17:38 -0500)]
net: Remove nfs.h include from bootp.c

Nothing from this header is used there, so remove it.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: Fix buffer overrun error in netconsole
Joe Hershberger [Wed, 30 Aug 2017 22:32:31 +0000 (17:32 -0500)]
net: Fix buffer overrun error in netconsole

Need to not access the byte after the input_buffer.

Reported-by: Coverity (CID: 144423)
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: macb: Add support for Xilinx Zynq SoC
Wilson Lee [Wed, 23 Aug 2017 03:25:07 +0000 (20:25 -0700)]
net: macb: Add support for Xilinx Zynq SoC

Although Xilinx Zynq SoC was using MACB similar hardware. However,
U-boot MACB driver was not supporting Xilinx Zynq SoC. This patch is
to add support for the Xilinx Zynq SoC to the existing MACB network
driver.

This patch is to add Zynq GEM DMA Config, provide callback
function for different linkspeed for case of using Xilinx Zynq
Programmable Logic as GMII to RGMII converter.

This patch convert the return value to use error codes.

Signed-off-by: Wilson Lee <wilson.lee@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agodm: core: parse chosen node
Rob Clark [Wed, 10 Jan 2018 10:33:30 +0000 (11:33 +0100)]
dm: core: parse chosen node

This is the node that would contain, for example, the framebuffer setup
by an earlier stage.

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agopoplar: configs: increase gunzip buffer size for the kernel
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:33:29 +0000 (11:33 +0100)]
poplar: configs: increase gunzip buffer size for the kernel

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agospmi: msm: display the PMIC Arb version (debug)
Jorge Ramirez-Ortiz [Wed, 10 Jan 2018 10:33:28 +0000 (11:33 +0100)]
spmi: msm: display the PMIC Arb version (debug)

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6 years agoMerge git://git.denx.de/u-boot-mmc
Tom Rini [Mon, 15 Jan 2018 03:26:38 +0000 (22:26 -0500)]
Merge git://git.denx.de/u-boot-mmc

6 years agoarm: imx: hab: Add hab_failsafe console command
Bryan O'Donoghue [Fri, 12 Jan 2018 12:40:19 +0000 (12:40 +0000)]
arm: imx: hab: Add hab_failsafe console command

hab_failsafe when called puts the part into BootROM recovery mode.
This will allow u-boot scripts to script the dropping down into recovery
mode.

=> hab_failsafe

Shows the i.MX7 appear as "hiddev0,hidraw5: USB HID v1.10 Device [Freescale
SemiConductor Inc  SP Blank ULT1] " in a Linux dmesg thus allowing download
of a new image via the BootROM USB download protocol routine.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoarm: imx: hab: Implement hab_rvt_failsafe
Bryan O'Donoghue [Fri, 12 Jan 2018 12:40:18 +0000 (12:40 +0000)]
arm: imx: hab: Implement hab_rvt_failsafe

This patch implements the basic callback hooks for
hab_rvt_check_failsafe for BootROM code using the older BootROM address
layout - in my test case the i.MX7. Code based on new BootROM callbacks
will just do nothing and there's definitely a TODO to implement that extra
functionality on the alternative BootROM API.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>