]> git.sur5r.net Git - u-boot/log
u-boot
10 years agonet: Display the size when tftpboot finishes
Simon Glass [Fri, 10 Oct 2014 13:30:21 +0000 (07:30 -0600)]
net: Display the size when tftpboot finishes

If we know the file size, display it after loading the file.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Enable FIT, ELF on coreboot
Simon Glass [Fri, 10 Oct 2014 13:30:20 +0000 (07:30 -0600)]
x86: Enable FIT, ELF on coreboot

Enable FIT support and the bootelf command. Also change the default load
address to somewhere other than the normal load address of the kernel,
to allow for decompression without overwriting the original file.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: config: link: Display the board model on the screen
Simon Glass [Fri, 10 Oct 2014 13:30:19 +0000 (07:30 -0600)]
x86: config: link: Display the board model on the screen

To get a display in U-Boot on link you must either build a coreboot that
always sets it up, or use Esc-Refresh-Power to reset the machine.

When we do have a display, it is nice to display the model at the top, so
enable this option.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: link: Tidy up the command lines options
Simon Glass [Fri, 10 Oct 2014 13:30:18 +0000 (07:30 -0600)]
x86: link: Tidy up the command lines options

We may as well use hush. The auto-complete option was incorrect so this was
not enabled. Also expand the command line size a little and go back to the
default prompt since "boot>" doesn't seem any more useful.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agodoc: Remove note about auto-complete not working with hush
Simon Glass [Fri, 10 Oct 2014 13:30:17 +0000 (07:30 -0600)]
doc: Remove note about auto-complete not working with hush

It does seem to work (tested on link), so update the docs.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: cros_ec: Enable cros_ec for link
Simon Glass [Fri, 10 Oct 2014 13:30:16 +0000 (07:30 -0600)]
x86: cros_ec: Enable cros_ec for link

Add defines to enable the Chrome OS EC interface and set it up on init.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: cros_ec: Update LPC driver for new cros_ec header
Simon Glass [Fri, 10 Oct 2014 13:30:15 +0000 (07:30 -0600)]
x86: cros_ec: Update LPC driver for new cros_ec header

There was a minor rename of one of the defines, so update the driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: dts: Add device tree compatible string for Intel IPC
Simon Glass [Fri, 10 Oct 2014 13:30:14 +0000 (07:30 -0600)]
x86: dts: Add device tree compatible string for Intel IPC

Add this to the table so that it can be recognised.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Add device tree information for Chrome OS EC
Simon Glass [Fri, 10 Oct 2014 13:30:13 +0000 (07:30 -0600)]
x86: Add device tree information for Chrome OS EC

Add the required node describing how to find the EC on link.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: config: Enable dhcp on link
Simon Glass [Fri, 10 Oct 2014 13:30:12 +0000 (07:30 -0600)]
x86: config: Enable dhcp on link

The dhcp option is required to get bootp to work on the Chromebook Pixel,
so enable it.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Fix GDT limit in start16.S
Bin Meng [Thu, 16 Oct 2014 14:58:35 +0000 (22:58 +0800)]
x86: Fix GDT limit in start16.S

GDT limit should be one less than an integral multiple of eight.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agox86: Fix rom version build with CONFIG_X86_RESET_VECTOR
Bin Meng [Thu, 16 Oct 2014 14:58:20 +0000 (22:58 +0800)]
x86: Fix rom version build with CONFIG_X86_RESET_VECTOR

When building U-Boot with CONFIG_X86_RESET_VECTOR, the linking
process misses the resetvec.o and start16.o so it cannot generate
the rom version of U-Boot. The arch/x86/cpu/Makefile is updated to
pull them into the final linking process.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agox86: Support loading kernel setup from a FIT
Simon Glass [Mon, 20 Oct 2014 03:11:24 +0000 (21:11 -0600)]
x86: Support loading kernel setup from a FIT

Add a new setup@ section to the FIT which can be used to provide a setup
binary for booting Linux on x86. This makes it possible to boot x86 from
a FIT.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agodoc: Tidy up and update part of the FIT documentation
Simon Glass [Mon, 20 Oct 2014 03:11:23 +0000 (21:11 -0600)]
doc: Tidy up and update part of the FIT documentation

This uses cfg instead of conf, and img instead of image. Fix these and
update in a few other places.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agosandbox: bootm: Don't fail the architecture check
Simon Glass [Mon, 20 Oct 2014 03:11:22 +0000 (21:11 -0600)]
sandbox: bootm: Don't fail the architecture check

Since sandbox is used for testing, it should be able to 'boot' an image
from any archhitecture. This allows us to test an image by loading it in
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Allow cmdline setup in setup_zimage() to be optional
Simon Glass [Mon, 20 Oct 2014 03:11:21 +0000 (21:11 -0600)]
x86: Allow cmdline setup in setup_zimage() to be optional

If we are passing this using the device tree then we may not want to
set this up here.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Rewrite bootm.c to make it similar to ARM
Simon Glass [Mon, 20 Oct 2014 03:11:20 +0000 (21:11 -0600)]
x86: Rewrite bootm.c to make it similar to ARM

The x86 bootm code is quite special, and geared to zimage. Adjust it
to support device tree and make it more like the ARM code, with
separate bootm stages and functions for each stage.

Create a function announce_and_cleanup() to handle printing the
"Starting kernel ..." message and put it in bootm so it is in one
place and can be used by any loading code. Also move the
board_final_cleanup() function into bootm.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Enable LMB and RAMDISK_HIGH by default
Simon Glass [Mon, 20 Oct 2014 03:11:19 +0000 (21:11 -0600)]
x86: Enable LMB and RAMDISK_HIGH by default

These options are used by the image code. To allow us to use the generic
code more easily, define these for x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agoMerge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Mon, 20 Oct 2014 22:17:26 +0000 (18:17 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

10 years agols102x: Add support for secure boot and enable blob command
Ruchika Gupta [Tue, 7 Oct 2014 10:18:47 +0000 (15:48 +0530)]
ls102x: Add support for secure boot and enable blob command

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agompc85xx: configs - Enable blob command in freescale platforms
Ruchika Gupta [Tue, 7 Oct 2014 10:18:46 +0000 (15:48 +0530)]
mpc85xx: configs - Enable blob command in freescale platforms

Enable blob commands for platforms having SEC 4.0 or greater
for secure boot scenarios

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agocrypto/fsl: Add command for encapsulating/decapsulating blobs
Ruchika Gupta [Tue, 7 Oct 2014 10:16:20 +0000 (15:46 +0530)]
crypto/fsl: Add command for encapsulating/decapsulating blobs

Freescale's SEC block has built-in Blob Protocol which provides
a method for protecting user-defined data across system power
cycles. SEC block protects data in a data structure called a Blob,
which provides both confidentiality and integrity protection.

Encapsulating data as a blob
Each time that the Blob Protocol is used to protect data, a
different randomly generated key is used to encrypt the data.
This random key is itself encrypted using a key which is derived
from SoC's non volatile secret key and a 16 bit Key identifier.
The resulting encrypted key along with encrypted data is called a blob.
The non volatile secure key is available for use only during secure boot.

During decapsulation, the reverse process is performed to get back
the original data.

Commands added
--------------
    blob enc - encapsulating data as a cryptgraphic blob
    blob dec - decapsulating cryptgraphic blob to get the data

Commands Syntax
---------------
blob enc src dst len km

Encapsulate and create blob of data $len bytes long
at address $src and store the result at address $dst.
$km is the 16 byte key modifier is also required for
generation/use as key for cryptographic operation. Key
modifier should be 16 byte long.

blob dec src dst len km

Decapsulate the  blob of data at address $src and
store result of $len byte at addr $dst.
$km is the 16 byte key modifier is also required for
generation/use as key for cryptographic operation. Key
modifier should be 16 byte long.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/mpc85xx: SECURE BOOT - Bypass PAMU in case of secure boot
Ruchika Gupta [Mon, 29 Sep 2014 06:05:33 +0000 (11:35 +0530)]
powerpc/mpc85xx: SECURE BOOT - Bypass PAMU in case of secure boot

By default, PAMU's (IOMMU) are enabled in case of secure boot.
Disable/bypass them once the control reaches the bootloader.

For non-secure boot, PAMU's are already bypassed in the default
SoC configuration.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agols102x: configs - Add hash command in freescale LS1 platforms
Ruchika Gupta [Wed, 15 Oct 2014 06:09:06 +0000 (11:39 +0530)]
ls102x: configs - Add hash command in freescale LS1 platforms

Hardware accelerated support for SHA-1 and SHA-256 has been added.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agompc85xx: configs - Add hash command in freescale platforms
Ruchika Gupta [Wed, 15 Oct 2014 06:05:31 +0000 (11:35 +0530)]
mpc85xx: configs - Add hash command in freescale platforms

Enable CAAM in platforms supporting the hardware block.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agofsl_sec: Add hardware accelerated SHA256 and SHA1
Ruchika Gupta [Wed, 15 Oct 2014 06:05:30 +0000 (11:35 +0530)]
fsl_sec: Add hardware accelerated SHA256 and SHA1

SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to
enable initialization of this hardware IP.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agofsl_sec : Change accessor function to take care of endianness
Ruchika Gupta [Tue, 9 Sep 2014 06:20:31 +0000 (11:50 +0530)]
fsl_sec : Change accessor function to take care of endianness

SEC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of SEC IP.

So update acessor functions with common SEC acessor functions to take care
both type of endianness.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agofsl_sec : Move SEC CCSR definition to common include
Ruchika Gupta [Tue, 9 Sep 2014 06:20:30 +0000 (11:50 +0530)]
fsl_sec : Move SEC CCSR definition to common include

Freescale SEC controller has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the CCSR defintion of
SEC to common include

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/P1010RDB:Update RESET_VECTOR_ADDRESS for 768KB u-boot size
Ruchika Gupta [Mon, 29 Sep 2014 05:44:35 +0000 (11:14 +0530)]
powerpc/P1010RDB:Update RESET_VECTOR_ADDRESS for 768KB u-boot size

U-boot binary size has been increased from 512KB to 768KB.

So update CONFIG_RESET_VECTOR_ADDRESS to reflect the same for
P1010 SPI Flash Secure boot target.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
[York Sun: Modified subject to P1010RDB]
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agovideo: ipu_disp: remove pixclk fixup
Jeroen Hofstee [Tue, 14 Oct 2014 18:37:15 +0000 (20:37 +0200)]
video: ipu_disp: remove pixclk fixup

The ipu display insists on having a lower_margin smaller
then 2. If this is not the case it will attempt to force
it and adjust the pixclk accordingly. This multiplies pixclk
in Hz with the width and height, since this is typically
a * 10^7 * b * 10^2 * c * 10^2 this will overflow the
uint_32 and make things even worse. Since this is a
bootloader and the adjustment is neglectible, just force
it to two and warn about it.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
10 years agovideo: ipu: fix debug and comment
Jeroen Hofstee [Tue, 14 Oct 2014 18:37:14 +0000 (20:37 +0200)]
video: ipu: fix debug and comment

- fix debug pixel clk display and add unit
- fix some comments

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
10 years agolcd: Fix build error with CONFIG_LCD_BMP_RLE8
Simon Glass [Wed, 15 Oct 2014 10:53:04 +0000 (04:53 -0600)]
lcd: Fix build error with CONFIG_LCD_BMP_RLE8

Add a block to avoid a build error with the variable declaration.
Enable the option on sandbox to prevent an error being introduced in
future.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agoPrepare v2014.10 v2014.10
Tom Rini [Tue, 14 Oct 2014 08:47:15 +0000 (04:47 -0400)]
Prepare v2014.10

Signed-off-by: Tom Rini <trini@ti.com>
10 years agosunxi: axp152: dcdc3 scale is 50mV / step not 25mV / step
Hans de Goede [Mon, 13 Oct 2014 12:51:40 +0000 (14:51 +0200)]
sunxi: axp152: dcdc3 scale is 50mV / step not 25mV / step

Currently uboot wrongly uses 25mV / step for dcdc3, this is a copy and paste
error introduced when adding the axp152_mvolt_to_target during review of the
axp152.c driver. This results in u-boot setting Vddr to 2.3V instead of 1.5V.

This commit fixes this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
10 years agoMakefile: drop "tools-only" from no-dot-config-targets
Tom Rini [Mon, 13 Oct 2014 12:38:55 +0000 (08:38 -0400)]
Makefile: drop "tools-only" from no-dot-config-targets

With the introduction of CONFIG_LOCALVERSION support we cannot build
tools without having a config file (as we won't know our PLAIN_VERSION
until then).

Reported-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@ti.com>
10 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Tom Rini [Sat, 11 Oct 2014 00:59:28 +0000 (20:59 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

10 years agoMerge branch 'u-boot-socfpga/topic/arm/socfpga-20141010' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 10 Oct 2014 23:20:55 +0000 (01:20 +0200)]
Merge branch 'u-boot-socfpga/topic/arm/socfpga-20141010' into 'u-boot-arm/master'

10 years agoMerge branch 'u-boot/master' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 10 Oct 2014 23:20:30 +0000 (01:20 +0200)]
Merge branch 'u-boot/master' into 'u-boot-arm/master'

10 years agoarm: socfpga: Use EMAC1 on SoCDK
Marek Vasut [Thu, 9 Oct 2014 23:50:23 +0000 (01:50 +0200)]
arm: socfpga: Use EMAC1 on SoCDK

The SoCDK uses EMAC1, not EMAC0. This patch fixes the issue.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
10 years agoarm: socfpga: add MAINTAINERS entry
Pavel Machek [Thu, 9 Oct 2014 23:50:22 +0000 (01:50 +0200)]
arm: socfpga: add MAINTAINERS entry

Add MAINTAINERS entry.

Signed-off-by: Pavel Machek <pavel@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
10 years agotools: compiler.h: Fix build on FreeBSD
Jeroen Hofstee [Tue, 7 Oct 2014 20:42:27 +0000 (22:42 +0200)]
tools: compiler.h: Fix build on FreeBSD

Commit 832472 "tools: socfpga: Add socfpga preloader signing
to mkimage" added tools/socfpga.c which relies on htole32,
le32toh and friends. While compiler.h includes these protypes
for linux from endian.h, it doesn't do so for FreeBSD. Hence
include <sys/endian.h> for FreeBSD.

Cc: Marek Vasut <marex@denx.de>
CC: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
10 years agoarm, at91: add generic board support for the taurus and corvus board
Heiko Schocher [Wed, 1 Oct 2014 05:26:06 +0000 (07:26 +0200)]
arm, at91: add generic board support for the taurus and corvus board

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
10 years agoARM: atmel: switch at91sam9263ek to generic board
Bo Shen [Wed, 24 Sep 2014 07:35:53 +0000 (15:35 +0800)]
ARM: atmel: switch at91sam9263ek to generic board

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
10 years agosama5d3xek: run PHY's config
Andreas Bießmann [Thu, 18 Sep 2014 21:46:49 +0000 (23:46 +0200)]
sama5d3xek: run PHY's config

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
10 years agomacb: simplify gmac initialisation
Andreas Bießmann [Thu, 18 Sep 2014 21:46:48 +0000 (23:46 +0200)]
macb: simplify gmac initialisation

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Bo Shen <voice.shen@atmel.com>
10 years agoserial-uclass: Fix compilation error
Hans de Goede [Fri, 10 Oct 2014 16:30:17 +0000 (18:30 +0200)]
serial-uclass: Fix compilation error

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
10 years agoks2_evm: readme: align according to actual sources
Khoronzhuk, Ivan [Thu, 9 Oct 2014 19:21:14 +0000 (22:21 +0300)]
ks2_evm: readme: align according to actual sources

Update readme file for Keystone II EVM boards to actual sources.
Also correct some typos. For now the Edison evaluation board is
added, README for K2E is mostly the same, so update README to
contain information also for K2E evm. Rename file to README as
it contains information for all keystone evm boards.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
10 years agoconfigs:ks2_evm: update defconfigs to support SPL
Murali Karicheri [Thu, 9 Oct 2014 19:20:36 +0000 (22:20 +0300)]
configs:ks2_evm: update defconfigs to support SPL

The K2HK and K2E boards support SPL by default, so add
CONFIG_SPL option. Also export CONFIG_ARM, CONFIG_ARCH_KEYSTONE
and TARGET_K2*_EVM options to spl/.config as they are the same.
So now it's convinient to build gph images using only two commands:

make k2hk_evm_defconfig
make u-boot-spi.gph

Acked-By: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
10 years agoMerge branch 'master' of git://git.denx.de/u-boot-nand-flash
Tom Rini [Fri, 10 Oct 2014 13:45:16 +0000 (09:45 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-nand-flash

10 years agoam335x_evm: Correct BOOTCOUNT driver support
Tom Rini [Fri, 3 Oct 2014 19:57:00 +0000 (15:57 -0400)]
am335x_evm: Correct BOOTCOUNT driver support

We need to set the 'BE' flag here for things to work right.

Signed-off-by: Tom Rini <trini@ti.com>
10 years agocommon/board_r: remove warning in initr_mem for 64-bit phys_size_t
Valentin Longchamp [Fri, 3 Oct 2014 09:16:19 +0000 (11:16 +0200)]
common/board_r: remove warning in initr_mem for 64-bit phys_size_t

Since on powerpc phys_size_t can be unsigned long long, this printout
line can result in a not nice compile warning.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agoboard/BuR: fix pinmux for MII Ethernet Interface
Hannes Petermaier [Fri, 3 Oct 2014 05:30:15 +0000 (07:30 +0200)]
board/BuR: fix pinmux for MII Ethernet Interface

The lines COL (collision detect) and CRS (carrier sense) needs to be connected
and muxed to the CPSW MAC for a proper function in half-duplex Mode of the
interface.

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Cc: Tom Rini <trini@ti.com>
10 years agoscripts/multiconfig.sh: Fix a typo
York Sun [Wed, 1 Oct 2014 15:44:55 +0000 (08:44 -0700)]
scripts/multiconfig.sh: Fix a typo

Fix the spelling of "configs".

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agomulticonfig.sh: replace GNU sed specific match
Jeroen Hofstee [Wed, 1 Oct 2014 15:22:58 +0000 (17:22 +0200)]
multiconfig.sh: replace GNU sed specific match

A SPL/TPL enabled target would was not recognized as
such by BSD sed, since it relies on a GNU extension.
Instead of or-ing just spell out both matches.

Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoVCMA9: remove EXT2 support
David Müller (ELSOFT AG) [Tue, 30 Sep 2014 11:53:28 +0000 (13:53 +0200)]
VCMA9: remove EXT2 support

remove the seldomly used EXT2 support because the U-Boot binary will
not fit into the 512KiB flash otherwise.

Signed-off-by: David Müller <d.mueller@elsoft.ch>
10 years agoPATI: fix broken SPI access
David Müller (ELSOFT AG) [Tue, 30 Sep 2014 11:23:54 +0000 (13:23 +0200)]
PATI: fix broken SPI access

fix broken SPI access by adding/activating BOARD_EARLY_INIT_F
functionality and calling spi_init_f() from there.

Signed-off-by: David Müller <d.mueller@elsoft.ch>
10 years agoPATI: convert to generic board
David Müller (ELSOFT AG) [Tue, 30 Sep 2014 10:32:23 +0000 (12:32 +0200)]
PATI: convert to generic board

Signed-off-by: David Müller <d.mueller@elsoft.ch>
10 years agoVCMA9: convert to generic board
David Müller (ELSOFT AG) [Tue, 30 Sep 2014 10:32:22 +0000 (12:32 +0200)]
VCMA9: convert to generic board

Signed-off-by: David Müller <d.mueller@elsoft.ch>
10 years agoMIP405: convert to generic board
David Müller (ELSOFT AG) [Tue, 30 Sep 2014 10:32:21 +0000 (12:32 +0200)]
MIP405: convert to generic board

Signed-off-by: David Müller <d.mueller@elsoft.ch>
10 years agoPIP405: convert to generic board
David Müller (ELSOFT AG) [Tue, 30 Sep 2014 10:32:20 +0000 (12:32 +0200)]
PIP405: convert to generic board

Signed-off-by: David Müller <d.mueller@elsoft.ch>
10 years agoSPDX License cleanup for LiMon imported files
Wolfgang Denk [Tue, 30 Sep 2014 08:44:01 +0000 (10:44 +0200)]
SPDX License cleanup for LiMon imported files

A number of network related files were imported from the LiMon
project; these contain a somewhat unclear license statement:

Copyright 1994 - 2000 Neil Russell.
(See License)

I analyzed the source code of LiMon v1.4.2 which was used for this
import.  It does not contain any "License" file, but the top level
directory contains a file "COPYING", which turns out to be GPL v2
of June 1991.  So it is legitimate to conclude that the LiMon derived
files are also to be released under GPLv2.  Mark them as such.

Signed-off-by: Wolfgang Denk <wd@denx.de>
10 years agobeagleboard: Remove side effects of i2c2 pullup resisters initialization code
Alexander Kochetkov [Mon, 29 Sep 2014 17:46:48 +0000 (21:46 +0400)]
beagleboard: Remove side effects of i2c2 pullup resisters initialization code

Fix typo of commit d4e53f063dd25e071444b87303573e7440deeb89.

i2c2 pullup resisters are controlled by bit 0 of CONTROL_PROG_IO1.
It's value after reset is 0x00100001.

In order to clear bit 0, original code write 0xfffffffe to
CONTROL_PROG_IO1 and toggle almost all default values.

Original code affect following:
* disable i2c1 pullup resisters
* increase far end load setting for many modules
* setup invalid SC/LB combination

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
CC: Tom Rini <trini@ti.com>
CC: Steve Kipisz <s-kipisz2@ti.com>
10 years agopowerpc: mpc5xxx: remove board support for MVBC_P and MVSMR
Masahiro Yamada [Sun, 28 Sep 2014 16:38:01 +0000 (01:38 +0900)]
powerpc: mpc5xxx: remove board support for MVBC_P and MVSMR

These boards have been orphaned for more than 6 months.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc83xx: remove board support for MERGERBOX and MVBLM7
Masahiro Yamada [Sun, 28 Sep 2014 16:38:00 +0000 (01:38 +0900)]
powerpc: mpc83xx: remove board support for MERGERBOX and MVBLM7

These boards have been orphaned for more than 6 months.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: ppc4xx: remove board support for bluestone
Masahiro Yamada [Sun, 28 Sep 2014 16:37:59 +0000 (01:37 +0900)]
powerpc: ppc4xx: remove board support for bluestone

This board has been orphaned for more than 6 months.

It is the last board defining CONFIG_APM821XX.
The code inside #ifdef CONFIG_APM821XX should be removed too.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: ppc4xx: remove board support for CRAYL1
Masahiro Yamada [Sun, 28 Sep 2014 16:37:58 +0000 (01:37 +0900)]
powerpc: ppc4xx: remove board support for CRAYL1

This board has been orphaned for more than 6 months.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: ppc4xx: remove board support for KAREF and METROBOX
Masahiro Yamada [Sun, 28 Sep 2014 16:37:57 +0000 (01:37 +0900)]
powerpc: ppc4xx: remove board support for KAREF and METROBOX

These boards have been orphaned for more than 6 months.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agokconfig: fix another bug of "make savedefconfig"
Masahiro Yamada [Fri, 26 Sep 2014 09:42:36 +0000 (18:42 +0900)]
kconfig: fix another bug of "make savedefconfig"

In some cases, the last lines of SPL or TPL are not output to a file.
The entries remaining in the "unmatched" variable must be flushed.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agoARM: keystone: clock: fix main pll ratio div definitions
Khoronzhuk, Ivan [Tue, 23 Sep 2014 18:10:26 +0000 (21:10 +0300)]
ARM: keystone: clock: fix main pll ratio div definitions

The definitions for div ratio supposed to be in hex and were added
in dec by mistake.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
10 years agocommon: spl_sata: perform SCSI scan before getting device
Roger Quadros [Tue, 23 Sep 2014 15:07:04 +0000 (18:07 +0300)]
common: spl_sata: perform SCSI scan before getting device

At least on OMAP, init_sata() no longer performs scsi_scan()
so we must do it explicitly here.

Cc: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
10 years agoARM: OMAP5+: sata: Move scsi_scan() to the right place
Roger Quadros [Tue, 23 Sep 2014 15:07:03 +0000 (18:07 +0300)]
ARM: OMAP5+: sata: Move scsi_scan() to the right place

scsi_scan() must be called as part of scsi_init() and not
as part of sata_init().

Signed-off-by: Roger Quadros <rogerq@ti.com>
10 years agoOMAP5+: sata/scsi: Implement scsi_init()
Roger Quadros [Tue, 23 Sep 2014 15:07:02 +0000 (18:07 +0300)]
OMAP5+: sata/scsi: Implement scsi_init()

On OMAP platforms, SATA controller provides the SCSI subsystem
so implement scsi_init().

Get rid of the unnecessary sata_init() call from dra7xx-evm
and omap5-uevm board files.

Signed-off-by: Roger Quadros <rogerq@ti.com>
10 years agoahci: Don't start command DMA engine before buffers are set
Roger Quadros [Tue, 23 Sep 2014 15:07:01 +0000 (18:07 +0300)]
ahci: Don't start command DMA engine before buffers are set

The DMA/FIS buffers are set in ahci_port_start() which is called
after ahci_host_init(). So don't start the DMA engine here
(i.e. don't set FIS_RX)

This fixes the following error at kernel boot on OMAP platforms (e.g. DRA7x)
WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x260/0x358()
44000000.ocp:L3 Custom Error: MASTER SATA TARGET GPMC (Idle): Data Access in User mode during Functional access

Signed-off-by: Roger Quadros <rogerq@ti.com>
10 years agoomap3: overo: Fix fdtfile test
Stefan Herbrechtsmeier [Tue, 16 Sep 2014 15:51:05 +0000 (17:51 +0200)]
omap3: overo: Fix fdtfile test

Commit 12cc54376768461533b55ada1b0b6d4979f40579 'omap3: overo: Select
fdtfile for expansion board' wrongly missed the operator in the fdtfile
test. Update the test to only overwrite an empty fdtfile environment
variable.

Signed-off-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
10 years agocommon/board_r: Fix booting issue on T4240QDS
York Sun [Thu, 2 Oct 2014 22:20:10 +0000 (15:20 -0700)]
common/board_r: Fix booting issue on T4240QDS

Commit 294b91a5817147d4b7f47be2ac69bac2a1f26491 moved initr_malloc
earlier than initr_unlock_ram_in_cache. This causes issue on T4240.
It may be related to locked L1 d-cache and unlocked L2 cache. D-
cache could and should be unlock earlier for normal operation.

This patch moves initr_unlock_ram_in_cache before initr_malloc. It
has been verified on the following boards, in which only T4240QDS
suffered and has been since fixed: T4240QDS, T2080QDS, P5040DS,
P4080DS, MPC8572DS, MPC8536DS, MPC8641HPCN, B4860QDS.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
CC: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agopxe: Ensure we don't overflow bootargs
Ian Campbell [Fri, 3 Oct 2014 13:29:01 +0000 (14:29 +0100)]
pxe: Ensure we don't overflow bootargs

On a couple of platforms I've tripped over long PXE append lines overflowing
this array, due to having CONFIG_SYS_CBSIZE == 256. When doing preseeded Debian
installs it's pretty trivial to exceed that.

Since the symptom can be a silent hang or a crash add a check. Of course the
affected boards would also need an increased CBSIZE to actually work.

Note that due to the printing of the final bootargs string CONFIG_SYS_PBSIZE
also needs to be sufficiently large.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
[trini: Use %zd not %d in printf for all args]
Signed-off-by: Tom Rini <trini@ti.com>
10 years agoMerge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 10 Oct 2014 06:56:01 +0000 (08:56 +0200)]
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

10 years agomtd: denali: support NAND_CMD_RNDOUT command
Masahiro Yamada [Fri, 3 Oct 2014 11:03:04 +0000 (20:03 +0900)]
mtd: denali: support NAND_CMD_RNDOUT command

The function nand_flash_detect_ext_param_page() requires
NAND_CMD_RNDOUT command supported.  It is necessary to detect some
types of ONFi-compliant devices.  Without it, the error message
"unsupported command received 0x5" is shown.

Let's support this command on the Denali NAND controller driver.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Chin Liang See <clsee@altera.com>
10 years agomtd: denali: fix NAND_CMD_PARAM command
Masahiro Yamada [Fri, 3 Oct 2014 11:03:03 +0000 (20:03 +0900)]
mtd: denali: fix NAND_CMD_PARAM command

NAND_CMD_PARAM (0xEC) command is not working on the Denali
NAND controller driver.

Unlike NAND_CMD_READID (0x90), when the NAND_CMD_PARAM command
is followed by an address cycle, the target device goes busy.
(R/B# is deasserted)
Wait until the parameter data are ready.

In addition, unnecessary clear_interrupts() should be removed.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Chin Liang See <clsee@altera.com>
10 years agocompulab: eeprom: add default eeprom bus
Nikita Kiryanov [Wed, 17 Sep 2014 12:59:25 +0000 (15:59 +0300)]
compulab: eeprom: add default eeprom bus

Add default eeprom bus setting.
This addresses the trimslice compile error that was introduced
with the addition of this setting.

Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
10 years agoarm: rmobile: r8a7794: Skip initialize L2 cache
Nobuhiro Iwamatsu [Thu, 7 Aug 2014 23:44:02 +0000 (08:44 +0900)]
arm: rmobile: r8a7794: Skip initialize L2 cache

rmobile/lowlevel_init_ca15.S are common in r8a7790, r8a7791 and r8a7794 of
rmobile SoCs.  The initialize L2 cache in lowlevel_init_ca15.S only needed
for Cortex-A15. The r8a7794 is Cortex-A7, not Cortex-A15.
This adds Skip to initialize L2 cache when r8a7794.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
10 years agoarm: rmobile: r8a7791: Fix initialize L2 cache
Nobuhiro Iwamatsu [Thu, 7 Aug 2014 23:41:15 +0000 (08:41 +0900)]
arm: rmobile: r8a7791: Fix initialize L2 cache

rmobile/lowlevel_init_ca15.S are common in r8a7790 and r8a7791 of
rmobile SoC. But L2 cache of r8a7791 does not use L2CTLR[5].
This adds fix to set L2CTLR [5] only when the r8a7790.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
10 years agoarm: rmobile: Remove unnecessary initialization for l2ctlr
Nobuhiro Iwamatsu [Thu, 7 Aug 2014 00:10:45 +0000 (09:10 +0900)]
arm: rmobile: Remove unnecessary initialization for l2ctlr

This removes duplicate initialization of l2ctlr.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
10 years agoarm: rmobile: lager: Fix CPU frequency setting
Nobuhiro Iwamatsu [Wed, 30 Jul 2014 03:28:00 +0000 (12:28 +0900)]
arm: rmobile: lager: Fix CPU frequency setting

Setting to change the CPU frequency is only used version2.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
10 years agoarm: rmobile: lager: Add Qos setting for ES2
Nobuhiro Iwamatsu [Tue, 29 Jul 2014 03:14:05 +0000 (12:14 +0900)]
arm: rmobile: lager: Add Qos setting for ES2

This adds support version 0.963 for ES2 of lager board.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
10 years agoarm: rmobile: lager: Update Qos setting to version 0.955
Nobuhiro Iwamatsu [Tue, 29 Jul 2014 03:13:16 +0000 (12:13 +0900)]
arm: rmobile: lager: Update Qos setting to version 0.955

This updates QoS version 0.955 for ES1 of lager board.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
10 years agoarm: rmobile: alt: Update QoS initialization to version 0.11
Nobuhiro Iwamatsu [Thu, 24 Jul 2014 06:30:32 +0000 (15:30 +0900)]
arm: rmobile: alt: Update QoS initialization to version 0.11

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
10 years agoarm: rmobile: koelsch: Update QoS initialization to version 0.334
Nobuhiro Iwamatsu [Thu, 24 Jul 2014 06:28:04 +0000 (15:28 +0900)]
arm: rmobile: koelsch: Update QoS initialization to version 0.334

This update QoS version 0.334 for ES2 of R8A7791.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
10 years agoarm: rmobile: koelsch: Add CONFIG_SCIF_USE_EXT_CLK
Nobuhiro Iwamatsu [Sun, 27 Jul 2014 23:35:05 +0000 (08:35 +0900)]
arm: rmobile: koelsch: Add CONFIG_SCIF_USE_EXT_CLK

SCIF of koelsch use external clock mode.
This enables external clock mode on koelsch board.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
10 years agoarm: rmobile: lager: Add CONFIG_SCIF_USE_EXT_CLK
Nobuhiro Iwamatsu [Sun, 27 Jul 2014 23:35:05 +0000 (08:35 +0900)]
arm: rmobile: lager: Add CONFIG_SCIF_USE_EXT_CLK

SCIF of lager use external clock mode.
This enables external clock mode on lager board.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
10 years agoarm: rmobile: lager: Fix value of CONFIG_SH_SCIF_CLK_FREQ
Nobuhiro Iwamatsu [Sun, 27 Jul 2014 23:11:21 +0000 (08:11 +0900)]
arm: rmobile: lager: Fix value of CONFIG_SH_SCIF_CLK_FREQ

The clock of SCIF (serial port) of lager is supplied from External
Clock. And value of clock is 14.7456MHz.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
10 years agoMerge remote-tracking branch 'u-boot-imx/master'
Albert ARIBAUD [Wed, 8 Oct 2014 19:20:49 +0000 (21:20 +0200)]
Merge remote-tracking branch 'u-boot-imx/master'

The single file conflict below is actually trivial.

Conflicts:
board/boundary/nitrogen6x/nitrogen6x.c

10 years agosunxi: Fix gmac not working reliable on the Bananapi
Hans de Goede [Tue, 30 Sep 2014 16:45:32 +0000 (18:45 +0200)]
sunxi: Fix gmac not working reliable on the Bananapi

In order for the gmac nic to work reliable on the Bananapi, we need to set
bits 10-12 GTXDC "GMAC Transmit Clock Delay Chain" of the GMAC clk register
(0x01c20164) to 3.

Without this about 9 out of 10 ethernet packets get lost, with this setting
there is no packet loss.

So far setting these bits is only necessary on the Bananapi, so this commit
solves this with a bit of #ifdef CONFIG_BANANAPI code. If in the future we
need to do something similar for other boards, we can create a specific
CONFIG_FOO option for this then.

Reported-by: Karsten Merker <merker@debian.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Karsten Merker <merker@debian.org>
Tested-by: Zoltan HERPAI <wigyori@openwrt.org>
Tested-by: Tony Zhang <tony.zhang@lemaker.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agoodroid: clock: set aclk_cores to 200MHz
Przemyslaw Marczak [Tue, 23 Sep 2014 10:46:43 +0000 (12:46 +0200)]
odroid: clock: set aclk_cores to 200MHz

This change fixes suspend/resume issue in the kernel caused
by the wrong 'aclk_cores' clock value expected by the kernel.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
10 years agoexynos: update maintainer of Snow and SMDK5420 board
Masahiro Yamada [Fri, 26 Sep 2014 09:54:43 +0000 (18:54 +0900)]
exynos: update maintainer of Snow and SMDK5420 board

The email address of Rajeshwari Shinde <rajeshwari.s@samsung.com>
is not working.

This commit gives Akshay the maintainership of Snow and
SMDK5420 boards.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
10 years agoarmv7: s5pc1xx: improve cache handling
Robert Baldyga [Fri, 19 Sep 2014 10:17:55 +0000 (12:17 +0200)]
armv7: s5pc1xx: improve cache handling

Move cache handling code to C file, and add enable_caches() and
disable_caches() functions.

Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
10 years agoexynos: Enable pre-relocation malloc()
Simon Glass [Wed, 8 Oct 2014 04:01:52 +0000 (22:01 -0600)]
exynos: Enable pre-relocation malloc()

Enable this feature to support driver model before relocation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
10 years agosamsung: Enable device tree for smdkc100
Simon Glass [Wed, 8 Oct 2014 04:01:51 +0000 (22:01 -0600)]
samsung: Enable device tree for smdkc100

Change this board to add a device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
10 years agosamsung: Enable device tree for s5p_goni
Simon Glass [Wed, 8 Oct 2014 04:01:50 +0000 (22:01 -0600)]
samsung: Enable device tree for s5p_goni

Change this board to add a device tree.

This also adds a pinmux header file although it is not used as yet.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
10 years agoconfig: Move smdkv310 to use common exynos4 file
Simon Glass [Wed, 8 Oct 2014 04:01:49 +0000 (22:01 -0600)]
config: Move smdkv310 to use common exynos4 file

Most of the smdkv310 features are common with other exynos4 boards. To
permit easier addition of driver model support, use the common file and
add a device tree file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>