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8 years agoopenrisc: Fix build errors
Bin Meng [Mon, 25 Jan 2016 09:53:13 +0000 (01:53 -0800)]
openrisc: Fix build errors

With kernel.org toolchain, it reports:

  CC      arch/openrisc/lib/board.o
  arch/openrisc/lib/board.c:56:2: error: 'console_init_f' undeclared here (not in a function)
  arch/openrisc/lib/board.c: In function 'board_init':
  arch/openrisc/lib/board.c:120:2: warning: implicit declaration of function 'console_init_r'
  make[1]: *** [arch/openrisc/lib/board.o] Error 1
  make: *** [arch/openrisc/lib] Error 2

Include console.h will fix this.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
8 years agonet: eepro100: Fix build warnings
Bin Meng [Mon, 25 Jan 2016 09:26:26 +0000 (01:26 -0800)]
net: eepro100: Fix build warnings

When building katmai, it reports quite a lot

  warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Fix this by casting the dev->iobase with u_long.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agopowerpc: tqm834x: Fix build warnings in initdram()
Bin Meng [Mon, 25 Jan 2016 08:29:55 +0000 (00:29 -0800)]
powerpc: tqm834x: Fix build warnings in initdram()

With gcc 4.9, it produces the following warnings:

  CC      board/tqc/tqm834x/tqm834x.o
  board/tqc/tqm834x/tqm834x.c: In function 'initdram':
  board/tqc/tqm834x/tqm834x.c:325:12: warning: iteration 3u invokes undefined behavior [-Waggressive-loop-optimizations]
      (((base + size - 1) >> CSBNDS_EA_SHIFT) &
              ^
  board/tqc/tqm834x/tqm834x.c:80:2: note: containing loop
      for(cs = 0; cs < 4; ++cs) {
      ^

There is an integer overflow when cs = 3. To fix it, change
parameters of set_cs_bounds() to ulong.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
8 years agosh: sh7753evb: Fix build error
Bin Meng [Mon, 25 Jan 2016 05:45:46 +0000 (21:45 -0800)]
sh: sh7753evb: Fix build error

Currently buildman fails to build sh7753evb and reports the following:

  board/renesas/sh7753evb/built-in.o: In function 'init_gether_mdio':
  board/renesas/sh7753evb/sh7753evb.c:94: undefined reference to 'PMB_ADDR_BASE'
  board/renesas/sh7753evb/sh7753evb.c:94: undefined reference to 'PMB_DATA_BASE'
  board/renesas/sh7753evb/sh7753evb.c:94: undefined reference to 'mk_pmb_addr_val'
  board/renesas/sh7753evb/sh7753evb.c:94: undefined reference to 'mk_pmb_data_val'
  make: *** [u-boot] Error 1

The fix is to wrap any codes that access these macros with CONFIG_SH_32BIT.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
8 years agobug.h: move BUILD_BUG_* defines to include/linux/bug.h
Masahiro Yamada [Sun, 24 Jan 2016 14:27:48 +0000 (23:27 +0900)]
bug.h: move BUILD_BUG_* defines to include/linux/bug.h

BUILD_BUG_* macros have been defined in several headers.  It would
be nice to collect them in include/linux/bug.h like Linux.

This commit is cherry-picking useful macros from include/linux/bug.h
of Linux 4.4.

I did not import BUILD_BUG_ON_MSG() because it would not work if it
is used with include/common.h in U-Boot.  I'd like to postpone it
until the root cause (the "error()" macro in include/common.h causes
the name conflict with "__attribute__((error()))") is fixed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoRevert "devicetree: use wildcard to clean arch subdir"
Masahiro Yamada [Sat, 23 Jan 2016 18:50:02 +0000 (03:50 +0900)]
Revert "devicetree: use wildcard to clean arch subdir"

This reverts commit 67871a595873930a0a536b1685e5caac53766701.

Since that commit, out-of-tree cleaning emits lots of warnings.

$ make O=foo clean
make[1]: Entering directory `/home/masahiro/workspace/u-boot/foo'
../dts/../arch/arm/dts/Makefile:209: warning: overriding commands for target `dtbs'
../dts/../arch/arc/dts/Makefile:15: warning: ignoring old commands for target `dtbs'
../dts/../arch/microblaze/dts/Makefile:13: warning: overriding commands for target `dtbs'
../dts/../arch/arm/dts/Makefile:209: warning: ignoring old commands for target `dtbs'
../dts/../arch/mips/dts/Makefile:14: warning: overriding commands for target `dtbs'
../dts/../arch/microblaze/dts/Makefile:13: warning: ignoring old commands for target `dtbs'
../dts/../arch/nios2/dts/Makefile:13: warning: overriding commands for target `dtbs'
../dts/../arch/mips/dts/Makefile:14: warning: ignoring old commands for target `dtbs'
../dts/../arch/powerpc/dts/Makefile:13: warning: overriding commands for target `dtbs'
../dts/../arch/nios2/dts/Makefile:13: warning: ignoring old commands for target `dtbs'
../dts/../arch/sandbox/dts/Makefile:14: warning: overriding commands for target `dtbs'
../dts/../arch/powerpc/dts/Makefile:13: warning: ignoring old commands for target `dtbs'
../dts/../arch/x86/dts/Makefile:22: warning: overriding commands for target `dtbs'
../dts/../arch/sandbox/dts/Makefile:14: warning: ignoring old commands for target `dtbs'
make[1]: Leaving directory `/home/masahiro/workspace/u-boot/foo'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agonet: zynq_gem: Use shared wait_for_bit
Mateusz Kulikowski [Sat, 23 Jan 2016 10:54:33 +0000 (11:54 +0100)]
net: zynq_gem: Use shared wait_for_bit

Use existing library function to poll bit(s).
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
8 years agousb: ehci-mx6: Use shared wait_for_bit
Mateusz Kulikowski [Sat, 23 Jan 2016 10:54:32 +0000 (11:54 +0100)]
usb: ehci-mx6: Use shared wait_for_bit

Use existing library function to poll bit(s).

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
8 years agousb: ohci-lpc32xx: Use shared wait_for_bit
Mateusz Kulikowski [Sat, 23 Jan 2016 10:54:31 +0000 (11:54 +0100)]
usb: ohci-lpc32xx: Use shared wait_for_bit

Use existing library function to poll bit(s).

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
8 years agousb: dwc2: Use shared wait_for_bit
Mateusz Kulikowski [Sat, 23 Jan 2016 10:54:30 +0000 (11:54 +0100)]
usb: dwc2: Use shared wait_for_bit

Use existing library function to poll bit(s).

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
8 years agolib: Add wait_for_bit
Mateusz Kulikowski [Sat, 23 Jan 2016 10:54:29 +0000 (11:54 +0100)]
lib: Add wait_for_bit

Add function to poll register waiting for specific bit(s).
Similar functions are implemented in few drivers - they are almost
identical and can be generalized.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agocommon/console.c: Remove unused inline functions
Tom Rini [Thu, 21 Jan 2016 14:10:26 +0000 (09:10 -0500)]
common/console.c: Remove unused inline functions

clang-3.8 reports that these functions are unused, remove them.  As this
is the last part of CONFIG_MODEM_SUPPORT_DEBUG, drop that from README.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agopart: Drop duplication declaration of block_dev_desc_t
Simon Glass [Thu, 21 Jan 2016 03:12:07 +0000 (20:12 -0700)]
part: Drop duplication declaration of block_dev_desc_t

This is already defined in ide.h, which part.h includes. So we don't need
the duplicate typedef. At least with my old blackfin gcc 4.3.5 tool chain,
this causes an error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoenv_mmc: support overriding mmc dev from board code
Clemens Gruber [Wed, 20 Jan 2016 14:43:37 +0000 (15:43 +0100)]
env_mmc: support overriding mmc dev from board code

This enables boards to choose where to/from the environment should be
saved/loaded. They can then for example support using the same device
(dynamically) from which the bootloader was launched to load and save
env data and do not have to define CONFIG_SYS_MMC_ENV_DEV statically.

In my use case, the environment needs to be on the same device I
booted from. It can be the eMMC or an optional SD card.
I therefore would override mmc_get_env_dev in the board code, read the
CPU registers to determine where we booted from and return the
corresponding device index.

Cc: Tom Rini <trini@konsulko.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoserial: Remove serial_putc_raw_dev
Tom Rini [Wed, 20 Jan 2016 12:23:05 +0000 (07:23 -0500)]
serial: Remove serial_putc_raw_dev

clang-3.8 reports that serial_putc_raw_dev in serial_ns16550.c is
unused.  Further investigation shows that we have 3 places that
implement this function and no callers, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agobootm: fix size arg of flush_cache() in bootm_load_os().
Purna Chandra Mandal [Wed, 20 Jan 2016 08:37:39 +0000 (14:07 +0530)]
bootm: fix size arg of flush_cache() in bootm_load_os().

Variable _load_end_ points to end address of uncompressed buffer
(*not* uncomress_buffer_end / sizeof(ulong)), so multipling uncompressed
size with sizeof(ulong) is grossly incorrect in flush_cache().
It might lead to access of address beyond valid memory range and hang the CPU.

Tested on MIPS architecture by using compressed(gzip, lzma)
and uncompressed uImage.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
8 years agoarm, powerpc: Update cc-version tests to check for cc-name as well
Tom Rini [Wed, 20 Jan 2016 01:39:02 +0000 (20:39 -0500)]
arm, powerpc: Update cc-version tests to check for cc-name as well

For compatibility clang will report some gcc version.  However since we
are checking gcc versions in order to then fail to build, we should
limit these tests only to when we are using gcc and not clang.

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agokbuild: Add clang detection
Tom Rini [Wed, 20 Jan 2016 01:39:01 +0000 (20:39 -0500)]
kbuild: Add clang detection

Adapted from:

>From 5631d9c429857194bd55d7bcd8fa5bdd1a9899a3 Mon Sep 17 00:00:00 2001
From: Michal Marek <mmarek@suse.com>
Date: Wed, 19 Aug 2015 17:36:41 +0200
Subject: [PATCH 1/1] kbuild: Fix clang detection

We cannot detect clang before including the arch Makefile, because that
can set the default cross compiler. We also cannot detect clang after
including the arch Makefile, because powerpc wants to know about clang.
Solve this by using an deferred variable. This costs us a few shell
invocations, but this is only a constant number.

Reported-by: Behan Webster <behanw@converseincode.com>
Reported-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Michal Marek <mmarek@suse.com>
in the Linux kernel.

This will allow us to make better decisions about when to run tests
later on for gcc features.

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoRemove the cmd_ prefix from command files
Simon Glass [Mon, 18 Jan 2016 03:53:52 +0000 (20:53 -0700)]
Remove the cmd_ prefix from command files

Now that they are in their own directory, we can remove this prefix.
This makes it easier to find a file since the prefix does not get in the
way.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
8 years agoMove all command code into its own directory
Simon Glass [Mon, 18 Jan 2016 03:53:51 +0000 (20:53 -0700)]
Move all command code into its own directory

There are a lot of unrelated files in common, including all of the commands.
Moving them into their own directory makes them easier to find and is more
logical.

Some commands include non-command code, such as cmd_scsi.c. This should be
sorted out at some point so that the function can be enabled with or without
the associated command.

Unfortunately, with m68k I get this error:

m68k:  +   M5329AFEE
+arch/m68k/cpu/mcf532x/start.o: In function `_start':
+arch/m68k/cpu/mcf532x/start.S:159:(.text+0x452): relocation truncated to fit: R_68K_PC16 against symbol `board_init_f' defined in .text.board_init_f section in common/built-in.o

I hope someone can shed some light on what this means. I hope it isn't
depending on the position of code in the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
8 years agox86: ivybridge: Use syscon for the GMA device
Simon Glass [Sun, 17 Jan 2016 23:11:59 +0000 (16:11 -0700)]
x86: ivybridge: Use syscon for the GMA device

Until we have a proper video uclass we can use syscon to handle the GMA
device, and avoid the special device tree and PCI searching. Update the code
to work this way.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: Set up a shared syscon numbering schema
Simon Glass [Sun, 17 Jan 2016 23:11:58 +0000 (16:11 -0700)]
x86: Set up a shared syscon numbering schema

Each system controller can have a number to identify it. It can then be
accessed using syscon_get_by_driver_data(). Put this in a shared header
file and update the only current user.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Drop the SMM-locking code
Simon Glass [Sun, 17 Jan 2016 23:11:57 +0000 (16:11 -0700)]
x86: ivybridge: Drop the SMM-locking code

U-Boot does not support SMM yet, so we can drop this code. It is easy to
bring back when needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Drop XHCI support
Simon Glass [Sun, 17 Jan 2016 23:11:56 +0000 (16:11 -0700)]
x86: ivybridge: Drop XHCI support

This is not used on link which is the only ivybridge board. Drop this code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Drop special EHCI init
Simon Glass [Sun, 17 Jan 2016 23:11:55 +0000 (16:11 -0700)]
x86: ivybridge: Drop special EHCI init

This is not needed. On reset wake-on-disconnect is already set. It may a
problem during a soft reset or resume, but for now it does not seem
important. Also drop the command register update since PCI auto-config
does it for us.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Sort out the calls to bridge_silicon_revision()
Simon Glass [Sun, 17 Jan 2016 23:11:54 +0000 (16:11 -0700)]
x86: ivybridge: Sort out the calls to bridge_silicon_revision()

This function is called all over the place. Convert it use the driver model
PCI API, and rationalise the calls.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Move code from pch.c to bd82x6x.c
Simon Glass [Sun, 17 Jan 2016 23:11:53 +0000 (16:11 -0700)]
x86: ivybridge: Move code from pch.c to bd82x6x.c

This code relates to the PCH, so we should move it into the same file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Convert pch.c to use DM PCI API
Simon Glass [Sun, 17 Jan 2016 23:11:52 +0000 (16:11 -0700)]
x86: ivybridge: Convert pch.c to use DM PCI API

Convert this file to use the driver model PCI API.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Convert report_platform to DM PCI API
Simon Glass [Sun, 17 Jan 2016 23:11:51 +0000 (16:11 -0700)]
x86: ivybridge: Convert report_platform to DM PCI API

Convert these functions to use the driver model PCI API.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Convert SDRAM init to use driver model
Simon Glass [Sun, 17 Jan 2016 23:11:50 +0000 (16:11 -0700)]
x86: ivybridge: Convert SDRAM init to use driver model

SDRAM init needs access to the Northbridge controller and the Intel
Management Engine device. Add the latter to the device tree and convert all
of this code to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: chromebook_link: Enable the syscon uclass
Simon Glass [Sun, 17 Jan 2016 23:11:49 +0000 (16:11 -0700)]
x86: chromebook_link: Enable the syscon uclass

We will use a system controller to model the Intel Management Engine. Enable
this for link.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Convert sdram_initialise() to use DM PCI API
Simon Glass [Sun, 17 Jan 2016 23:11:48 +0000 (16:11 -0700)]
x86: ivybridge: Convert sdram_initialise() to use DM PCI API

Convert this function to use the the driver model PCI API. We just need
to pass in the northbridge device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Convert dram_init() to use DM PCI API
Simon Glass [Sun, 17 Jan 2016 23:11:47 +0000 (16:11 -0700)]
x86: ivybridge: Convert dram_init() to use DM PCI API

Convert the top part of the DRAM init to use the driver model PCI API.
Further work will complete the transformation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Convert enable_usb_bar() to use DM PCI API
Simon Glass [Sun, 17 Jan 2016 23:11:46 +0000 (16:11 -0700)]
x86: ivybridge: Convert enable_usb_bar() to use DM PCI API

Convert this function over to use the driver model PCI API. In this case
we want to avoid using the real PCI devices since they have not yet been
probed. Instead, write directly to their PCI configuration address.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Use the I2C driver to perform SMbus init
Simon Glass [Sun, 17 Jan 2016 23:11:45 +0000 (16:11 -0700)]
x86: ivybridge: Use the I2C driver to perform SMbus init

Move the init code into the I2C driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: i2c: Add a stub driver for Intel I2C/SMbus
Simon Glass [Sun, 17 Jan 2016 23:11:44 +0000 (16:11 -0700)]
x86: i2c: Add a stub driver for Intel I2C/SMbus

This is used on most Intel platforms. We don't have a driver for it yet, but
add a stub to handle the init. For now this targets ivybridge so we may want
to add a device tree binding and generalise it when other platforms are
supported.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: Enable DM_USB for link and panther
Simon Glass [Sun, 17 Jan 2016 23:11:43 +0000 (16:11 -0700)]
x86: Enable DM_USB for link and panther

Move these two boards to use driver model for USB.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Convert lpc init code to DM PCI API
Simon Glass [Sun, 17 Jan 2016 23:11:42 +0000 (16:11 -0700)]
x86: ivybridge: Convert lpc init code to DM PCI API

Adjust this code to use the driver model PCI API. This is all called through
lpc_init_extra().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Drop the special PCI driver
Simon Glass [Sun, 17 Jan 2016 23:11:41 +0000 (16:11 -0700)]
x86: ivybridge: Drop the special PCI driver

There is nothing special about the ivybridge pci driver now, so just use
the generic one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Move LPC init into the LPC probe() method
Simon Glass [Sun, 17 Jan 2016 23:11:40 +0000 (16:11 -0700)]
x86: ivybridge: Move LPC init into the LPC probe() method

Drop the lpc_init_extra() function and just use the post-relocation LPC
probe() instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Move lpc_enable() into gma.c
Simon Glass [Sun, 17 Jan 2016 23:11:39 +0000 (16:11 -0700)]
x86: ivybridge: Move lpc_enable() into gma.c

This graphics init code is best placed in the gma init code. Move the code
and drop the function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Use driver model PCI API in sata.c
Simon Glass [Sun, 17 Jan 2016 23:11:38 +0000 (16:11 -0700)]
x86: ivybridge: Use driver model PCI API in sata.c

Adjust the functions in this file to use the driver model PCI API.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Use the SATA driver to do the init
Simon Glass [Sun, 17 Jan 2016 23:11:37 +0000 (16:11 -0700)]
x86: ivybridge: Use the SATA driver to do the init

Instead of manually initing the device, probe the SATA device and move the
init there.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Drop the unused bd82x6x_init_extra()
Simon Glass [Sun, 17 Jan 2016 23:11:36 +0000 (16:11 -0700)]
x86: ivybridge: Drop the unused bd82x6x_init_extra()

This function does nothing now so can be dropped.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Do the SATA init before relocation
Simon Glass [Sun, 17 Jan 2016 23:11:35 +0000 (16:11 -0700)]
x86: ivybridge: Do the SATA init before relocation

The SATA device needs to set itself up so that it appears correctly on the
PCI bus. The easiest way to do this is to set it up to probe before
relocation. This can do the early setup.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoahci: Add a disk-controller uclass
Simon Glass [Sun, 17 Jan 2016 23:11:34 +0000 (16:11 -0700)]
ahci: Add a disk-controller uclass

Add a uclass ID for a disk controller. This can be used by AHCI/SATA or
other controller types. There are no operations and no interface so far,
but it is possible to probe a SATA device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Drop unnecessary northbridge setup
Simon Glass [Sun, 17 Jan 2016 23:11:33 +0000 (16:11 -0700)]
x86: ivybridge: Drop unnecessary northbridge setup

This is done by default with PCI auto-config. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Use driver model PCI API in bd82x6x.c
Simon Glass [Sun, 17 Jan 2016 23:11:32 +0000 (16:11 -0700)]
x86: ivybridge: Use driver model PCI API in bd82x6x.c

Adjust most of the remaining functions in this file to use the driver model
PCI API. The one remaining function is bridge_silicon_revision() which will
need a little more work.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Move northbridge and PCH init into drivers
Simon Glass [Sun, 17 Jan 2016 23:11:31 +0000 (16:11 -0700)]
x86: ivybridge: Move northbridge and PCH init into drivers

Instead of calling the northbridge and PCH init from bd82x6x_init_extra()
when the PCI bus is probed, call it from the respective drivers. Also drop
the Northbridge init as it has no effect. The registers it touches appear to
be read-only.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: Bring up northbridge, pch and lpc after the CPUs
Simon Glass [Sun, 17 Jan 2016 23:11:30 +0000 (16:11 -0700)]
x86: Bring up northbridge, pch and lpc after the CPUs

These devices currently need to be inited early in boot. Once we have the
init in the right places (with each device doing its own init and no
problems with ordering) we should be able to remove this. For now it is
needed to keep things working.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: Don't show an error when the MRC cache is up to date
Simon Glass [Sun, 17 Jan 2016 23:11:29 +0000 (16:11 -0700)]
x86: Don't show an error when the MRC cache is up to date

When the final MRC cache record is the same as the one we want to write, we
skip writing since there is no point. This is normal behaviour.

Avoiding printing an error when this happens.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: Make x86_init_cpus() static
Simon Glass [Sun, 17 Jan 2016 23:11:28 +0000 (16:11 -0700)]
x86: Make x86_init_cpus() static

There are no other implementations of this function, and boards that need it
can implement a CPU driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Move early init code into northbridge.c
Simon Glass [Sun, 17 Jan 2016 23:11:27 +0000 (16:11 -0700)]
x86: ivybridge: Move early init code into northbridge.c

This code is now part of the northbridge driver, so move it into the same
place.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Drop the dead MTRR code
Simon Glass [Sun, 17 Jan 2016 23:11:26 +0000 (16:11 -0700)]
x86: ivybridge: Drop the dead MTRR code

This is not used and MTRRs are set up elsewhere now. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Set up the thermal target correctly
Simon Glass [Sun, 17 Jan 2016 23:11:25 +0000 (16:11 -0700)]
x86: ivybridge: Set up the thermal target correctly

This uses a non-existent node at present. It should use the first CPU node.
The referenced property does not exist (the correct value is the default of
0), but this allows the follow-on init to complete.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Move CPU init code into the driver
Simon Glass [Sun, 17 Jan 2016 23:11:24 +0000 (16:11 -0700)]
x86: ivybridge: Move CPU init code into the driver

Use the CPU driver's probe() method to perform the CPU init. This will happen
automatically when the first CPU is probed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Use common CPU init code
Simon Glass [Sun, 17 Jan 2016 23:11:23 +0000 (16:11 -0700)]
x86: ivybridge: Use common CPU init code

The existing ivybridge code predates the normal multi-core CPU init, and
it is not used. Remove it and add CPU nodes to the device tree so that all
four CPUs are set up. Also enable the 'cpu' command.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Move GPIO init to the LPC init() method
Simon Glass [Sun, 17 Jan 2016 23:11:22 +0000 (16:11 -0700)]
x86: ivybridge: Move GPIO init to the LPC init() method

This init can happen in the driver also. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Move sandybridge init to the lpc probe() method
Simon Glass [Sun, 17 Jan 2016 23:11:21 +0000 (16:11 -0700)]
x86: ivybridge: Move sandybridge init to the lpc probe() method

The watchdog can be reset later when probing the LPC after relocation.
Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Move graphics init much later
Simon Glass [Sun, 17 Jan 2016 23:11:20 +0000 (16:11 -0700)]
x86: ivybridge: Move graphics init much later

We don't need to init the graphics controller so early. Move it alongside
the other graphics setup, just before we run the ROM.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Probe the LPC in CPU init
Simon Glass [Sun, 17 Jan 2016 23:11:19 +0000 (16:11 -0700)]
x86: ivybridge: Probe the LPC in CPU init

We can drop the explicit probe of the PCH since the LPC is a child device
and this will happen automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Rename lpc_init() to lpc_init_extra()
Simon Glass [Sun, 17 Jan 2016 23:11:18 +0000 (16:11 -0700)]
x86: ivybridge: Rename lpc_init() to lpc_init_extra()

In preparation for adding an init() method to the LPC uclass, rename this
existing function so that it will not conflict.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Move LPC and PCH init into northbridge probe()
Simon Glass [Sun, 17 Jan 2016 23:11:17 +0000 (16:11 -0700)]
x86: ivybridge: Move LPC and PCH init into northbridge probe()

Move more code into the northbridge probe() function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Move northbridge init into the probe() method
Simon Glass [Sun, 17 Jan 2016 23:11:16 +0000 (16:11 -0700)]
x86: ivybridge: Move northbridge init into the probe() method

Now that we have a proper driver for the nortbridge, set it up in by probing
it, and move the early init code into the probe() method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Add a driver for the bd82x6x northbridge
Simon Glass [Sun, 17 Jan 2016 23:11:15 +0000 (16:11 -0700)]
x86: ivybridge: Add a driver for the bd82x6x northbridge

Add a driver with an empty probe function where we can move init code in
follow-on patches.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: x86: Add a northbridge uclass
Simon Glass [Sun, 17 Jan 2016 23:11:14 +0000 (16:11 -0700)]
dm: x86: Add a northbridge uclass

Add a uclass for the northbridge / SDRAM controller found on some older
Intel chipsets.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Rename bd82x6x_init()
Simon Glass [Sun, 17 Jan 2016 23:11:13 +0000 (16:11 -0700)]
x86: ivybridge: Rename bd82x6x_init()

Rename the existing bd82x6x_init() to bd82x6x_init_extra(). We will remove
this in a later patch.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Move more init to the probe() function
Simon Glass [Sun, 17 Jan 2016 23:11:12 +0000 (16:11 -0700)]
x86: ivybridge: Move more init to the probe() function

Move SPI and port80 init to lpc_early_init(), called from the LPC's probe()
method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Move lpc_early_init() to probe()
Simon Glass [Sun, 17 Jan 2016 23:11:11 +0000 (16:11 -0700)]
x86: ivybridge: Move lpc_early_init() to probe()

Move this code to the LPC's probe() method so that it will happen
automatically when the LPC is probed before relocation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: ivybridge: Set up the LPC device using driver model
Simon Glass [Sun, 17 Jan 2016 23:11:10 +0000 (16:11 -0700)]
x86: ivybridge: Set up the LPC device using driver model

Find the LPC device in arch_cpu_init_dm() as a first step to converting
this code to use driver model. Probing the LPC will probe its parent (the
PCH) automatically, so make sure that probing the PCH does nothing before
relocation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: pci: Convert bios_emu to use the driver model PCI API
Simon Glass [Sun, 17 Jan 2016 23:11:09 +0000 (16:11 -0700)]
dm: pci: Convert bios_emu to use the driver model PCI API

At present this BIOS emulator uses a bus/device/function number. Change
it to use a device if CONFIG_DM_PCI is enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: syscon: Allow finding devices by driver data
Simon Glass [Sun, 17 Jan 2016 23:11:08 +0000 (16:11 -0700)]
dm: syscon: Allow finding devices by driver data

We have a way to find a regmap by its syscon driver data value. Add the same
for syscon itself.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: usb: Add a compatible string for PCI EHCI controller
Simon Glass [Sun, 17 Jan 2016 23:11:07 +0000 (16:11 -0700)]
dm: usb: Add a compatible string for PCI EHCI controller

Add a compatible string to allow this to be specified in the device tree
if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: core: Display the error number when driver binding fails
Simon Glass [Sun, 17 Jan 2016 23:11:06 +0000 (16:11 -0700)]
dm: core: Display the error number when driver binding fails

This is often -96 (-EPFNOSUPPORT) which indicates that the uclass is not
compiled in. Display the error number to make this easier to spot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: x86: Drop the weak cpu_irq_init() function
Simon Glass [Wed, 20 Jan 2016 04:32:32 +0000 (21:32 -0700)]
dm: x86: Drop the weak cpu_irq_init() function

There are no callers now. Platforms which need to set up interrupts their
own way can implement an interrupt driver. Drop this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: x86: queensbay: Add an interrupt driver
Simon Glass [Wed, 20 Jan 2016 04:32:31 +0000 (21:32 -0700)]
dm: x86: queensbay: Add an interrupt driver

Add a driver for interrupts on queensbay and move the code currently in
cpu_irq_init() into its probe() method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: x86: quark: Add an interrupt driver
Simon Glass [Wed, 20 Jan 2016 04:32:30 +0000 (21:32 -0700)]
dm: x86: quark: Add an interrupt driver

Add a driver for interrupts on quark and move the code currently in
cpu_irq_init() into its probe() method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: Drop the irq router compatible string
Simon Glass [Wed, 20 Jan 2016 04:32:29 +0000 (21:32 -0700)]
x86: Drop the irq router compatible string

We use driver model for this now, so we don't need this string.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: Use the IRQ device when setting up the mptable
Simon Glass [Wed, 20 Jan 2016 04:32:28 +0000 (21:32 -0700)]
x86: Use the IRQ device when setting up the mptable

Instead of searching for the device tree node, use the IRQ device which has
a record of it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: x86: Add a common PIRQ init function
Simon Glass [Wed, 20 Jan 2016 04:32:27 +0000 (21:32 -0700)]
dm: x86: Add a common PIRQ init function

Most x86 interrupt drivers will want to use the standard PIRQ routing and
table setup. Put this code in a common function so it can be used by those
drivers that want it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: x86: Set up interrupt routing from interrupt_init()
Simon Glass [Wed, 20 Jan 2016 04:32:26 +0000 (21:32 -0700)]
dm: x86: Set up interrupt routing from interrupt_init()

At present interrupt routing is set up from arch_misc_init(). We can do it
a little later instead, in interrupt_init().

This removes the manual pirq_init() call. Where the platform does not have
an interrupt router defined in its device tree, no error is generated. Some
platforms do not have this.

Drop pirq_init() since it is no-longer used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: x86: Create a driver for x86 interrupts
Simon Glass [Wed, 20 Jan 2016 04:32:25 +0000 (21:32 -0700)]
dm: x86: Create a driver for x86 interrupts

It seems likely that at some point we will want a generic interrupt uclass.
But this is a big undertaking as it involves unifying code across multiple
architectures.

As a first step, create a simple IRQ uclass and a driver for x86. This can
be generalised later as required.

Adjust pirq_init() to probe this driver, which has the effect of creating
routing tables and setting up the interrupt routing. This is a start
towards making interrupts fit better with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: x86: spi: Convert ICH SPI driver to driver model PCI API
Simon Glass [Tue, 19 Jan 2016 03:19:21 +0000 (20:19 -0700)]
dm: x86: spi: Convert ICH SPI driver to driver model PCI API

At present this SPI driver works by searching the PCI buses for its
peripheral. It also uses the legacy PCI API.

In addition the driver has code to determine the type of Intel PCH that is
used (version 7 or version 9). Now that we have proper PCH drivers we can
use those to obtain the information we need.

While the device tree has a node for the SPI peripheral it is not in the
right place. It should be on the PCI bus as a sub-peripheral of the LPC
device.

Update the device tree files to show the SPI controller within the PCH, so
that PCI access works as expected.

This patch includes Bin's fix-up patch from here:

   https://patchwork.ozlabs.org/patch/569478/

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
8 years agospi: ich: Separate out the read/write trace from normal debugging
Simon Glass [Tue, 19 Jan 2016 03:19:20 +0000 (20:19 -0700)]
spi: ich: Separate out the read/write trace from normal debugging

The trace is seldom useful for basic debugging. Allow it to be enabled
separately so that it is easier to see the more important init and error
debug messages.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: x86: Add a driver for Intel PCH9
Simon Glass [Tue, 19 Jan 2016 03:19:19 +0000 (20:19 -0700)]
dm: x86: Add a driver for Intel PCH9

At some point we may need to distinguish between different types of PCHs,
but for existing supported platforms we only need to worry about version 7
and version 9 bridges. Add a driver for the PCH9.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: x86: Add a driver for Intel PCH7
Simon Glass [Tue, 19 Jan 2016 03:19:18 +0000 (20:19 -0700)]
dm: x86: Add a driver for Intel PCH7

At some point we may need to distinguish between different types of PCHs,
but for existing supported platforms we only need to worry about version 7
and version 9 bridges. Add a driver for the PCH7.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: Expand the uclass for Platform Controller Hubs (PCH)
Simon Glass [Tue, 19 Jan 2016 03:19:17 +0000 (20:19 -0700)]
dm: Expand the uclass for Platform Controller Hubs (PCH)

A Platform Controller Hub is an Intel concept - it is like the peripherals
on an SoC and is often in a separate chip from the CPU. The chip is typically
found on the first PCI bus and integrates multiple devices.

We have a very simple uclass to support PCHs. Add a few operations, such as
setting up the devices on the PCH and finding the SPI controller base
address. Also move it into drivers/pch/ since we will be adding a few PCH
drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: pci: Avoid using pci_bus_to_hose() in the uclass
Simon Glass [Tue, 19 Jan 2016 03:19:16 +0000 (20:19 -0700)]
dm: pci: Avoid using pci_bus_to_hose() in the uclass

This function is only available for compatibility with old code. Avoid
using it in the uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: pci: Add a function to write a BAR
Simon Glass [Tue, 19 Jan 2016 03:19:15 +0000 (20:19 -0700)]
dm: pci: Add a function to write a BAR

Add a driver-model version of the pci_write_bar32 function so that this is
supported in the new API.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: pci: Move pci_bus_to_hose() to compatibility
Simon Glass [Tue, 19 Jan 2016 03:19:14 +0000 (20:19 -0700)]
dm: pci: Move pci_bus_to_hose() to compatibility

This function should not be used by driver-model code, so move it to the
compatibility portion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoMerge git://git.denx.de/u-boot-fdt
Tom Rini [Fri, 22 Jan 2016 22:01:22 +0000 (17:01 -0500)]
Merge git://git.denx.de/u-boot-fdt

8 years agodevicetree: use wildcard to clean arch subdir
Thomas Chou [Wed, 6 Jan 2016 01:49:24 +0000 (09:49 +0800)]
devicetree: use wildcard to clean arch subdir

Use wildcard to clean arch subdirectories, as it is cleaner than
listing all the arch which builds dtb.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agorockchip: Update the README
Simon Glass [Fri, 22 Jan 2016 02:45:25 +0000 (19:45 -0700)]
rockchip: Update the README

GPIO, I2C, LCD and HDMI are now implemented. We have more than one PMIC.
There is an implementation to run the CPU at full speed although it does
not seem to make much difference.

Update the README to cover recent developments.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: Add support for Raxda Rock 2
Simon Glass [Fri, 22 Jan 2016 02:45:24 +0000 (19:45 -0700)]
rockchip: Add support for Raxda Rock 2

This board includes an RK3288 SoC on a SOM. It can be mounted on a
base-board which provides a wide range of peripherals.

So far this is verified to boot to a prompt from a microSD card. The serial
console works as well as HDMI.

Thanks to Tom Cubie for sending me a board.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: rock2: dts: Make changes for U-Boot
Simon Glass [Fri, 22 Jan 2016 02:45:23 +0000 (19:45 -0700)]
rockchip: rock2: dts: Make changes for U-Boot

Add the required pre-relocation tags and SDRAM init information for U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: rock2: Bring in device tree files from Linux
Simon Glass [Fri, 22 Jan 2016 02:45:22 +0000 (19:45 -0700)]
rockchip: rock2: Bring in device tree files from Linux

Bring in the current device tree files for rock2 from linux/next commit
719d6c1. Hopefully this is the latest one.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: dts: Sync up SPDIF node with Linux
Simon Glass [Fri, 22 Jan 2016 02:45:21 +0000 (19:45 -0700)]
rockchip: dts: Sync up SPDIF node with Linux

This has been added and we have references to it in the rock2 board. Add
this node.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: firefly-rk3288: Enable HDMI output
Simon Glass [Fri, 22 Jan 2016 02:45:20 +0000 (19:45 -0700)]
rockchip: firefly-rk3288: Enable HDMI output

Enable HDMI output and a console on firefly.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: jerry: Enable EDP and HDMI video output
Simon Glass [Fri, 22 Jan 2016 02:45:19 +0000 (19:45 -0700)]
rockchip: jerry: Enable EDP and HDMI video output

Enable these devices using the VOPL video output device. We explicitly
disable VOPB in the device tree to avoid it taking over. Since this device
has an LCD display this comes up by default. If the display fails for some
reason then it will attempt to use HDMI. It is possible to force it to fail
(and thus fall back to HDMI) by puting 'return -EPERM' at the top of
rk_edp_probe(). For now there is no easy way to select between the two.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: jerry: Add support for timing SPI flash speed
Simon Glass [Fri, 22 Jan 2016 02:45:18 +0000 (19:45 -0700)]
rockchip: jerry: Add support for timing SPI flash speed

Add the 'time' and 'sf test' commands so that we can test SPI flash
performance.

Signed-off-by: Simon Glass <sjg@chromium.org>