Simon Glass [Wed, 17 May 2017 14:23:05 +0000 (08:23 -0600)]
common: powerpc: Move arch-specific headers
Set up a new asm/ppc.h header file to hold this arch-specific stuff. It
should not be in common.h. It probably should be refactored to use
asm/arch instead, but that is a job for the maintainer.
Tom Rini [Tue, 16 May 2017 18:46:40 +0000 (14:46 -0400)]
t81xx: Migrate TI81XX/TI816X/TI814X symbols to Kconfig
The symbol CONFIG_TI81XX is used for the parts that are common to the
TI816x and TI814x SoCs and are not part of CONFIG_ARCH_OMAP2PLUS nor
CONFIG_AM33XX. It however has so few uses that we can just modify the
code to check for both and drop the symbol. The symbols CONFIG_TI816X
and CONFIG_TI814X are for the repective SoCs.
Tom Rini [Tue, 16 May 2017 18:46:39 +0000 (14:46 -0400)]
ti816x: Modernize the defconfig
- Switch to using <configs/ti_armv7_omap.h> and family. This lets us
drop lots of custom defines.
- Ensure that our default environment uses DEFAULT_LINUX_BOOT_ENV so
that Linux will boot correctly.
- Enable CONFIG_DISTRO_DEFAULTS
- Switch to using CONFIG_OF_CONTROL
- Various other cleanups to match other SoCs in the family line.
Tom Rini [Tue, 16 May 2017 18:46:36 +0000 (14:46 -0400)]
ti816x_evm: Disable CONFIG_USE_PRIVATE_LIBGCC
On this platform, we can trace a general failure to boot to enabling /
disabling this option. When this is enabled, we go off into the
weeds during SPL and are unable to talk with the SD card and
mmc_initialize() fails.
Tom Rini [Tue, 16 May 2017 18:46:35 +0000 (14:46 -0400)]
ti816x: Rework DDR initialization sequence
The ti816x/am389x SoC is the first generation in what U-Boot calls the
"am33xx" family. In the first generation of this family the DDR
initialization sequence is quite different from all of the subsequent
generations. Whereas with ti814x (second generation) we can easily work
the minor differenced between that and am33xx (third generation), our
attempts to do this for ti816x weren't sufficient. Rather than add a
large amount of #ifdef logic to make this different sequence work we add
a new file, ti816x_emif4.c to handle the various required undocumented
register writes and sequence and leverage what we can from
arch/arm/mach-omap2/am33xx/ddr.c still. As DDR2 has similar problems
today but I am unable to test it, we drop the DDR2 defines from the code
rather than imply that it works by leaving it. We also remove a bunch
of other untested code about changing the speed the DDR runs at.
Tom Rini [Tue, 16 May 2017 18:46:34 +0000 (14:46 -0400)]
armv7: Mark the default lowlevel_init function as weak
Rather than have a long and if check in the Makefile, mark the default
lowlevel_init function as weak (as we do on armv8) so that SoCs can
override it if needed, and it will still be discarded if unused.
Provide a weak s_init as well to allow for this to link and be
discarded.
Anna, Suman [Tue, 16 May 2017 17:50:18 +0000 (12:50 -0500)]
configs: davinci: omapl138_lcdk: add random eth address support
Any TFTP or DHCP boot on the Davinci OMAP-L138 LCDK board requires
that the 'ethaddr' variable be defined. There are no e-fuses to store
the ethernet mac address for this platform, and neither is a MAC
address reserved in any format. So enable random MAC address support
so that networking boot can be supported.
Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Bin Meng [Thu, 1 Jun 2017 10:41:14 +0000 (03:41 -0700)]
x86: fsp: Remove the call to set up internal uart in fsp_init()
First of all, it's inappropriate to call setup_internal_uart() in a
generic API fsp_init(), as CONFIG_INTERNAL_UART is an option that
is only available on BayTrail platform. Secondly even for BayTrail,
there is no need to call setup_internal_uart() at all, as Intel FSP
will do this for us.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 1 Jun 2017 10:41:13 +0000 (03:41 -0700)]
x86: baytrail: Fix boot hang with a debug build
It was observed that when -DDEBUG is used to generate a debug build,
U-Boot does not boot on MinnowMax board. A workaround is to disable
CONFIG_DEBUG_UART. The real issue is that in order to have the debug
uart to work, BayTrail SoC needs to be configured so that its internal
uart is available to be used as the debug uart.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 31 May 2017 08:04:15 +0000 (01:04 -0700)]
x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer
At present lpe/lpss-sio/scc FSP properties are all boolean, but in
fact for "enable-lpe" it has 3 possible options. This adds macros
for these options and change the property from a boolean type to
an integer type, and change their names to explicitly indicate what
the property is really for.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 2 Jun 2017 15:03:50 +0000 (11:03 -0400)]
Kconfig: Migrate FS_FAT / FAT_WRITE
Now that these symbols are in Kconfig, migrate all users. Use imply on
a number of platforms that default to having this enabled. As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.
Sekhar Nori [Fri, 2 Jun 2017 12:24:02 +0000 (17:54 +0530)]
config_fallbacks: add additional fallbacks for fat filesystem
Add fallbacks needed to keep all boards building
while they are migrated to use Kconfig symbols
instead of defines in <board>_config.h files for
FAT filesystem.
These should eventually go away once Kconfig select
or imply statements are put in place and duplicated
defines in <board>_config.h removed.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
[trini: Update logic since CMD_FAT / CONFIG_SPL_FAT_SUPPORT are
selecting FS_FAT] Signed-off-by: Tom Rini <trini@konsulko.com>
Sekhar Nori [Fri, 2 Jun 2017 12:24:01 +0000 (17:54 +0530)]
configs: k2g_evm: make sure config fallbacks take effect
Since config fallbacks contained in include/config_fallbacks.h
come into k2g_evm.h file through ti_armv7_keystone2.h, it should
be the last file included.
Without this, #define of FAT_WRITE when environment is in FAT
does not happen as the environment location is decided later
in the file.
Similar issues can come with other config fallbacks implemented.
Sekhar Nori [Fri, 2 Jun 2017 12:24:00 +0000 (17:54 +0530)]
configs: k2*_evm: let each board decide env location
Not all TI Keystone2 EVMs want environment in NAND flash.
K2G EVM which has an MMC/SD slot, keep environment in a
FAT partition on SD card.
Since ti_armv7_keystone2.h defines environment is in NAND,
boards which do not follow that have to #undef'ine that
configuration. This leads to ugly ordering issues around
where exactly the include of ti_armv7_keystone2.h can come
in within the k2*_evm.h files.
Move environment location to config file of each board.
This should make it easy to change it for any one board
without affecting all other boards.
Paul Burton [Sun, 30 Apr 2017 19:57:08 +0000 (21:57 +0200)]
net: pch_gbe: Add cache maintenance
On MIPS systems DMA isn't coherent with the CPU caches unless an IOCU is
present. When there is no IOCU we need to writeback or invalidate the
data caches at appropriate points. Perform this cache maintenance in
the pch_gbe driver which is used on the MIPS Boston development board.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Paul Burton [Sun, 30 Apr 2017 19:57:07 +0000 (21:57 +0200)]
net: pch_gbe: CPU accessible addresses are virtual
Use the virt_to_bus & bus_to_virt functions rather than phys_to_bus &
bus_to_phys, since the addresses accessed by the CPU will be virtual
rather than physical. On MIPS physical & virtual addresses differ as we
use virtual addresses in kseg0, and attempting to use physical addresses
directly caused problems as they're in the user segment which would be
mapped via the uninitialised TLB.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Paul Burton [Sun, 30 Apr 2017 19:57:06 +0000 (21:57 +0200)]
net: pch_gbe: Fix rx descriptor buffer addresses
The loop to set up buffer addresses in rx descriptors always operated on
descriptor 0, rather than on each descriptor sequentially. Fix this in
order to setup correct buffer addresses for each descriptor.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Paul Burton [Sun, 30 Apr 2017 19:57:05 +0000 (21:57 +0200)]
net: pch_gbe: Reset during probe
Using the EG20T gigabit ethernet controller on the MIPS Boston board, we
find that we have to reset the controller in order for the RGMII link to
the PHY to become functional. Without doing so we constantly time out in
pch_gbe_mdio_ready.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
net: zynq_gem: Use wait_for_bit with non breakable
Use wait_for_bit to be non breakable as using it with
breakable causes issue of un interruptible auto negotiation.
This is due to the ctrlc pressed will taken for wait_for_bit()
abort during phy_read() and hence not coming out of
auto negotiation.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Sekhar Nori [Mon, 8 May 2017 15:19:56 +0000 (20:49 +0530)]
drivers: net: cpsw: abort init() on aneg timeout
Abort CPSW driver init when auto-negotiation of link
times out. Currently, the code ignores return status
of phy_startup(), and goes ahead with network operation
(like DHCP) even though the link may be down.
Instead, abort init process if link is down or if there
is another error, so phy_startup() can easily be retried
again. This also helps quick fallback to next network interface
(like USB RNDIS) without inordinate delay.
Tested on AM571x IDK and AM335x BeagleBone black.
Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The .read_rom_hwaddr net_ops hook does not check the return value, which
is why it was never caught that we are currently returning 0 if the
read_rom_hwaddr function return -ENOSYS and -ENOSYS otherwise.
In this case we can simplify this by just returning the result of the
function.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
Jacob Chen [Mon, 27 Mar 2017 08:54:17 +0000 (16:54 +0800)]
net: designware: Add phy supply support
Some board need a regulator for gmac phy, so add this code to handle it. Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Philipp Tomsich [Sun, 26 Mar 2017 16:50:23 +0000 (18:50 +0200)]
net: Kconfig:make PHY_GIGE and individual Micrel PHYs selectable
This change migrate the following configuration options for Kconfig:
* PHY_GIGE, indicates that a controller (with an appropriate PHY) is
Gigabit capable and enables extra support in the miiutil for
parsing the status of Gigabit PHYs
* adds configuration options for Micrel KSZ9021 and KSZ9031 GbE PHYs,
which previously had to enabled through a board-specific config file
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Glass [Sat, 27 May 2017 13:38:27 +0000 (07:38 -0600)]
binman: Drop a special case related to fdt_fallback
Previously we were sometimes forced to collate x86 microcode due to not
having access to the offset of each individual piece. Now that we never
use fdt_fallback, we don't have this problem. Drop this special case from
the code.
Simon Glass [Sat, 27 May 2017 13:38:23 +0000 (07:38 -0600)]
fdt: Makefile: Build python libfdt library if needed
This is needed by binman and dtoc, so if those are being used, check that
the library is present and complain if not. Make sure that any error
appears on stderr so that buildman notices it.
This means that the fallback library (which uses fdtget) will not be used
anymore and swig will need to be installed to use binman / dtoc.
This affects any board which uses binman (currently sunxi and x86) or dtoc
(anything that uses CONFIG_SPL_OF_PLATDATA, currently some rockchip
boards).
Simon Glass [Sat, 27 May 2017 13:38:21 +0000 (07:38 -0600)]
fdt: dtoc: Add a full set of property tests
The tests don't currently cover all the different property types. Add a
new test which checks each property type in turn, to make sure each has
the correct type and value.
Simon Glass [Sat, 27 May 2017 13:38:18 +0000 (07:38 -0600)]
fdt: Rename existing python libfdt module
Now that this module has been accepted upstream we should stop using the
local U-Boot one. In preparation for this, rename it to indicate it is for
legacy use.
Simon Glass [Sat, 27 May 2017 13:38:17 +0000 (07:38 -0600)]
fdt: Add all source files to the libfdt build
At present only a subset of source files are build. Add the rest and
refactor this so that a source file list is available also. This will be
used in later commit.
Simon Glass [Sat, 27 May 2017 13:38:12 +0000 (07:38 -0600)]
pci: Correct cast for sandbox
This gives a warning with some native compilers:
cmd/pci.c:152:11: warning: format ‘%llx’ expects argument of type
‘long long unsigned int’, but argument 3 has type
‘u64 {aka long unsigned int}’ [-Wformat=]
CPU: Allwinner H5 (SUN50I)
Model: OrangePi Prime
DRAM: 2 GiB
MMC: SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: phy interface7
eth0: ethernet@1c30000
starting USB...
USB0: USB EHCI 1.00
USB1: USB OHCI 1.0
scanning bus 0 for devices... 1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autoboot: 0
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
York Sun [Mon, 15 May 2017 15:52:00 +0000 (08:52 -0700)]
armv8: layerscape: Enabling loading PPA during SPL stage
Loading PPA in SPL puts the rest of U-Boot (including RAM version
loaded later) in EL2 with MMU and cache enabled. Once PPA is loaded,
PSCI is available.
York Sun [Mon, 15 May 2017 15:51:59 +0000 (08:51 -0700)]
armv8: layerscape: Make U-Boot EL2 safe
When U-Boot boots from EL2, skip some lowlevel init code requiring
EL3, including CCI-400/CCN-504, trust zone, GIC, etc. These
initialization tasks are carried out before U-Boot runs. This applies
to the RAM version image used for SPL boot if PPA is loaded first.
projects / u-boot / log