Simon Glass [Tue, 5 Mar 2013 14:39:35 +0000 (14:39 +0000)]
Introduce generic u-boot.h file
This file holds the board info structure. We need this to be generic
for the unified board series, so create a structure which contains
the basic fields required by the main architectures.
Fabio Estevam [Thu, 14 Mar 2013 02:32:54 +0000 (02:32 +0000)]
nitrogen6x: Fix RAM size variable
Fix the following build error when buildig nitrogen6s1g:
nitrogen6x.c:89:17: error: 'CONFIG_DDR_MB' undeclared (first use in
this function)
nitrogen6x.c:89:17: note: each undeclared identifier is reported only
once for each function it appears in
Reported-by: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tom Warren [Mon, 11 Mar 2013 23:43:49 +0000 (16:43 -0700)]
Tegra114: Dalmore: Add pad config tables/code based on pinmux code
Pad config registers exist in APB_MISC_GP space, and control slew
rate, drive strengh, schmidt, high-speed, and low-power modes for
all of the pingroups in Tegra30. This builds off of the pinmux
way of constructing init tables to configure select pads (SDIOCFG,
for instance) during pinmux_init().
Currently, no padcfg entries exist. SDIO3CFG will be added when the
MMC driver is added as per the TRM to work with the SD-card slot on
Dalmore E1611.
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Warren [Wed, 13 Mar 2013 22:40:33 +0000 (15:40 -0700)]
Tegra114: Dalmore: Always use DEFAULT instead of DISABLE for lock bits
The pinmux code issues a warning if the caller attempts to disable the
lock bit in a pinmux register, since this is impossible (once it's
locked, the only way to unlock it is to reset the device/pmt controller).
The I2C/DDC/CEC/USB macros expect a lock setting to be passed in,
and the previous setting of DISABLE caused the pinmux table parsing
code to issue the warning. Changing the lock bits in these table
entries to DEFAULT (i.e. don't touch it) fixes this.
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Warren [Wed, 13 Mar 2013 22:00:54 +0000 (15:00 -0700)]
Tegra114: pinmux: Fix bad CAM_MCLK func 3 table entry
This caused CAM_MCLK's pinmux reg to be locked out, since the
table parsing code couldn't find a matching entry for VI_ALT3
and wrote garbage to the register.
Stephen Warren [Thu, 28 Feb 2013 15:03:48 +0000 (15:03 +0000)]
ARM: tegra: enable a common set of disk-related commands everywhere
Enable a common set of partition types, filesystems, and related
commands in tegra-common.h, so that they are available on all Tegra
boards. This allows boot.scr (loaded and executed by the default
built-in environment) on those boards to assume that certain features
are always available.
Do this in tegra-common.h, so that individual board files can undefine
the features if they really don't want any of them.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Thu, 28 Feb 2013 15:03:47 +0000 (15:03 +0000)]
disk: define HAVE_BLOCK_DEVICE if CONFIG_CMD_PART
Various code that is conditional upon HAVE_BLOCK_DEVICE is required by
code conditional upon CONFIG_CMD_PART. So, enable HAVE_BLOCK_DEVICE if
CONFIG_CMD_PART is enabled.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Thu, 28 Feb 2013 15:03:46 +0000 (15:03 +0000)]
disk: define HAVE_BLOCK_DEVICE in a common place
This set of ifdefs is used in a number of places. Move its definition
somewhere common so it doesn't have to be repeated.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Tom Warren [Tue, 26 Feb 2013 19:36:22 +0000 (12:36 -0700)]
Tegra30: MMC: Enable DT MMC driver support for Tegra30 Cardhu boards
Tested on my Cardhu-A04 tablet, eMMC and SD-Card work fine, can load
a kernel off of an SD card OK, card detect works, and the env is now
stored in eMMC (end of the 2nd 'boot' sector, same as Tegra20).
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Warren [Tue, 26 Feb 2013 19:31:26 +0000 (12:31 -0700)]
mmc: Tegra: Add SD bus power/voltage function and MMC pad init call.
Tegra30 requires the SD Bus Voltage & Power bits be set in the SD
Power Control register. Tegra20 works w/o them set, but do it anyway
for those SoCs as it's part of the SD spec. Also call a common
board pad init routine (pad_init_mmc) in mmc_reset(), used by
Tegra30 only for now.
Note that Tegra20 SD/MMC HW differs enough from Tegra20 that a
new compatible entry is used in the fdt compat_names/id tables.
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Warren [Wed, 6 Mar 2013 23:16:22 +0000 (16:16 -0700)]
Tegra30: Cardhu: Add pad config tables/code based on pinmux code
Pad config registers exist in APB_MISC_GP space, and control slew
rate, drive strengh, schmidt, high-speed, and low-power modes for
all of the pingroups in Tegra30. This builds off of the pinmux
way of constructing init tables to configure select pads (SDIOCFG,
for instance) during pinmux_init().
Currently, only SDIO1CFG is changed as per the TRM to work with
the SD-card slot on Cardhu.
Thanks to StephenW for the suggestion/original idea.
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Use the latest tables & code from our internal U-Boot repo.
The SDMMC3_CD, CLK_LB_IN and CLK_LB_OUT offsets in the pingroup
table were off by a few indices, causing the pinmux init code to
write bad data to the PINMUX_AUX_ regs. This also enabled the lock
bit, which made it impossible to reconfig the pads correctly for
SDMMC3 (SD card on Dalmore) operation. Also fixes SPI_CS2_N,
USB_VBUS_EN0, HDMI_CEC and UART2_RXD/TXD muxes.
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Thu, 28 Feb 2013 12:40:09 +0000 (12:40 +0000)]
ARM: tegra: implement WAR for Tegra114 CPU reset vector
A Tegra114 HW bug prevents the main CPU vector from being modified under
certain circumstances. Tegra114 A01P and later with a patched boot ROM
set the CPU reset vector to 0x4003fffc (end of IRAM). This allows placing
an arbitrary jump instruction at that location, in order to redirect to
the desired reset vector location. Modify Tegra114's start_cpu() to make
use of this feature. This allows CPUs with the patched boot ROM to boot.
Based-on-work-by: Jimmy Zhang <jimmzhang@nvidia.com>. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Tom Warren [Thu, 21 Feb 2013 12:31:29 +0000 (12:31 +0000)]
Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files
Linux dts files were used for those boards that didn't already
have sdhci info populated. Tamonten has their own dtsi file with
common sdhci nodes (sourced from Linux).
Signed-off-by: Tom Warren <twarren@nvidia.com> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Warren [Thu, 21 Feb 2013 12:31:27 +0000 (12:31 +0000)]
Tegra: fdt: Change /include/ to #include for C preprocessor
dts Makefile has the arch & board include paths added to DTS_CPPFLAGS.
This allows the use of '#include "xyz"' in the dts/dtsi file which
helps the C preprocessor find common dtsi include files.
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Warren [Fri, 8 Feb 2013 07:25:31 +0000 (07:25 +0000)]
Tegra114: fdt: Update DT files with I2C info for T114/Dalmore
T114, like T30, does not have a separate/different DVC (power I2C)
controller like T20 - all 5 I2C controllers are identical, but
I2C5 is used to designate the controller intended for power
control (PWR_I2C in the schematics). PWR_I2C is set to 400KHz.
Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Warren [Fri, 8 Feb 2013 07:25:30 +0000 (07:25 +0000)]
Tegra: I2C: Add T114 clock support to tegra_i2c driver
T114 has a slightly different I2C clock, with a new (extra) divisor
in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C
clock is 100KHz +/- 3Hz on my Saleae Logic analyzer.
Added a new entry in compat_names for T114 I2C since it differs
from the previous Tegra SoCs. A flag is set when T114 I2C HW is
found so new features like the extra clock divisor can be used.
Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Tom Warren [Wed, 27 Feb 2013 11:10:01 +0000 (11:10 +0000)]
Tegra114: I2C: Take DVFS out of reset to allow I2C5 (PWR_I2C) to work
I2C driver can now probe dev 0 (PWR_I2C, where the PMU, etc. lives).
This is needed so that the SDIO slot power can be brought up for
the MMC driver, so it has to precede those commits.
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Lucas Stach [Thu, 7 Feb 2013 07:16:29 +0000 (07:16 +0000)]
tegra: usb: move implementation into right directory
This moves the Tegra USB implementation into the drivers/usb/host
directory. Note that this merges the old
/arch/arm/cpu/armv7/tegra20/usb.c file into ehci-tegra.c. No code
changes, just moving stuff around.
v2: While at it also move some defines and the usb.h header file to make
usb driver usable for Tegra30.
NOTE: A lot more work is required to properly init the PHYs and PLL_U on
Tegra30, this is just to make porting easier and it does no harm here.
Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Lucas Stach [Thu, 7 Feb 2013 07:16:25 +0000 (07:16 +0000)]
tegra: usb: make controller init functions more self contained
There is no need to pass around all those parameters. The init functions
are able to easily extract all the needed setup info on their own.
This allows to move out the controller init into ehci_hcd_init later
on, without having to save away global state for later use and thus
bloating the file global state.
Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 26 Feb 2013 12:28:28 +0000 (12:28 +0000)]
ARM: tegra: enable some CPU errata workarounds
Tegra20 has a Cortex A9 r1p1, and Tegra30 has a Cortex A9 r2p9. As such,
some CPU errata exist, and must be worked around.
These must be worked around in the bootloader, since in general, the
kernel (especially a multi-platform kernel) needs to support being
launched in non-secure mode (normal world), and hence may not be able
to write to the CP15 register to enable these workarounds.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Tue, 26 Feb 2013 12:28:27 +0000 (12:28 +0000)]
ARM: implement some Cortex-A9 errata workarounds
Various errata exist in the Cortex-A9 CPU, and may be worked around by
setting some bits in a CP15 diagnostic register. Add code to implement
the workarounds, enabled by new CONFIG_ options.
This code was taken from the Linux kernel, v3.8, arch/arm/mm/proc-v7.S,
and modified to remove the logic to conditionally apply the WAR (since we
know exactly which CPU we're running on given the U-Boot configuration),
and use r0 instead of r10 for consistency with the rest of U-Boot's
cpu_init_cp15().
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
Albert ARIBAUD [Mon, 25 Feb 2013 00:59:00 +0000 (00:59 +0000)]
Refactor linker-generated arrays
Refactor linker-generated array code so that symbols
which were previously linker-generated are now compiler-
generated. This causes relocation records of type
R_ARM_ABS32 to become R_ARM_RELATIVE, which makes
code which uses LGA able to run before relocation as
well as after.
Note: this affects more than ARM targets, as linker-
lists span possibly all target architectures, notably
PowerPC.
Albert ARIBAUD [Mon, 25 Feb 2013 00:58:59 +0000 (00:58 +0000)]
arm: make __bss_start and __bss_end__ compiler-generated
Turn __bss_start and __bss_end__ from linker-generated
to compiler-generated symbols, causing relocations for
these symbols to change type, from R_ARM_ABS32 to
R_ARM_RELATIVE.
This should have no functional impact, as it affects
references to __bss_start and __bss_end__ only before
relocation, and no such references are done.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Albert ARIBAUD [Mon, 25 Feb 2013 00:58:58 +0000 (00:58 +0000)]
Remove linker lists (LGAs) from SPL linker scripts
Many SPL linker scripts needlessly include linker lists (aka LGAs).
Remove them whenever possible; keep it only in the seven am335x_evm
variants (am335x_evm, am335x_evm_uart[1-5], am335x_evm_spiboot),
where there is actual content in output section .u_boot_list.
This commit keeps all u-boot.bin and u-boot-spl.bin in ARM targets
byte-identical.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Albert ARIBAUD [Mon, 25 Feb 2013 00:58:57 +0000 (00:58 +0000)]
arm: omap: map u_boot_lists section to .sram
Output section .u_boot_list was left unmapped in
u-boot-spl.lds for omap-common, causing the location
counter to roll back to bteween .rodata and .data,
making __image_copy_end and _end symbols wrong.
Mapping output section .u_boot_list to memory .sram
fixes these symbols' mapping.
This modifies the SPL binary but has no functional
impact, as __image_copy_end and _end are never used
in SPLs and u_boot_list is empty for all 29 boards
affected (omap4_sdp4430 eco5pk igep0030 am335x_evm_uart3
omap3_beagle am3517_crane igep0032 mt_ventoux pcm051
am3517_evm omap3_evm_quick_mmc am335x_evm_uart2
am335x_evm_spiboot am335x_evm_uart1 omap3_evm igep0030_nand
omap3_overo igep0020 am335x_evm omap4_panda omap5_evm
am335x_evm_uart4 devkit8000 tricorder mcx twister
omap3_evm_quick_nand am335x_evm_uart5 igep0020_nand).
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
1) Write the correct M/T Stop value to I2CSTAT after i2c write.
According to the spec, after finish the data transmission, we should
write a M/T Stop (I2C_MODE_MT | I2C_TXRX_ENA) to I2CSTAT instead of
a M/R Stop (I2C_MODE_MR | I2C_TXRX_ENA).
2) Not split the write to I2CSTAT into 2 steps in i2c read.
According to the spec, we should write the combined M/R Start value to
I2CSTAT after setting the slave address to I2CDS
3) Fix the mistake of making an equality check to an assignment.
In the case of I2C write with the zero-length address, while tranfering the
data, it should be an equality check (==) instead of an assignment (=).
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Joe Hershberger [Fri, 8 Feb 2013 10:28:00 +0000 (10:28 +0000)]
CONFIG_BOOTDELAY default should not affect runtime
Because the code that handles bootdelay is compiled in conditionally
based on the default value, you are restricted in the default,
regardless of what you want the runtime options to be.
Change the source to always check if any default is given so that other
values can be selected and used at runtime.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Wolfgang Denk [Wed, 20 Feb 2013 04:53:16 +0000 (04:53 +0000)]
env: fix "env ask" command
The "env ask" traditionally uses a somewhat awkward syntax:
env ask name [message ...] [size]
So far, when a mesage was given, you always also had to enter a size.
If you forgot to do that, the command would terminate without any
indication of the problem.
To avoid incompatible changes of the interface, we now check the last
argument if it can be converted into a decimal number. If this is the
case, we assume it is a size; otherwise we treat it as part of the
message.
Also, add a space after the message fore easier reading,
and clean up help mesage.
Tom Rini [Thu, 21 Feb 2013 06:55:40 +0000 (06:55 +0000)]
cmd_fat.c: Note in fatread help about alignment requirements
When using the partial read feature of fatwrite the buffer we read into
can become unaligned not just due to initial location but the size of
our partial reads as well. Make this clear in the help text.
Nicolas Ferre [Wed, 20 Feb 2013 00:16:24 +0000 (00:16 +0000)]
arm: at91/configs: add bootz to configuration
Support to boot zImage
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
[Add bootz for at91rm9200, at91sam9263, at91sam9rl] Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Nicolas Ferre [Wed, 20 Feb 2013 00:16:23 +0000 (00:16 +0000)]
arm: at91/configs: add libfdt to configuration
support to boot device tree Linux kernel
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
[Add libftd for at91rm9200, at91sam9263, at91sam9rl] Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Łukasz Majewski [Fri, 11 Jan 2013 05:08:54 +0000 (05:08 +0000)]
mmc:sdhci:fix: Change default interrupts enabled at SDHCI initialization
This patch changes sdhci_init()'s behavior to NOT enable all interrupt
sources by default. Moreover interrupt signaling has been disabled.
This patch do not enable interrupts which aren't served in u-boot
(they are defined at sdhci.h but NOT used elsewhere):
- SDHCI_INT_CARD_INSERT, SDHCI_INT_CARD_REMOVE, SDHCI_BUS_POWER,
SDHCI_INT_CARD_REMOVE, SDHCI_INT_CARD_INT
Special care shall be put on SDHCI_INT_CARD_INT, which indicates
interrupt generated by SD card.
According to "SD Host Controller Simplified Spec. ver 3.00" when bit 8
(Card Interrupt Status Enable) at "Normal Interrupt Status Enable
Register" (offset 0x34) is set, the card interrupt detection is started.
Then eMMC card may cause the SD controller to set this bit and then this
interrupt is passed to booted OS and might cause kernel crash.
To sum up:
- Only enable interrupts, which are served at u-boot
- This cleanup as a side effect fixes SDHCI's CARD INTERRUPT problem at
Linux kernel (versions 3.6+, sdhci controller)
- Keep masked bits at "Normal Interrupt Signal Enable Register" (0x38h)
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Andy Fleming <afleming@freescale.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Akshay Saraswat [Mon, 25 Feb 2013 01:13:04 +0000 (01:13 +0000)]
TMU: Add TMU support in dtt command
Add generic TMU support alongwith i2c sensors in dtt command
to enable temperature reading in cases where TMU is present
along-with/instead-of i2c sensors.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Glass [Mon, 18 Feb 2013 20:32:59 +0000 (20:32 +0000)]
EXYNOS: Correct ordering of SPL machine_params
The mem_manuf is not in the correct order according to the string table.
This causes cros_bundle_firmware to get the BL2 settings in the wrong
order. This patch fixes the same.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Stephen Warren [Thu, 28 Feb 2013 15:05:34 +0000 (15:05 +0000)]
cmd_part: don't print cmd name twice in help
The core implementation of "help" already prints the command name before
the help text of a specific command. Remove it from part's own help text
to avoid it being printed twice:
Tegra114 (Dalmore) # help part
part - disk partition related commands
Usage:
part part uuid <interface> <dev>:<part>
- print partition UUID
...
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ps on BSD hosts (like OS X) do not provide the --no-headers switch nor
understand the AIX format descriptions. Unfortunately there seems no solution to
get the PIDs of children in a platfrom independent manner.
Therefore detect the OS and decide upon that which way to go.
This patch makes the MAKEALL script cleanly stoppable on bare OS X when using
the parallel builds of targets.
Additionally this patch removes double call to grep by a single call to sed for
GNU style child PID detection.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Wolfgang Denk [Fri, 8 Mar 2013 10:51:32 +0000 (10:51 +0000)]
Feature Removal: disable "mtest" command by default
The "mtest" command is of little practical use (if any), and
experience has shown that a large number of board configurations
define useless or even dangerous start and end addresses. If not even
the board maintainers are able to figure out which memory range can be
reliably tested, how can we expect such from the end users? As this
problem comes up repeatedly, we rather do not enable this command by
default, so only people who know what they are doing will be
confronted with it.
As this changes the user interface, we allow for a grace period
before this change takes effect. For now, we make "mtest"
configurable through the CONFIG_CMD_MEMTEST variable, which is defined
in include/config_cmd_default.h; we also add an entry to
doc/feature-removal-schedule.txt which announces the removal of this
default setting in two releases from now, i. e. with v2013.07.
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com>
Tom Rini [Mon, 11 Mar 2013 16:02:40 +0000 (12:02 -0400)]
Merge u-boot/master into u-boot-ti/master
In master we had already taken a patch to fix the davinci GPIO code for
CONFIG_SOC_DM646X and in u-boot-ti we have additional patches to support
DA830 (which is CONFIG_SOC_DA8XX && !CONFIG_SOC_DA850). Resolve these
conflicts manually and comment the #else/#endif lines for clarity.
Lokesh Vutla [Tue, 12 Feb 2013 21:29:08 +0000 (21:29 +0000)]
arm: dra7xx: Add board files for DRA7XX socs
Adding new board files for DRA7XX socs.
The pad registers layout is changed completely from OMAP5
So introducing the new structure here and also adding the
minimal data.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishant Kamat <nskamat@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
[trini: Adapt omap_mmc_init call for last 2 params] Signed-off-by: Tom Rini <trini@ti.com>
Lokesh Vutla [Tue, 12 Feb 2013 21:29:05 +0000 (21:29 +0000)]
arm: dra7xx: clock: Add the dplls data
A new DPLL DDR is added in DRA7XX socs. Now clocks to
EMIF CD is from DPLL DDR. So DPLL DDR should be locked
before initializing RAM.
Also adding other dpll data which are different from OMAP5 ES2.0.
SYS_CLK running at 20MHz is introduced in DRA7xx socs.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
Lokesh Vutla [Tue, 12 Feb 2013 01:33:45 +0000 (01:33 +0000)]
ARM: OMAP5: srcomp: enable slew rate compensation cells after powerup
After power-up SRCOMP cells are by-passed by default in OMAP5.
Software has to enable these SRCOMP sells.
For ES2: All 5 SRCOMP cells needs to be enabled.
For ES1: Only 4 SRCOMP cells in core power domain are enabled.
The 1 in wkup domain is not enabled because smart i/os
of wkup domain work with default compensation code.
Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Tom Rini <trini@ti.com>
projects / u-boot / log