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6 years agoboard,ge,bx50v3 - rtc time validation
Nandor Han [Wed, 10 Jan 2018 19:31:38 +0000 (20:31 +0100)]
board,ge,bx50v3 - rtc time validation

Validate the time at startup:
 - in case rtc error add to kernel command line RTC_ERROR
 - clamp date to 1-Jan-2036

Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoconfigs: ge_bx50v3: automatic partition selection and video output failure message
Ian Ray [Wed, 10 Jan 2018 19:31:37 +0000 (20:31 +0100)]
configs: ge_bx50v3: automatic partition selection and video output failure message

The exact definition of a successful boot is defined by user-space.
Determine the boot partition automatically.  A partition is selected if
file `/boot/bootcause/firstboot' exists (meaning that the partition has
freshly installed software) OR if file `/boot/fitImage' exists.

When userspace determines that new software was successfully installed,
it must (1) delete `/boot/fitImage' on the _inactive_ partition and (2)
remove `/boot/bootcause/firstboot'.

Enable video, but do not display logos or other version information.
Silence kernel console logging by default.

Print a message to VGA screen in case of boot failure and reset bootcount
to allow the user to attempt boot again.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoboard: ge: bx50v3: mount rootfs read-only
Hannu Lounento [Wed, 10 Jan 2018 19:31:36 +0000 (20:31 +0100)]
board: ge: bx50v3: mount rootfs read-only

Change the kernel command line to mount the root filesystem read-only in
order to be able to run filesystem check on it on boot.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoconfigs: ge_bx50v3: enable bootcount
Ian Ray [Wed, 10 Jan 2018 19:31:35 +0000 (20:31 +0100)]
configs: ge_bx50v3: enable bootcount

Enable bootcount using an EXT file.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoconfig: ge_bx50v3: read boot script
Ian Ray [Wed, 10 Jan 2018 19:31:34 +0000 (20:31 +0100)]
config: ge_bx50v3: read boot script

Read boot script from shared partition, if available.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoboard: ge: bx50v3: Support FIT and select configuration based on VPD
Ian Ray [Wed, 10 Jan 2018 19:31:33 +0000 (20:31 +0100)]
board: ge: bx50v3: Support FIT and select configuration based on VPD

Modify configuration to support FIT. Set variable `confidx' from VPD,
in order to load the correct device tree. Modify/simplify U-Boot
environment to support loading FIT image.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoboard: ge: bx50v3: Enable hardware watchdog
Martyn Welch [Wed, 10 Jan 2018 19:31:32 +0000 (20:31 +0100)]
board: ge: bx50v3: Enable hardware watchdog

Enable the hardware watchdog on bx50v3 to cause it to reset in the event
the board hangs.

Configure GPIO_9 pin as WDOG1_B so that a watchdog timeout results in a
full system reset.

The watchdog is used and reconfigured by systemd approximately 1.7 seconds
into boot. Adding a few seconds for U-Boot and a few more seconds as a
safety margin.

Note that the PCIe controller is _not_ put back into a safe state prior
to board reset.  This is a problem if board reset is implemented as CPU
reset.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoboard: ge: bx50v3: program MAC address to I210
Hannu Lounento [Wed, 10 Jan 2018 19:31:31 +0000 (20:31 +0100)]
board: ge: bx50v3: program MAC address to I210

There are two I210s on the b850v3 and one on the b450v3 and b650v3.
One is connected to Marvell 88e6240 which is already programmed.

Follow the flow documented in doc/README.enetaddr: set the
enet[0-9]*addr environment variable and let the driver program the
hardware.

The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order.

The environment variables are removed after programming the hardware
because the variables seem to influence MAC addresses also after U-Boot.
Specifically the MAC address of FEC (MC interface) would be incorrectly
set: 'ethaddr', which maps to the first I210 chip and is set to I210's
default address read from the driver by eth_write_hwaddr in eth_legacy.c
because the variable is undefined (not set even by bx50v3.c), would
result in the eth0 interface's MAC address to be set to I210's default
address.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoboard: ge: bx50v3: move FEC MAC address programming to driver
Martyn Welch [Wed, 10 Jan 2018 19:31:30 +0000 (20:31 +0100)]
board: ge: bx50v3: move FEC MAC address programming to driver

Instead of programming the hardware directly in the board
implementation, follow the flow documented in doc/README.enetaddr: set
the enet[0-9]*addr environment variable and let the driver program the
hardware.

This avoids duplicating the implementation as it already exists in the
driver (drivers/net/fec_mxc.c: fec_set_hwaddr).

The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order, i.e. FEC always has the index 2.

The FEC driver does *not* set the flag Set MAC Address on Transmit (bit
set_eth0_mac_address used to do but this is unnecessary as the Linux
networking stack fills in the MAC address.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoconfigs: Add network device support for bx50v3 products
Ian Ray [Wed, 10 Jan 2018 19:31:29 +0000 (20:31 +0100)]
configs: Add network device support for bx50v3 products

Modify b450v3, b650v3 and b850v3 defconfigs to enable the network devices
found in these products.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoboard: ge: Enable access to i2c bus 1 and 2
Martyn Welch [Wed, 10 Jan 2018 19:31:28 +0000 (20:31 +0100)]
board: ge: Enable access to i2c bus 1 and 2

The change in i2c configuration added to support access to the VPD has
inadvertantly caused access to i2c buses 1 & 2 to be lost. This has
resulted in the configuration for the PMIC to be attempted on the wrong
bus and thus isn't taking effect.

Add the required configuration to return access to buses 1 & 2. In order
to ensure that any users of the bus numbering prior to addition in VPD
patches work, add buses before configuration related to mux on bus 0 and
tweak VPD bus usage to fit new numbering scheme.

Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agortc: adding RX8010SJ rtc driver
Nandor Han [Wed, 10 Jan 2018 19:31:27 +0000 (20:31 +0100)]
rtc: adding RX8010SJ rtc driver

Add a new driver for RX8010SJ rtc chip. The driver implements both
formats of U-Boot driver model.

Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agonet: e1000: implement eth_write_hwaddr
Hannu Lounento [Wed, 10 Jan 2018 19:31:26 +0000 (20:31 +0100)]
net: e1000: implement eth_write_hwaddr

Implement programming MAC address to the hardware, i.e. external flash
seen as EEPROM.

MAC address is only written if it differs from what is already stored in
flash or if reading the current MAC address fails.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agonet: e1000: split e1000_read_mac_addr
Hannu Lounento [Wed, 10 Jan 2018 19:31:25 +0000 (20:31 +0100)]
net: e1000: split e1000_read_mac_addr

Split the implementation of e1000_read_mac_addr into eeprom and register
versions called by e1000_read_mac_addr.

This allows for calling e1000_read_mac_addr when MAC address is needed
with no constraints where it is read from, and for calling the register
and, especially, the eeprom version directly in order to specify where
to read the address from.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agonet: e1000: add support for writing to EEPROM
Hannu Lounento [Wed, 10 Jan 2018 19:31:24 +0000 (20:31 +0100)]
net: e1000: add support for writing to EEPROM

Port functions for writing to EEPROM, updating the checksum and
committing data to flash from the Linux kernel igb driver.

Functions were ported from Linux 4.8-rc2 (694d0d0bb20).

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoimx: mx8m: add ddr controller memory map
Peng Fan [Wed, 10 Jan 2018 05:20:47 +0000 (13:20 +0800)]
imx: mx8m: add ddr controller memory map

Add ddrc memory map and enum types used in ddr initialization.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
6 years agopower: pmic/regulator allow dm be omitted by SPL
Peng Fan [Wed, 10 Jan 2018 05:20:46 +0000 (13:20 +0800)]
power: pmic/regulator allow dm be omitted by SPL

Allow the dm driver be omitted by SPL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
6 years agoimx: imx8mq: add dtsi file
Peng Fan [Wed, 10 Jan 2018 05:20:45 +0000 (13:20 +0800)]
imx: imx8mq: add dtsi file

Add dtsi file for i.MX8MQ.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
6 years agonet: fec: fix build warnings for 64bits support
Ye Li [Wed, 10 Jan 2018 05:20:44 +0000 (13:20 +0800)]
net: fec: fix build warnings for 64bits support

When building for 64bits system, we get some warnings about type
cast between pointer and integer. This patch eliminates the warnings
by using ulong/long type which is 32bits on 32bits system or 64bits on
64bits system.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agonet: fec: do not access reserved register for i.MX8M
Peng Fan [Wed, 10 Jan 2018 05:20:43 +0000 (13:20 +0800)]
net: fec: do not access reserved register for i.MX8M

The MIB RAM and FIFO receive start register does not exist on
i.MX8M. Accessing these register will cause system hang.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agogpio: mxc: add i.MX8M support
Peng Fan [Wed, 10 Jan 2018 05:20:42 +0000 (13:20 +0800)]
gpio: mxc: add i.MX8M support

Add i.MX8M GPIO support.
There are 4 GPIO banks on i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agoimx: lcdif: include i.MX8M
Peng Fan [Wed, 10 Jan 2018 05:20:41 +0000 (13:20 +0800)]
imx: lcdif: include i.MX8M

Include i.MX8M in lcdif register layout map.
Also included i.MX7ULP in this patch, since share same with i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agommc: fsl_esdhc: support i.MX8M
Peng Fan [Wed, 10 Jan 2018 05:20:40 +0000 (13:20 +0800)]
mmc: fsl_esdhc: support i.MX8M

Support i.MX8M in fsl esdhc driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agomisc: ocotp: add i.MX8M support
Peng Fan [Wed, 10 Jan 2018 05:20:39 +0000 (13:20 +0800)]
misc: ocotp: add i.MX8M support

i.MX8M OCOTP follow same flow as i.MX6Q, but it has 64 banks
and each bank 4 words.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoimx: makefile: compile files for i.MX8M
Peng Fan [Wed, 10 Jan 2018 05:20:38 +0000 (13:20 +0800)]
imx: makefile: compile files for i.MX8M

Compile files for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
6 years agoimx: mx8m: add soc related settings and files
Peng Fan [Wed, 10 Jan 2018 05:20:37 +0000 (13:20 +0800)]
imx: mx8m: add soc related settings and files

Add SoC level initialization code
 - arch_cpu_init
 - mmu table
 - detect cpu revision
 - reset cpu and wdog settings
 - timer init
 - wdog settings
 - lowlevel init to save/restore registers
 - a few dummy header file to avoid build failure
 - ft_system_setup

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoimx: mx7: move mmc env code to mmc_env.c
Peng Fan [Wed, 10 Jan 2018 05:20:36 +0000 (13:20 +0800)]
imx: mx7: move mmc env code to mmc_env.c

The mx7 mmc env code is shared by i.MX8M, so move it to mmc_env.c.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
6 years agoimx: cpu: support get_boot_device for i.MX8M
Peng Fan [Wed, 10 Jan 2018 05:20:35 +0000 (13:20 +0800)]
imx: cpu: support get_boot_device for i.MX8M

Enable get_boot_device for i.MX8M, it supports boot type USB.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agoimx: mx7: move get_boot_device to cpu.c
Peng Fan [Wed, 10 Jan 2018 05:20:34 +0000 (13:20 +0800)]
imx: mx7: move get_boot_device to cpu.c

Move get_boot_device to cpu.c to prepare adding i.MX8M support,
because i.MX8M share same code with i.MX7.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agoimx: bootaux: support i.MX8M
Peng Fan [Wed, 10 Jan 2018 05:20:33 +0000 (13:20 +0800)]
imx: bootaux: support i.MX8M

Add i.MX8M support. Because i.MX8M use SiP call trap
to Arm Trusted Firmware to handle M4, so use #ifdef
to avoid build error on i.MX6/7.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
6 years agoimx: cleanup bootaux
Peng Fan [Wed, 10 Jan 2018 05:20:32 +0000 (13:20 +0800)]
imx: cleanup bootaux

Move i.MX6/7 bootaux code to imx_bootaux.c.
The i.MX6/7 has different src layout, so define M4 reg offset
to ease the cleanup. Redefine the M4 related BIT for share
common code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoimx: refactor imx_get_mac_from_fuse
Peng Fan [Wed, 10 Jan 2018 05:20:31 +0000 (13:20 +0800)]
imx: refactor imx_get_mac_from_fuse

Move imx_get_mac_from_fuse to a new mac.c for i.MX6/7.
Since fuse regs structure are different for i.MX6/7, use mac
address offset in code and define a new local struture
imx_mac_fuse.

Also sort the config order.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agoimx: cpu: add cpu speed/grade for i.MX8M
Peng Fan [Wed, 10 Jan 2018 05:20:30 +0000 (13:20 +0800)]
imx: cpu: add cpu speed/grade for i.MX8M

Use more general enum types for speed grade.
Refine get_cpu_speed_grade_hz to support i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agoimx: cpu: move speed/temp to common cpu
Peng Fan [Wed, 10 Jan 2018 05:20:29 +0000 (13:20 +0800)]
imx: cpu: move speed/temp to common cpu

The i.MX7 cpu speed/temp code could be reused on i.MX8M,
so move them to common cpu code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agoimx: add pad settings bit definition for i.MX8M
Peng Fan [Wed, 10 Jan 2018 05:20:28 +0000 (13:20 +0800)]
imx: add pad settings bit definition for i.MX8M

Add pad settings bit definition for i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agoimx: add i.MX8MQ SoC Revision and is_mx8m helper
Peng Fan [Wed, 10 Jan 2018 05:20:27 +0000 (13:20 +0800)]
imx: add i.MX8MQ SoC Revision and is_mx8m helper

Add i.MX8MQ SoC Revision
Add is_mx8m helper
The 7ULP is a dummy number, so use 0xEx.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agoimx: spl: implement spl_boot_device for i.MX8M
Peng Fan [Wed, 10 Jan 2018 05:20:26 +0000 (13:20 +0800)]
imx: spl: implement spl_boot_device for i.MX8M

Implement spl_boot_device for i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agoimx: cpu: update cpu file to support i.MX8M
Peng Fan [Wed, 10 Jan 2018 05:20:25 +0000 (13:20 +0800)]
imx: cpu: update cpu file to support i.MX8M

Update get_reset_cause to reflect i.MX8M
Compile out get_ahb_clk and set_chipselect_size for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agoimx: boot_mode: add USB_BOOT entry
Peng Fan [Wed, 10 Jan 2018 05:20:24 +0000 (13:20 +0800)]
imx: boot_mode: add USB_BOOT entry

Add USB_BOOT entry.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoimx: add sip function
Peng Fan [Wed, 10 Jan 2018 05:20:23 +0000 (13:20 +0800)]
imx: add sip function

Add SiP (Silicon Provider) services function to issue
SMC call to Arm Trusted Firmware.

More SiP information could be found in
  https://github.com/ARM-software/arm-trusted-firmware/blob/master/
  docs/arm-sip-service.rst

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
6 years agoimx: mx8m: add clock driver
Peng Fan [Wed, 10 Jan 2018 05:20:22 +0000 (13:20 +0800)]
imx: mx8m: add clock driver

Add clock driver to support i.MX8M.

There are two kind PLLs, FRAC pll and SSCG pll. ROM already
configured SYS PLL1/2, we only need to configure the output.
ocotp/i2c/pll decoding and configuration/usdhc/lcdif/dram pll/
enet clock are configured in the code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
6 years agoimx: mx8m: add pin header file
Peng Fan [Wed, 10 Jan 2018 05:20:21 +0000 (13:20 +0800)]
imx: mx8m: add pin header file

Add pin header file for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agoimx: mx8m: add register definition header file
Peng Fan [Wed, 10 Jan 2018 05:20:20 +0000 (13:20 +0800)]
imx: mx8m: add register definition header file

Add register definition header file for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agoimx: add i.MX8M into Kconfig
Peng Fan [Wed, 10 Jan 2018 05:20:19 +0000 (13:20 +0800)]
imx: add i.MX8M into Kconfig

Add i.MX8M into Kconfig, create a new folder mx8m
dedicated for i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agoconfigs: icore: enable nand on mmc defconfig
Jagan Teki [Tue, 9 Jan 2018 18:49:53 +0000 (00:19 +0530)]
configs: icore: enable nand on mmc defconfig

Enable nand on mmc defconfig, so-that preparing nand
for writing/updating bootimage, Linux becomes easy.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoconfigs: enable spl support wrt env device
Jagan Teki [Tue, 9 Jan 2018 18:49:52 +0000 (00:19 +0530)]
configs: enable spl support wrt env device

nand device needed for mmc config to access nand
for write and update so enabling SPL_SUPPORT to mmc
or nand is wrt to env device rather nand driver check.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoimx: mx7: psci: add system power off support
Anson Huang [Sun, 7 Jan 2018 06:34:32 +0000 (14:34 +0800)]
imx: mx7: psci: add system power off support

Add i.MX7 PSCI system power off support, linux
kernel can use "poweroff" command to power off
system via SNVS, PMIC power will be disabled.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
6 years agoimx: mx7: psci: add system reset support
Anson Huang [Sun, 7 Jan 2018 06:34:31 +0000 (14:34 +0800)]
imx: mx7: psci: add system reset support

Add i.MX7 PSCI system reset support, linux
kernel can use "reboot" command to reset
system even wdog driver is disabled in kernel.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
6 years agomx7_common: use psci 1.0 instead of 0.1
Anson Huang [Sun, 7 Jan 2018 06:34:30 +0000 (14:34 +0800)]
mx7_common: use psci 1.0 instead of 0.1

Use PSCI 1.0 instead of 0.1 to support more power
management feature like system reset, power off etc..

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
6 years agoboard: i.MX6QDL: add Engicam i.CoreM6 1.5 QDL MIPI starter kit
Jagan Teki [Fri, 5 Jan 2018 18:32:04 +0000 (00:02 +0530)]
board: i.MX6QDL: add Engicam i.CoreM6 1.5 QDL MIPI starter kit

i.CoreM6 1.5 is an another i.CoreM6 QDL cpu modules which can be connected
to EDIMM starter kit design with eMMC and MIPI-CSI interfaces suitable for
Android and video capture application.

notable features:
CPU NXP i.MX6 S/DL/D/Q, Up to 4 x Cortex-A9@800MHz
Memory   Up to 2 GB DDR3-1066
Video Interfaces Up to 1 Parallel Up to 2 LVDS HDMI 1.4
port 8 bit CSI INPUT MIPI-CSI INPUT
1 x 10/100 Ethernet interface, 2 x USB, 1 x PCIe, 1 x I2S etc

This patch adds support for Quad/Dual and DualLite/Solo SOM's on
MIPI starter kit with boot from SD and eMMC.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoKconfig: usb: rockchip: Remove not needed *_defconfig USB/gadget entries
Lukasz Majewski [Mon, 29 Jan 2018 18:33:32 +0000 (19:33 +0100)]
Kconfig: usb: rockchip: Remove not needed *_defconfig USB/gadget entries

After moving some USB gadget configs (USB_FUNCTIONS_*) to Kconfig it
turned out that following *_defconfig entries for RockChip are not
needed.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
6 years agousb: ums: Kconfig: Select USB_FUNCTION_MASS_STORAGE when enabling 'ums' command
Lukasz Majewski [Mon, 29 Jan 2018 18:28:02 +0000 (19:28 +0100)]
usb: ums: Kconfig: Select USB_FUNCTION_MASS_STORAGE when enabling 'ums' command

The CONFIG_USB_FUNCTION_MASS_STORAGE must be selected when one enables
support for ums command.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
6 years agoKconfig: gadget: Move CONFIG_USB_FUNCTION_MASS_STORAGE to Kconfig
Lukasz Majewski [Mon, 29 Jan 2018 18:25:54 +0000 (19:25 +0100)]
Kconfig: gadget: Move CONFIG_USB_FUNCTION_MASS_STORAGE to Kconfig

This commit moves USB_FUNCTION_MASS_STORAGE config to Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
6 years agoKconfig: gadget: Move CONFIG_USB_FUNCTION_THOR to Kconfig
Lukasz Majewski [Mon, 29 Jan 2018 18:30:18 +0000 (19:30 +0100)]
Kconfig: gadget: Move CONFIG_USB_FUNCTION_THOR to Kconfig

This commit moves USB_FUNCTION_THOR config to Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
6 years agoKconfig: usb: Sort USB_FUNCTION_* entries
Lukasz Majewski [Mon, 29 Jan 2018 18:21:39 +0000 (19:21 +0100)]
Kconfig: usb: Sort USB_FUNCTION_* entries

Lets provide alphabetical order for USB_FUNCTION_* entries of
USB_GADGET_DOWNLOAD

Signed-off-by: Lukasz Majewski <lukma@denx.de>
6 years agoenv: sf: use env_import_redund to simplify env_sf_load
Simon Goldschmidt [Wed, 31 Jan 2018 13:47:13 +0000 (14:47 +0100)]
env: sf: use env_import_redund to simplify env_sf_load

For the redundant environment configuration, env_sf_load still
contained duplicate code instead of using env_import_redund().

Simplify the code by only executing the load twice and delegating
everything else to env_import_redund.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
6 years agoenv: make env drivers propagate env_import return value
Simon Goldschmidt [Wed, 31 Jan 2018 13:47:12 +0000 (14:47 +0100)]
env: make env drivers propagate env_import return value

For multiple env drivers to correctly implement fallback when
one environment fails to load (e.g. crc error), the return value
of env_import has to be propagated by all env driver's load
function.

Without this change, the first driver that succeeds to load an
environment with an invalid CRC return 0 (success) and no other
drivers are checked.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
6 years agoenv: move more common code to env_import_redund
Simon Goldschmidt [Wed, 31 Jan 2018 13:47:11 +0000 (14:47 +0100)]
env: move more common code to env_import_redund

There is more common code in mmc, nand and ubi env drivers that
can be shared by moving to env_import_redund.

For this, a status/error value whether the buffers were loaded
are passed as additional parameters to env_import_redund.
Ideally, these are already returned to the env driver by the
storage driver. This is the case for mmc, nand and ubi, so for
this change, code deduplicated.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
6 years agoenv: make env_import(_redund) return 0 on success, not 1
Simon Goldschmidt [Wed, 31 Jan 2018 13:47:10 +0000 (14:47 +0100)]
env: make env_import(_redund) return 0 on success, not 1

env_import (and env_import_redund) currently return 1 on success
and 0 on error. However, they are only used from functions
returning 0 on success or a negative value on error.

Let's clean this up by making env_import and env_import_redund
return 0 on success and -EIO on error (as was the case for all
users before).

Users that cared for the return value are also updated. Funny
enough, this only affects onenand.c and sf.c

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
6 years agocmd: nvedit: env_get_f must check for env_get_char error codes
Simon Goldschmidt [Wed, 31 Jan 2018 06:56:48 +0000 (07:56 +0100)]
cmd: nvedit: env_get_f must check for env_get_char error codes

env_get_f calls env_get_char to load single characters from the
environment. However, the return value of env_get_char was not
checked for errors. Now if the env driver does not support the
.get_char call, env_get_f did not notice this and looped over the
whole size of the environment, calling env_get_char over 8000
times with the default settings, just to return an error in the
end.

Fix this by checking if env_get_char returns < 0.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
6 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Wed, 31 Jan 2018 23:44:31 +0000 (18:44 -0500)]
Merge git://git.denx.de/u-boot-fsl-qoriq

6 years agodavinci: Fix omapl138_lcdk builds
Tom Rini [Wed, 31 Jan 2018 20:34:49 +0000 (15:34 -0500)]
davinci: Fix omapl138_lcdk builds

The omapl138_lcdk platform is not a DA850 SoC so we need to select
SOC_DA8XX and not SOC_DA850, as it was before.  It does however point
out a bit of a misnomer in how all of these PLL defines are named as
they are generic to DA8xx, not DA850 centric.  Remove the 'if SOC_DA850'
under the defaults as these are simply the defaults.  As SOC_DA8XX will
select SYS_DA850_DDR_INIT when needed, we do not need it under both SOC
options.

Fixes: 76e22222d3aa ("Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig")
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze
Tom Rini [Wed, 31 Jan 2018 12:10:55 +0000 (07:10 -0500)]
Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.03

- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
- ZynqMP psu rework based on Zynq concept
- Add low level initialization for zc770 and zcu102
- Add support for Zynq zc770 x16 nand configuration
- Add mini nand/emmc ZynqMP targets
- Some arasan nand changes

6 years agoConvert CONFIG_SYS_OMAP24_I2C_SLAVE et al to Kconfig
Adam Ford [Wed, 24 Jan 2018 21:21:21 +0000 (15:21 -0600)]
Convert CONFIG_SYS_OMAP24_I2C_SLAVE et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_OMAP24_I2C_SLAVE
   CONFIG_SYS_OMAP24_I2C_SPEED

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Paul Kocialkowski <contact@paulk.fr>
6 years agoConvert CONFIG_SYS_DV_CLKMODE et al to Kconfig
Adam Ford [Tue, 23 Jan 2018 10:04:28 +0000 (04:04 -0600)]
Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_DV_CLKMODE
   CONFIG_SYS_DA850_PLL0_POSTDIV
   CONFIG_SYS_DA850_PLL0_PLLDIV1
   CONFIG_SYS_DA850_PLL0_PLLDIV2
   CONFIG_SYS_DA850_PLL0_PLLDIV3
   CONFIG_SYS_DA850_PLL0_PLLDIV4
   CONFIG_SYS_DA850_PLL0_PLLDIV5
   CONFIG_SYS_DA850_PLL0_PLLDIV6
   CONFIG_SYS_DA850_PLL0_PLLDIV7
   CONFIG_SYS_DA850_PLL1_POSTDIV
   CONFIG_SYS_DA850_PLL1_PLLDIV1
   CONFIG_SYS_DA850_PLL1_PLLDIV2
   CONFIG_SYS_DA850_PLL1_PLLDIV3

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoConvert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig
Derald D. Woods [Mon, 22 Jan 2018 23:17:10 +0000 (17:17 -0600)]
Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig

This converts the following to Kconfig:
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
6 years agoarmv8: ls2088ardb: Add 3DS RDIMM support
York Sun [Mon, 29 Jan 2018 17:44:40 +0000 (09:44 -0800)]
armv8: ls2088ardb: Add 3DS RDIMM support

Tested with MTA72ASS8G72PSZ-2S6G1. This is 3DS RDIMM module with x4
DDR chips. LS2088ARDB needs to be modified to connect all DQS signals.
Some of them are grounded by default for x8 chips. Tested with RDIMM
MTA18ASF2G72PDZ on main memory controllers. DP-DDR doesn't support
RDIMM. Dropped related timing table.

Signed-off-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1046ardb: Add RDIMM support
York Sun [Mon, 29 Jan 2018 17:44:39 +0000 (09:44 -0800)]
armv8: ls1046ardb: Add RDIMM support

This adds 2Rx8 RDIMM on LS1046ARDB board. Tested with RDIMM
MTA18ASF2G72PDZ and MTA9ASF1G72PZ.

Signed-off-by: York Sun <york.sun@nxp.com>
6 years agodrivers/ddr/fsl: Cleanup unused variable
York Sun [Mon, 29 Jan 2018 17:44:38 +0000 (09:44 -0800)]
drivers/ddr/fsl: Cleanup unused variable

Variable "row_density" is no longer used. Drop it from DIMM structure.

Signed-off-by: York Sun <york.sun@nxp.com>
6 years agodrivers/ddr/fsl: Modify binding registers to save time on data init
York Sun [Mon, 29 Jan 2018 17:44:37 +0000 (09:44 -0800)]
drivers/ddr/fsl: Modify binding registers to save time on data init

DDR controllers always use binding register to determine the memory
space to perform data initialization. In case of controller interleaving,
the space is doubled, resulting twice long wait. It wasn't too bad until
the memory capacity increases. To reduce the wait time, reduce the
binding space to half and restore it after data initialization.
Three-way interleaving is no longer used and is removed.

Signed-off-by: York Sun <york.sun@nxp.com>
6 years agodrivers/ddr/fsl: Add calculation of register control words
York Sun [Mon, 29 Jan 2018 18:24:08 +0000 (10:24 -0800)]
drivers/ddr/fsl: Add calculation of register control words

DDR4 RDIMM has some information in SPD to be used to calculate the
control words for register chip. The rest can be found from JEDEC
spec DDR4RCD02.

Signed-off-by: York Sun <york.sun@nxp.com>
6 years agodrivers/ddr/fsl: Add 3DS RDIMM support
York Sun [Mon, 29 Jan 2018 17:44:35 +0000 (09:44 -0800)]
drivers/ddr/fsl: Add 3DS RDIMM support

On top of RDIMM support, add new register calculation to support
3DS RDIMMs. Only symmetrical 3DS is supported at this time.

Signed-off-by: York Sun <york.sun@nxp.com>
6 years agodrivers/ddr/fsl: Fix workaround for A009803
York Sun [Mon, 29 Jan 2018 17:44:34 +0000 (09:44 -0800)]
drivers/ddr/fsl: Fix workaround for A009803

Wrong field was masked in this workaround due to wrong endianness. The
impacted SoCs have big-endian.

Signed-off-by: York Sun <york.sun@nxp.com>
6 years agodrivers/ddr/fsl: Fix DDR4 RDIMM support
York Sun [Mon, 29 Jan 2018 17:44:33 +0000 (09:44 -0800)]
drivers/ddr/fsl: Fix DDR4 RDIMM support

For DDR4, command/address delay in mode registers and parity latency
in timing config register are only needed for UDIMMs, but not RDIMMs.
Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for
dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix
calculation of timing config registers. Use hexadecimal format for
printing RCW (register control word) registers.

Signed-off-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1088a: Add CONFIG_SPI_FLASH_SPANSION to sdcard defconfigs
Ashish Kumar [Mon, 29 Jan 2018 06:41:20 +0000 (12:11 +0530)]
armv8: ls1088a: Add CONFIG_SPI_FLASH_SPANSION to sdcard defconfigs

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agodriver: fsl-mc: Perform fsl-mc fdt fixup for lazyapply dpl
Yogesh Gaur [Tue, 16 Jan 2018 04:38:24 +0000 (10:08 +0530)]
driver: fsl-mc: Perform fsl-mc fdt fixup for lazyapply dpl

For for case of lazyapply method, API fdt_fixup_board_enet() gets
invoked before DPL being deployed. This leads to an issue that
fsl-mc fdt fixup status marked as fail and dprc driver didn't get
registered in linux boot.

Fixes this issue by calling fdt_fixup_board_enet() for case when
DPL is deployed successfully in lazyapply method.

Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Tue, 30 Jan 2018 15:09:01 +0000 (10:09 -0500)]
Merge git://git.denx.de/u-boot-x86

6 years agox86: kconfig: Remove meaningless 'select n'
Ulf Magnusson [Tue, 30 Jan 2018 12:59:03 +0000 (13:59 +0100)]
x86: kconfig: Remove meaningless 'select n'

'select n' selects a constant symbol, which is meaningless and has no
effect. Maybe this was meant to be a 'default n', though bool and
tristate symbols already implicitly default to n.

Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which does more strict checking here:

kconfiglib.KconfigSyntaxError: board/google/Kconfig:34: Couldn't parse ' select n': expected nonconstant symbol

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: quark: Fix unused warnings
Tom Rini [Sat, 27 Jan 2018 20:13:47 +0000 (15:13 -0500)]
x86: quark: Fix unused warnings

The variable t_rfc is never used, so drop it.  The variables ddr_wctl
and ddr_wcmd are only used in certain manual instances, so guard their
declaration by the same check as their use.

Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
6 years agocmd/bdinfo: print relocation info on X86
Heinrich Schuchardt [Wed, 24 Jan 2018 18:52:29 +0000 (19:52 +0100)]
cmd/bdinfo: print relocation info on X86

For debugging U-Boot in qemu-x86 the relocation address is needed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: qemu: qfw: Implement acpi_get_rsdp_addr()
Bin Meng [Tue, 30 Jan 2018 13:01:17 +0000 (05:01 -0800)]
x86: qemu: qfw: Implement acpi_get_rsdp_addr()

U-Boot on QEMU does not build ACPI table by ourself, instead it uses
the prebuilt ACPI table via the qfw interface. This implements the
qfw version of acpi_get_rsdp_addr() for setup_zimage().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
6 years agox86: acpi: Use an API to get the ACPI RSDP table address
Bin Meng [Tue, 30 Jan 2018 13:01:16 +0000 (05:01 -0800)]
x86: acpi: Use an API to get the ACPI RSDP table address

At present the acpi_rsdp_addr variable is directly referenced in
setup_zimage(). This changes to use an API for better encapsulation
and extension.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
6 years agoarm64: zynqmp: Fix misspelled choice default
Ulf Magnusson [Tue, 30 Jan 2018 13:02:01 +0000 (14:02 +0100)]
arm64: zynqmp: Fix misspelled choice default

There is no JTAG symbol in the "Boot mode" choice. JTAG_MODE was
probably intended.

No functional changes. Kconfig choices fall back on using the first
(visible) symbol in the choice as the default if the default symbol is
not visible.

Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which prints the following warning:

warning: the default selection JTAG (undefined) of <choice> (defined at arch/arm/cpu/armv8/zynqmp/Kconfig:107) is not contained in the choice

I've added a corresponding warning to the C tools too, which is
currently in linux-next: https://patchwork.kernel.org/patch/9983667/

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Moved ethernet PHY configs of ZynqMP boards to defconfig
Vipul Kumar [Wed, 24 Jan 2018 05:21:31 +0000 (10:51 +0530)]
arm64: zynqmp: Moved ethernet PHY configs of ZynqMP boards to defconfig

This patch moved ethernet PHY configs of ZynqMP boards
to respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomicroblaze: Moved ethernet PHY configs of Microblaze board to defconfig
Vipul Kumar [Wed, 24 Jan 2018 05:21:32 +0000 (10:51 +0530)]
microblaze: Moved ethernet PHY configs of Microblaze board to defconfig

This patch moved ethernet PHY configs of Microblaze board to
respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm: zynq: Moved ethernet PHY configs of Zynq boards to defconfig
Vipul Kumar [Wed, 24 Jan 2018 05:21:30 +0000 (10:51 +0530)]
arm: zynq: Moved ethernet PHY configs of Zynq boards to defconfig

This patch moved ethernet PHY configs of Zynq boards
to respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm: zynq: Remove ethernet alias for topic-miami
Michal Simek [Wed, 24 Jan 2018 08:37:30 +0000 (09:37 +0100)]
arm: zynq: Remove ethernet alias for topic-miami

Ethernet is not enabled that's why this alias should be completely
unused.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm: zynq: Mark cc108 uart to be initialized before relocation
Michal Simek [Wed, 17 Jan 2018 09:17:19 +0000 (10:17 +0100)]
arm: zynq: Mark cc108 uart to be initialized before relocation

The same change is done for others zynq boards to get uart as early as
possible.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm: zynq: Update years in copyright to reflect latest changes
Michal Simek [Wed, 17 Jan 2018 06:37:47 +0000 (07:37 +0100)]
arm: zynq: Update years in copyright to reflect latest changes

Updating year in zynq files. Also add missing Copyright to board.c.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Add psu_init for zcu102-rev1.0
Michal Simek [Wed, 10 Jan 2018 13:48:53 +0000 (14:48 +0100)]
arm64: zynqmp: Add psu_init for zcu102-rev1.0

Add low level initialization for zcu102-rev1.0.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Prepare psu_init rework
Michal Simek [Wed, 10 Jan 2018 08:36:09 +0000 (09:36 +0100)]
arm64: zynqmp: Prepare psu_init rework

Move generic functions to common location psu_spl_init.c. Function
declarations are added to private header.
These changes are done in connection to the fact that still files from
HDF can be copied over and compilation should pass.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Call psu_init() only when ZYNQMP_PSU_INIT_ENABLED
Michal Simek [Mon, 15 Jan 2018 11:52:59 +0000 (12:52 +0100)]
arm64: zynqmp: Call psu_init() only when ZYNQMP_PSU_INIT_ENABLED

Remove SPL_BUILD dependency from zynqmp.c and move it to header file.
Use only one symbol for including psu_init.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Remove unused empty functions
Michal Simek [Tue, 9 Jan 2018 13:25:38 +0000 (14:25 +0100)]
arm64: zynqmp: Remove unused empty functions

Remove functions which are no longer renerated by PCW.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonand: arasan: Select CONFIG_SYS_NAND_SELF_INIT
Ezequiel Garcia [Mon, 15 Jan 2018 15:48:12 +0000 (12:48 -0300)]
nand: arasan: Select CONFIG_SYS_NAND_SELF_INIT

The Arasan NFC driver requires the self-init mode,
so it should select it.

Instead of having the config header define the macro,
it's cleaner to select the option at the Kconfig level.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonand: arasan_nfc: Use the calculated ecc address for updating ecc register
Siva Durga Prasad Paladugu [Thu, 4 Jan 2018 10:34:22 +0000 (16:04 +0530)]
nand: arasan_nfc: Use the calculated ecc address for updating ecc register

This patch corrects the ecc address calculation before updating
to ecc register. The ecc address has to be calculated based on
page, oob and ecc sizes of the device.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonand: arasan_nfc: Add support for ondie ecc
Siva Durga Prasad Paladugu [Thu, 4 Jan 2018 10:34:21 +0000 (16:04 +0530)]
nand: arasan_nfc: Add support for ondie ecc

This patch adds support for ondie ecc. As of now
this adds support for micron parts which supports
ondie ecc.
Didn't found any better way to detect ondie ecc
support by a device except sorting out with
manufacture and device id's.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonand: arasan_nfc: Move common ecc struct initialization init routine
Siva Durga Prasad Paladugu [Thu, 4 Jan 2018 10:34:20 +0000 (16:04 +0530)]
nand: arasan_nfc: Move common ecc struct initialization init routine

Move common part of ecc structure initialization to
arasan_nand_init() routine.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoxilinx: zynqmp: Add new target with only emmc enabled
Siva Durga Prasad Paladugu [Fri, 5 Jan 2018 10:46:16 +0000 (16:16 +0530)]
xilinx: zynqmp: Add new target with only emmc enabled

This patch adds new target which is called as mini configuration
with only emmc functionality and other required basic features enabled.
This will be used to run in system with small footprint and needs
emmc support.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoxilinx: zynqmp: Add new target with only nand enabled
Siva Durga Prasad Paladugu [Fri, 5 Jan 2018 10:46:15 +0000 (16:16 +0530)]
xilinx: zynqmp: Add new target with only nand enabled

This patch adds new target which is called as mini configuration
with only nand functionality and other required basic features enabled.
This will be used to run in system with small footprint and needs
nand support.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Provide a config to not map DDR region in MMU table
Siva Durga Prasad Paladugu [Fri, 12 Jan 2018 10:05:46 +0000 (15:35 +0530)]
arm64: zynqmp: Provide a config to not map DDR region in MMU table

DDR less systems are possible for configuration like mini qspi
and making DDR region as normal memory may cause speculative
access which results u-boot hang if DDR is absent. So, this
patch fixes the issue by not making DDR memory region
entry into MMU table.

Future solution is to prepare MMU table per memory node in dts instead
of hard code DDR addresses.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>