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8 years agoexynos: video: Rename variables for driver model
Simon Glass [Mon, 22 Feb 2016 04:09:00 +0000 (21:09 -0700)]
exynos: video: Rename variables for driver model

Use 'priv' for a private pointer and 'regs' for a register pointer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: video: Rename edp_device_info to exynos_dp_priv
Simon Glass [Mon, 22 Feb 2016 04:08:59 +0000 (21:08 -0700)]
exynos: video: Rename edp_device_info to exynos_dp_priv

Rename this function to better fit with driver model. It is the private data
for the exynos EDP driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: dts: Add display-related device tree fragments
Simon Glass [Mon, 22 Feb 2016 04:08:58 +0000 (21:08 -0700)]
exynos: dts: Add display-related device tree fragments

Bring in device tree pieces related to display from Linux 4.4 for:

- snow
- peach_pit
- peach_pi
- spring

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: Simplify calling of exynos_dp_phy_ctrl()
Simon Glass [Mon, 22 Feb 2016 04:08:57 +0000 (21:08 -0700)]
exynos: Simplify calling of exynos_dp_phy_ctrl()

This function controls enabling the EDP PHY. Rename it and drop the existing
weak functions, which are confusing.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: Allow PWM0 pinmux to be set up
Simon Glass [Mon, 22 Feb 2016 04:08:56 +0000 (21:08 -0700)]
exynos: Allow PWM0 pinmux to be set up

This is commonly used for LCD backlight control. Add pinmux support for it
on exynos5250 and 5420.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agodts: Add clock and regulator binding files for max77802
Simon Glass [Mon, 22 Feb 2016 04:08:55 +0000 (21:08 -0700)]
dts: Add clock and regulator binding files for max77802

These are used by peach_pit and peach_pi. Add them so they can be referenced
in the device tree files.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: Disable LCD display for boards we can't convert
Simon Glass [Mon, 22 Feb 2016 04:08:54 +0000 (21:08 -0700)]
exynos: Disable LCD display for boards we can't convert

Some boards have the LCD enabled but I cannot test operation for the driver
model conversion. Disable the LCD on these to avoid build errors.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: Allow CONFIG_MISC_COMMON to be build without an LCD
Simon Glass [Mon, 22 Feb 2016 04:08:53 +0000 (21:08 -0700)]
exynos: Allow CONFIG_MISC_COMMON to be build without an LCD

This file currently requires LCD support. Adjust it so that it can still be
built without LCD support (even thought it won't work fully).

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: Allow tizen to be built without an LCD
Simon Glass [Mon, 22 Feb 2016 04:08:52 +0000 (21:08 -0700)]
exynos: Allow tizen to be built without an LCD

This file currently requires an LCD. Adjust it to work without one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: dts: Add pwm device tree node
Simon Glass [Mon, 22 Feb 2016 04:08:51 +0000 (21:08 -0700)]
exynos: dts: Add pwm device tree node

Add this node from Linux v4.4 so that PWMs can be used in U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agovideo: Add an enum for active low/high
Simon Glass [Mon, 22 Feb 2016 04:08:50 +0000 (21:08 -0700)]
video: Add an enum for active low/high

This is used for video signals in some drivers so provide a standard way
of representing it in an enum.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: pwm: Add a driver for the exynos5 PWM
Simon Glass [Mon, 22 Feb 2016 04:08:49 +0000 (21:08 -0700)]
exynos: pwm: Add a driver for the exynos5 PWM

This driver supports the standard PWM API. There are 5 PWMs. Four are used
normally and the last is normally used as a timer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: video: Combine LCD driver into one file
Simon Glass [Mon, 22 Feb 2016 04:08:48 +0000 (21:08 -0700)]
exynos: video: Combine LCD driver into one file

At present exynos_fimd.c is the controller and exynos_fb.c is the U-Boot
LCD interface. With driver model we want these in one file, so join them
in preparation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: video: Move mipi_lcd_device_dt into a function
Simon Glass [Mon, 22 Feb 2016 04:08:47 +0000 (21:08 -0700)]
exynos: video: Move mipi_lcd_device_dt into a function

In preparation for making this a parameter, move it into the function
that sets it up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: video: Move struct exynos_platform_mipi_dsim into vidinfo
Simon Glass [Mon, 22 Feb 2016 04:08:46 +0000 (21:08 -0700)]
exynos: video: Move struct exynos_platform_mipi_dsim into vidinfo

Put the pointer to this structure in struct vidinfo so that we can
reference it without it being global.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: video: Move dsim_config_dt into a function
Simon Glass [Mon, 22 Feb 2016 04:08:45 +0000 (21:08 -0700)]
exynos: video: Move dsim_config_dt into a function

In preparation for making this a parameter, move it into the function
that sets it up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: video: Drop static variables in exynos_dp_lowlevel.c
Simon Glass [Mon, 22 Feb 2016 04:08:44 +0000 (21:08 -0700)]
exynos: video: Drop static variables in exynos_dp_lowlevel.c

Drop these and use parameters instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: video: Drop static variables in exynos_fb.c
Simon Glass [Mon, 22 Feb 2016 04:08:43 +0000 (21:08 -0700)]
exynos: video: Drop static variables in exynos_fb.c

Drop these and use the existing variables instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: video: Drop static variables in exynos_fimd.c
Simon Glass [Mon, 22 Feb 2016 04:08:42 +0000 (21:08 -0700)]
exynos: video: Drop static variables in exynos_fimd.c

Drop these and use parameters instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: video: Drop the static lcd_base_addr variable
Simon Glass [Mon, 22 Feb 2016 04:08:41 +0000 (21:08 -0700)]
exynos: video: Drop the static lcd_base_addr variable

Drop this and use parameters instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: video: Remove use of vidinfo_t typedef
Simon Glass [Mon, 22 Feb 2016 04:08:40 +0000 (21:08 -0700)]
exynos: video: Remove use of vidinfo_t typedef

Use 'struct vidinfo' instead so that we can change this to a struct with a
different name in future.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: video: Drop dead code
Simon Glass [Mon, 22 Feb 2016 04:08:39 +0000 (21:08 -0700)]
exynos: video: Drop dead code

We always use device tree with video, so can drop these #ifdefs. Some of the
hardware addresses are not needed either.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoexynos: video: Move driver files into their own directory
Simon Glass [Mon, 22 Feb 2016 04:08:38 +0000 (21:08 -0700)]
exynos: video: Move driver files into their own directory

Move all the exynos video drivers into one place for ease of maintenance.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoboard: samsung: add initial Espresso7420 board support
Thomas Abraham [Sat, 23 Apr 2016 16:48:14 +0000 (22:18 +0530)]
board: samsung: add initial Espresso7420 board support

Espresso7420 is a development/evaluation board for Exynos7420 SoC. It
includes multiple onboard compoments (EMMC/Codec) and various
interconnects (USB/HDMI).

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoarm: exynos: add support for Exynos7420 SoC
Thomas Abraham [Sat, 23 Apr 2016 16:48:13 +0000 (22:18 +0530)]
arm: exynos: add support for Exynos7420 SoC

Add support for Exynos7420 SoC. The Exynos7420 SoC has four Cortex-A57
and four Cortex-A53 CPUs and includes various peripheral controllers.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoarm: exynos: realign the code to allow support for newer 64-bit platforms
Thomas Abraham [Sat, 23 Apr 2016 16:48:12 +0000 (22:18 +0530)]
arm: exynos: realign the code to allow support for newer 64-bit platforms

The existing Exynos 32-bit platform support needs to be realigned in
order to support newer 64-bit Exynos platforms. The driver model will
be utlized for drivers on the 64-bit Exynos platforms and so some of
the older platform support code would not be required for the newer
64-bit Exynos platforms.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoserial: s5p: use clock api to get clock rate
Thomas Abraham [Sat, 23 Apr 2016 16:48:11 +0000 (22:18 +0530)]
serial: s5p: use clock api to get clock rate

On Exynos platforms that support clock driver API, allow the driver to
use clock api get the SCLK clock rate.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoserial: s5p: get the port id number from the alias of the device node
Thomas Abraham [Sat, 23 Apr 2016 16:48:10 +0000 (22:18 +0530)]
serial: s5p: get the port id number from the alias of the device node

The port id, if not specified in the device node, can be obtained from
the alias of the device node listed in the aliases node.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoclk: exynos: add clock driver for Exynos7420 Soc
Thomas Abraham [Sat, 23 Apr 2016 16:48:09 +0000 (22:18 +0530)]
clk: exynos: add clock driver for Exynos7420 Soc

Add a clock driver for Exynos7420 SoC. There are about 25 clock controller
blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks
are added in this initial version of the driver.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agopinctrl: Add pinctrl driver support for Exynos7420 SoC
Thomas Abraham [Sat, 23 Apr 2016 16:48:08 +0000 (22:18 +0530)]
pinctrl: Add pinctrl driver support for Exynos7420 SoC

Add pinctrl driver support for Samsung's Exynos7420 SoC. The changes
have been split into Exynos7420 specific and common Exynos specific
portions so that this implementation is reusable on other Exynos
SoCs as well.

The Exynos pinctrl driver supports only device tree based pin
configuration. The bindings used are similar to the ones used in the
linux kernel.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agopinctrl: add the DM_UC_FLAG_SEQ_ALIAS flag for numbering the devices
Thomas Abraham [Sat, 23 Apr 2016 16:48:07 +0000 (22:18 +0530)]
pinctrl: add the DM_UC_FLAG_SEQ_ALIAS flag for numbering the devices

It is possible to have multiple pin controllers in the system. Use the
DM_UC_FLAG_SEQ_ALIAS flag so that the pinctrl instances are assigned
a sequence number.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Tue, 24 May 2016 17:42:03 +0000 (13:42 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-net
Tom Rini [Tue, 24 May 2016 15:59:02 +0000 (11:59 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-net

Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
drivers/net/zynq_gem.c

8 years agonet: phy: dp83867: Add SGMII helper for configuration
Dan Murphy [Mon, 2 May 2016 20:46:02 +0000 (15:46 -0500)]
net: phy: dp83867: Add SGMII helper for configuration

The code assumed that if the interface is not RGMII configured
then it must be SGMII configured.  This device has the ability
to support most of the MII interfaces.  Therefore add the
helper for SGMII and only configure the device if the interface is
configured for SGMII.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agonet: phy: Add phy_interface_is_sgmii to phy.h
Dan Murphy [Mon, 2 May 2016 20:46:01 +0000 (15:46 -0500)]
net: phy: Add phy_interface_is_sgmii to phy.h

Add a helper to phy.h to identify whether the
phy is configured for SGMII all variables.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agonet: phy: Move is_rgmii helper to phy.h
Dan Murphy [Mon, 2 May 2016 20:46:00 +0000 (15:46 -0500)]
net: phy: Move is_rgmii helper to phy.h

Move the phy_interface_is_rgmii to the phy.h
file for all phy's to be able to use the API.

This now aligns with the Linux kernel based on
commit e463d88c36d42211aa72ed76d32fb8bf37820ef1

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agonet: phy: ti: Allow the driver to be more configurable
Dan Murphy [Mon, 2 May 2016 20:45:59 +0000 (15:45 -0500)]
net: phy: ti: Allow the driver to be more configurable

Not all devices use the same internal delay or fifo depth.
Add the ability to set the internal delay for rx or tx and the
fifo depth via the devicetree.  If the value is not set in the
devicetree then set the delay to the default.

If devicetree is not used then use the default defines within the
driver.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agonet: phy: dp83867: Add device tree bindings and documentation
Dan Murphy [Mon, 2 May 2016 20:45:58 +0000 (15:45 -0500)]
net: phy: dp83867: Add device tree bindings and documentation

Add the device tree bindings and the accompanying documentation
for the TI DP83867 Giga bit ethernet phy driver.

The original document was from:
    [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agonet: zynq_gem: Add the passing of the phy-handle node
Dan Murphy [Mon, 2 May 2016 20:45:57 +0000 (15:45 -0500)]
net: zynq_gem: Add the passing of the phy-handle node

Add the ability to pass the phy-handle node offset
to the phy driver.  This allows the phy driver
to access the DT subnode's data and parse accordingly.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agodrivers: net: cpsw: Add reading of DT phy-handle node
Dan Murphy [Mon, 2 May 2016 20:45:56 +0000 (15:45 -0500)]
drivers: net: cpsw: Add reading of DT phy-handle node

Add the ability to read the phy-handle node of the
cpsw slave.  Upon reading this handle the phy-id
can be stored based on the reg node in the DT.

The phy-handle also needs to be stored and passed
to the phy to access any phy data that is available.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agodefconfig: dra74_evm: enable eth driver model
Mugunthan V N [Thu, 28 Apr 2016 10:06:13 +0000 (15:36 +0530)]
defconfig: dra74_evm: enable eth driver model

Enable eth driver model for dra74_evm as cpsw supports
driver model.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agodefconfig: am437x_sk_evm: enable eth driver model
Mugunthan V N [Thu, 28 Apr 2016 10:06:12 +0000 (15:36 +0530)]
defconfig: am437x_sk_evm: enable eth driver model

Enable eth driver model for am437x_sk_evm as cpsw supports
driver model.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agodefconfig: am437x_gp_evm: enable eth driver model
Mugunthan V N [Thu, 28 Apr 2016 10:06:11 +0000 (15:36 +0530)]
defconfig: am437x_gp_evm: enable eth driver model

Enable eth driver model for am437x_gp_evm as cpsw supports
driver model.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agoarm: dts: dra7: fix ethernet name with proper device address
Mugunthan V N [Thu, 28 Apr 2016 10:06:10 +0000 (15:36 +0530)]
arm: dts: dra7: fix ethernet name with proper device address

Fix typo error for cpsw device name with proper device address

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agoarm: dts: dra7: add syscon node to cpsw to read mac address
Mugunthan V N [Thu, 28 Apr 2016 10:06:09 +0000 (15:36 +0530)]
arm: dts: dra7: add syscon node to cpsw to read mac address

Add syscon node to cpsw device node to read mac address
from efuse.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agoarm: dts: am4372: add syscon node to cpsw to read mac address
Mugunthan V N [Thu, 28 Apr 2016 10:06:08 +0000 (15:36 +0530)]
arm: dts: am4372: add syscon node to cpsw to read mac address

Add syscon node to cpsw device node to read mac address
from efuse.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agodrivers: net: cpsw: add support for reading mac address from efuse
Mugunthan V N [Thu, 28 Apr 2016 10:06:07 +0000 (15:36 +0530)]
drivers: net: cpsw: add support for reading mac address from efuse

Different TI platforms has to read with different combination to
get the mac address from efuse. So add support to read mac address
based on machine/device compatibles.

The code is taken from Linux drivers/net/ethernet/ti/cpsw-common.c
done by Tony Lindgren.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agodrivers: net: cpsw: fix get mdio base and gmii_sel reg from DT
Mugunthan V N [Thu, 28 Apr 2016 10:06:06 +0000 (15:36 +0530)]
drivers: net: cpsw: fix get mdio base and gmii_sel reg from DT

Since dra7x platforms address bus is define as 64 bits to support
LAPE, fdtdec_get_addr() returns a invalid address for mdio based
and gmii_sel register address. Fixing this by using
fdtdec_get_addr_size_auto_noparent() which will derive address
cell and size cell from its parent.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agoARM: omap5: add platform specific ethernet phy modes configurations
Mugunthan V N [Thu, 28 Apr 2016 10:06:05 +0000 (15:36 +0530)]
ARM: omap5: add platform specific ethernet phy modes configurations

Add platforms specific phy mode configuration bits to be used
to configure phy mode in control module.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agodrivers: net: cpsw: fix cpsw dp parse when num slaves as 1
Mugunthan V N [Thu, 28 Apr 2016 10:06:04 +0000 (15:36 +0530)]
drivers: net: cpsw: fix cpsw dp parse when num slaves as 1

On some boards number of slaves can be 1 when only one port
ethernet is pinned out. So do not break when slave_index and
num slaves check fails, instead continue to parse the next
child.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agoti_omap5_common: eth: do not define DM_ETH for spl
Mugunthan V N [Thu, 28 Apr 2016 10:06:03 +0000 (15:36 +0530)]
ti_omap5_common: eth: do not define DM_ETH for spl

Since omap's spl doesn't support DM currently, do not define
DM_ETH for spl build.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agodrivers: core: device: add support to check dt compatible for a device/machine
Mugunthan V N [Thu, 28 Apr 2016 10:06:02 +0000 (15:36 +0530)]
drivers: core: device: add support to check dt compatible for a device/machine

Provide an api to check whether the given device or machine is
compatible with the given compat string which helps in making
decisions in drivers based on device or machine compatible.

Idea taken from Linux.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agonet: phy: Add PHY driver for mv88e61xx switches
Kevin Smith [Thu, 31 Mar 2016 19:33:12 +0000 (19:33 +0000)]
net: phy: Add PHY driver for mv88e61xx switches

The previous mv88e61xx driver was a driver for configuring the
switch, but did not integrate with the PHY/networking system, so
it could not be used as a PHY by U-boot.  This is a complete
rework to support this device as a PHY.

Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agonet: Remove unused mv88e61xx switch driver
Kevin Smith [Thu, 31 Mar 2016 19:33:12 +0000 (19:33 +0000)]
net: Remove unused mv88e61xx switch driver

No boards are using this driver.  Remove in preparation for a new
driver with integrated PHY support.

Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
8 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Tue, 24 May 2016 12:20:43 +0000 (08:20 -0400)]
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-atmel
Tom Rini [Tue, 24 May 2016 11:22:55 +0000 (07:22 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-atmel

8 years agoARM: zynq: Simplify zynq configuration
Michal Simek [Fri, 20 May 2016 12:59:33 +0000 (14:59 +0200)]
ARM: zynq: Simplify zynq configuration

Extending Kconfig for adding new platform is a lot of work
for nothing. Setting SYS_CONFIG_NAME directly in Kconfig and
remove all dependencies on TARGET_ZYNQ_* options including SPL.
As a side-effect it also remove custom init folder for ps7_init_gpl.*
files. Folder is chosen based on device-tree file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agophy: marvell: Do not reset phy after negotiation
Michal Simek [Wed, 18 May 2016 12:46:28 +0000 (14:46 +0200)]
phy: marvell: Do not reset phy after negotiation

The patch
"net: phy: do not read configuration register on reset"
(sha1: a058052c358c3ecf5f394ff37def6a45eb26768c)
was causing regression on zynq zc702 board where Marwell 88e1118
phy was resetted after negotiation was setup.
Phy reset is done pretty early in phy_connect_dev() and doens't need to
be called again in phy code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agophy: Wire return value from phy_config()
Michal Simek [Wed, 18 May 2016 12:37:23 +0000 (14:37 +0200)]
phy: Wire return value from phy_config()

Fix zynq_gem driver to handle error from phy_config correctly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoimage: Add boot_get_fpga() to load fpga with bootm
Michal Simek [Tue, 17 May 2016 12:03:50 +0000 (14:03 +0200)]
image: Add boot_get_fpga() to load fpga with bootm

Add function boot_get_fpga() which find and load bitstream to
programmable logic if fpga entry is present.
Function is supported on Xilinx devices for full and partial bitstreams
in BIN and BIT format.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove additional blankline in image.h

8 years agonet: phy: Handle phy_startup() error codes properly
Michal Simek [Wed, 18 May 2016 10:46:12 +0000 (12:46 +0200)]
net: phy: Handle phy_startup() error codes properly

Propagate error code from genphy_update_link() to phy startup().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agophy: Return correct error code when timeout happens
Michal Simek [Wed, 18 May 2016 10:48:57 +0000 (12:48 +0200)]
phy: Return correct error code when timeout happens

Return -ETIMEDOUT if timeout happens.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agonet: xilinx: Handle error value from phy_startup()
Michal Simek [Wed, 18 May 2016 10:37:22 +0000 (12:37 +0200)]
net: xilinx: Handle error value from phy_startup()

Handle error returned by phy_startup() properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agomkimage: Report information about fpga
Michal Simek [Tue, 17 May 2016 11:58:44 +0000 (13:58 +0200)]
mkimage: Report information about fpga

Add FIT_FPGA_PROP that user can identify an optional
entry for fpga.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agofpga: Fix typo in function comment
Michal Simek [Tue, 17 May 2016 12:32:00 +0000 (14:32 +0200)]
fpga: Fix typo in function comment

Trivial patch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable CLK framework
Michal Simek [Tue, 17 May 2016 11:33:11 +0000 (13:33 +0200)]
ARM64: zynqmp: Enable CLK framework

ZynqMP is using fixed clocks now that's why enabling it to be available
for drivers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add SPL support support
Michal Simek [Fri, 20 Nov 2015 12:17:22 +0000 (13:17 +0100)]
ARM64: zynqmp: Add SPL support support

Support RAM and MMC boot mode in SPL also with SPL_FIT images.

In MMC boot mode two boot options are available:
1) Boot flow with ATF(EL3) and full U-Boot(EL2):
 aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin
 mkimage -A arm64 -O linux -T kernel -C none -a 0xfffe5000 -e 0xfffe5000
 -d bl31.bin atf.ub
 cp spl/boot.bin <sdcard fat partition>
 cp atf.ub <sdcard fat partition>
 cp u-boot.bin <sdcard fat partition>

2) Boot flow with full U-Boot(EL3):
 cp spl/boot.bin <sdcard>
 cp u-boot*.img <sdcard>

3) emmc boot mode
 dd if=/dev/zero of=sd.img bs=1024 count=1024
 parted sd.img mktable msdos
 parted sd.img mkpart p fat32 0% 100%
 kpartx -a sd.img
 mkfs.vfat /dev/mapper/loop0p1
 mount /dev/mapper/loop0p1 /mnt/
 cp spl/boot.bin /mnt
 cp u-boot.img /mnt
 cp u-boot.bin /mnt
 cp atf.ub /mnt
 umount /dev/mapper/loop0p1
 kpartx -d sd.img
 cp sd.img /tftpboot/

 and program it via u-boot
 tftpb 10000 sd.img
 mmcinfo
 mmc write 10000 0 $filesize
 mmc rescan
 mmc part
 ls mmc 0

psu_init() function contains low level SoC setup generated for every HW
design by Xilinx design tools. xil_io.h is only supporting file to fix
all dependencies from tools. The same solution was used on Xilinx Zynq.

The patch also change CONFIG_SYS_INIT_SP_ADDR to the end of OCM which
stays at the same location all the time.
Bootrom expects starting address to be at 0xfffc0000 that's why this
address is SPL_TEXT_BASE.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add missing u-boot,dm-pre-reloc to DTSI
Michal Simek [Mon, 22 Feb 2016 08:57:27 +0000 (09:57 +0100)]
ARM64: zynqmp: Add missing u-boot,dm-pre-reloc to DTSI

Add missing u-boot,dm-pre-reloc to get IPs initialized.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Align gic ranges for 64k in device tree
Alexander Graf [Thu, 12 May 2016 11:44:01 +0000 (13:44 +0200)]
ARM64: zynqmp: Align gic ranges for 64k in device tree

The GIC ranges in the zynqmp device tree are only 4kb aligned. Since
commit 12e14066f we automatically deal with aliases GIC regions though,
so we can map them transparently into guests even on 64kb page size
systems.

This patch makes use of that features and sets GICC and GICV to 64kb
aligned and sized regions.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agotools: zynqmpimage: Add Xilinx ZynqMP boot header generation
Michal Simek [Wed, 27 Apr 2016 12:03:29 +0000 (14:03 +0200)]
tools: zynqmpimage: Add Xilinx ZynqMP boot header generation

Add support for the zynqmpimage to mkimage.
Only basic functionality is supported without encryption and register
initialization with one partition which is filled by U-Boot SPL.
For more detail information look at Xilinx ZynqMP TRM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoSPL: FIT: Enable SPL_FIT_LOAD in RAM based boot mode
Michal Simek [Thu, 28 Apr 2016 07:54:16 +0000 (09:54 +0200)]
SPL: FIT: Enable SPL_FIT_LOAD in RAM based boot mode

Support loading FIT in SPL for RAM bootmode.
CONFIG_SPL_LOAD_FIT_ADRESS points to address where FIT image is stored
in memory.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
8 years agoARM: zynq: Call ps7_post_config() for SPL
Michal Simek [Tue, 10 May 2016 05:55:52 +0000 (07:55 +0200)]
ARM: zynq: Call ps7_post_config() for SPL

If ps7_post_config() is defined call it. It is enabling for example
level shifters for PL bitstreams.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable option to overwrite default variables
Michal Simek [Tue, 10 May 2016 07:50:35 +0000 (09:50 +0200)]
ARM64: zynqmp: Enable option to overwrite default variables

Enable overwriting variables out of main config file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agospl: Introduce new function spl_board_prepare_for_boot
Michal Simek [Tue, 10 May 2016 05:54:20 +0000 (07:54 +0200)]
spl: Introduce new function spl_board_prepare_for_boot

Call this function before passing control from SPL.
For fpga case it is necessary to enable for example level shifters
when bitstream is programmed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoARM64: zynqmp: Add debug uart for zc1751-dc1
Michal Simek [Wed, 4 May 2016 10:33:22 +0000 (12:33 +0200)]
ARM64: zynqmp: Add debug uart for zc1751-dc1

It is helpful for debugging.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable SPI_FLASH and FLASH_BAR for ep108
Michal Simek [Thu, 17 Mar 2016 22:02:37 +0000 (23:02 +0100)]
ARM64: zynqmp: Enable SPI_FLASH and FLASH_BAR for ep108

Add missing SPI flash options.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Remove CONFIG_PREBOOT
Michal Simek [Fri, 29 Apr 2016 11:04:02 +0000 (13:04 +0200)]
ARM64: zynqmp: Remove CONFIG_PREBOOT

CONFIG_PREBOOT variable is breaking ./test/py framework.
Remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Add support for SPL_LOAD_FIT
Michal Simek [Tue, 3 May 2016 12:20:17 +0000 (14:20 +0200)]
ARM: zynq: Add support for SPL_LOAD_FIT

Enable minimal function to be able to compile SPL_LOAD_FIT.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Wire up debug_uart setup
Michal Simek [Fri, 22 Apr 2016 06:50:45 +0000 (08:50 +0200)]
ARM64: zynqmp: Wire up debug_uart setup

It has to be enabled by debug_uart_init().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable eMMC boot partitions commands
Michal Simek [Tue, 26 Apr 2016 14:03:42 +0000 (16:03 +0200)]
ARM64: zynqmp: Enable eMMC boot partitions commands

Enable some additional features of the eMMC boot partitions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add support for reading MAC from eeprom
Michal Simek [Fri, 22 Apr 2016 09:48:49 +0000 (11:48 +0200)]
ARM64: zynqmp: Add support for reading MAC from eeprom

Add support for on board eeprom with programmed MAC for using in u-boot
to have uniq address for every board.
Most of the time uniq MAC address is on a label on the board.
If address is not programmed use these command to program it.

On zcu102:
ZynqMP> mm.b 0
00000000: 00 ? 00
00000001: a0 ? 0a
00000002: 35 ? 35
00000003: 02 ? 02
00000004: 00 ? ef
00000005: 00 ? 67
00000006: 00 ? q
i2c dev 5
i2c write 0 54 20 6
i2c md 54 20

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable missing distro default options
Michal Simek [Fri, 22 Apr 2016 12:28:17 +0000 (14:28 +0200)]
ARM64: zynqmp: Enable missing distro default options

Enable all options which distros requires.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable HUSH parser for all zynqmp targets
Michal Simek [Fri, 22 Apr 2016 11:04:42 +0000 (13:04 +0200)]
ARM64: zynqmp: Enable HUSH parser for all zynqmp targets

Enable HUSH for all zynqmp boards which don't have it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: dts: zynq: describe SLCR as simple-mfd rather than simple-bus
Masahiro Yamada [Mon, 25 Apr 2016 03:14:43 +0000 (12:14 +0900)]
ARM: dts: zynq: describe SLCR as simple-mfd rather than simple-bus

Commit 9f56917ab88a ("dm: core: make simple-bus compatible to
simple-mfd") made possible to import the following commit:

Linux commit: bc5ba9b98435bf76d92e0954da1784695aa449f1

The SLCR (System-Level Control Registers) block is an MFD (Multi
Function Device) rather than a bus.

"simple-mfd" seems a more suitable compatible string than "simple-bus".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agogpio: zynq: Add support for reading gpio pin state
Michal Simek [Fri, 4 Mar 2016 14:56:50 +0000 (15:56 +0100)]
gpio: zynq: Add support for reading gpio pin state

Add zynq_gpio_get_function() which return status on gpio pin.
This function enables gpio status command.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: load u-boot.img whether CONFIG_OF_SEPARATE is defined or not
Masahiro Yamada [Wed, 13 Apr 2016 21:52:26 +0000 (06:52 +0900)]
ARM: zynq: load u-boot.img whether CONFIG_OF_SEPARATE is defined or not

Since commit ad1ecd2063da ("fdt: Build a U-Boot binary without device
tree"), u-boot-dtb.img is identical to u-boot.img, so SPL can always
load u-boot.img whether CONFIG_OF_SEPARATE is defined or not.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: sama5d2: Implement boot device autodetection
Marek Vasut [Fri, 22 Apr 2016 19:56:21 +0000 (21:56 +0200)]
ARM: sama5d2: Implement boot device autodetection

Implement support for saving ARM register R4 early during boot using
save_boot_params . Implement support for decoding the stored register
R4 value in spl_boot_device() to obtain boot device from which the
SoC booted. This way, the SPL will always load U-Boot from the same
device from which the SPL itself booted instead of using hard-coded
boot device.

This functionality is useful for example when booting sama5d2-xplained
from SD card, where by default the SPL would try loading the U-Boot
from eMMC and fail. This is because eMMC is on SDHCI0 (BOOT_DEVICE_MMC1),
while SD slot is on SDHCI1 (BOOT_DEVICE_MMC2) and the SPL was hard-wired
to always boot from BOOT_DEVICE_MMC1.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
8 years agoARM: atmel: Enable FIT image support for SAMA5Dx
Marek Vasut [Mon, 18 Apr 2016 16:30:41 +0000 (18:30 +0200)]
ARM: atmel: Enable FIT image support for SAMA5Dx

Enable the fitImage support for the entire SAMA5Dx lineup of CPUs.
The fitImage is superior image format to uImage and it is useful
to have it available.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[rebase on current ToT]
Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
8 years agoboard: sama5d2_xplained: change SDHCI GCK's clock source to UPLL
Wenyou Yang [Mon, 11 Apr 2016 08:41:33 +0000 (16:41 +0800)]
board: sama5d2_xplained: change SDHCI GCK's clock source to UPLL

Change the clock source of the SDHCI's generated clock from PLLA to
UPLL clock to align to Linux driver.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
8 years agoARM: at91: clock: complete the GCK's clock sources
Wenyou Yang [Mon, 11 Apr 2016 08:41:32 +0000 (16:41 +0800)]
ARM: at91: clock: complete the GCK's clock sources

Add the UPLL clock and master clock as a clock source for getting
the generated clock frequency to complete its clock sources support.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
8 years agoARM: at91: clock: fix the GCK's clock source
Wenyou Yang [Mon, 11 Apr 2016 08:41:31 +0000 (16:41 +0800)]
ARM: at91: clock: fix the GCK's clock source

Before enabling a generated clock whose source is from the UPLL
clock, check and enable the UPLL clock.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
8 years agoboard: atmel: sama5d2_xplained: fix the missing pin config of SDMMC0
Wenyou Yang [Mon, 11 Apr 2016 06:07:17 +0000 (14:07 +0800)]
board: atmel: sama5d2_xplained: fix the missing pin config of SDMMC0

Fix the missing pin config of the SDMMC0 interface.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
8 years agoboard: atmel: add SAMA5D2 PTC Engineering board
Wenyou Yang [Fri, 26 Feb 2016 09:20:26 +0000 (17:20 +0800)]
board: atmel: add SAMA5D2 PTC Engineering board

The board supports following features:
 - Boot media support: NAND Flash/SPI Flash
 - Support ethernet
 - Support USB mass storage

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
8 years agoARM: at91: sama5d2: add macro & field definitions
Wenyou Yang [Fri, 26 Feb 2016 09:20:25 +0000 (17:20 +0800)]
ARM: at91: sama5d2: add macro & field definitions

They will be used on SAMA5D2 PTC board.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-x86
Tom Rini [Mon, 23 May 2016 22:32:47 +0000 (18:32 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-x86

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-mips
Tom Rini [Sat, 21 May 2016 00:43:27 +0000 (20:43 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips

8 years agoARM: fix ifdef in ARMv8 lowlevel_init() again
Masahiro Yamada [Fri, 20 May 2016 03:13:10 +0000 (12:13 +0900)]
ARM: fix ifdef in ARMv8 lowlevel_init() again

Commit 116611937faa ("ARM: fix ifdefs in ARMv8 lowlevel_init()")
accidentally inverted the logic of CONFIG_ARMV8_MULTIENTRY.

Fixes: 116611937faa ("ARM: fix ifdefs in ARMv8 lowlevel_init()")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agoSPL: fat: Fix spl_parse_image_header() return value handling
Tom Rini [Mon, 23 May 2016 15:51:13 +0000 (11:51 -0400)]
SPL: fat: Fix spl_parse_image_header() return value handling

The spl_parse_image_header() can return 0 and it is not an error.
Only treat non-zero return value as an error.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <van.freenix@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoomap3: Fix SPI registers on am33xx and am43xx
Martin Hejnfelt [Thu, 19 May 2016 07:11:58 +0000 (09:11 +0200)]
omap3: Fix SPI registers on am33xx and am43xx

When the base registers are read from device tree the base is not
0x48030100 as the driver expects, but 0x48030000, resulting in
non functioning SPI. To deal with this, use same idea as how this
is done in the linux kernel (drivers/spi/spi-omap2-mcspi.c) and
add a structure with a field that is used to shift the registers
on these systems.

v2: Fixed commit subject line to correct cpu

Signed-off-by: Martin Hejnfelt <mh@newtec.dk>
8 years agokbuild: fixdep: Check fstat(2) return value
Tom Rini [Fri, 13 May 2016 14:54:04 +0000 (10:54 -0400)]
kbuild: fixdep: Check fstat(2) return value

Coverity has recently added a check that will find when we don't check
the return code from fstat(2).  Copy/paste the checking logic that
print_deps() has with an appropriate re-wording of the perror() message.

[ Linux commit : 46fe94ad18aa7ce6b3dad8c035fb538942020f2b ]

Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Marek <mmarek@suse.com>