]> git.sur5r.net Git - u-boot/log
u-boot
7 years agot81xx: Migrate TI81XX/TI816X/TI814X symbols to Kconfig
Tom Rini [Tue, 16 May 2017 18:46:40 +0000 (14:46 -0400)]
t81xx: Migrate TI81XX/TI816X/TI814X symbols to Kconfig

The symbol CONFIG_TI81XX is used for the parts that are common to the
TI816x and TI814x SoCs and are not part of CONFIG_ARCH_OMAP2PLUS nor
CONFIG_AM33XX.  It however has so few uses that we can just modify the
code to check for both and drop the symbol. The symbols CONFIG_TI816X
and CONFIG_TI814X are for the repective SoCs.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoti816x: Modernize the defconfig
Tom Rini [Tue, 16 May 2017 18:46:39 +0000 (14:46 -0400)]
ti816x: Modernize the defconfig

- Switch to using <configs/ti_armv7_omap.h> and family.  This lets us
  drop lots of custom defines.
- Ensure that our default environment uses DEFAULT_LINUX_BOOT_ENV so
  that Linux will boot correctly.
- Enable CONFIG_DISTRO_DEFAULTS
- Switch to using CONFIG_OF_CONTROL
- Various other cleanups to match other SoCs in the family line.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoti816x: Import dts files from Linux Kernel v4.11
Tom Rini [Tue, 16 May 2017 18:46:38 +0000 (14:46 -0400)]
ti816x: Import dts files from Linux Kernel v4.11

This brings in the required dts/dtsi files for the TI8168-EVM from the
Linux Kernel v4.11 release.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoti816x: Enable NAND
Tom Rini [Tue, 16 May 2017 18:46:37 +0000 (14:46 -0400)]
ti816x: Enable NAND

The TI8168-EVM comes with NAND on board.  Enable it and move environment
over there.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoti816x_evm: Disable CONFIG_USE_PRIVATE_LIBGCC
Tom Rini [Tue, 16 May 2017 18:46:36 +0000 (14:46 -0400)]
ti816x_evm: Disable CONFIG_USE_PRIVATE_LIBGCC

On this platform, we can trace a general failure to boot to enabling /
disabling this option.  When this is enabled, we go off into the
weeds during SPL and are unable to talk with the SD card and
mmc_initialize() fails.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoti816x: Rework DDR initialization sequence
Tom Rini [Tue, 16 May 2017 18:46:35 +0000 (14:46 -0400)]
ti816x: Rework DDR initialization sequence

The ti816x/am389x SoC is the first generation in what U-Boot calls the
"am33xx" family.  In the first generation of this family the DDR
initialization sequence is quite different from all of the subsequent
generations.  Whereas with ti814x (second generation) we can easily work
the minor differenced between that and am33xx (third generation), our
attempts to do this for ti816x weren't sufficient.  Rather than add a
large amount of #ifdef logic to make this different sequence work we add
a new file, ti816x_emif4.c to handle the various required undocumented
register writes and sequence and leverage what we can from
arch/arm/mach-omap2/am33xx/ddr.c still.  As DDR2 has similar problems
today but I am unable to test it, we drop the DDR2 defines from the code
rather than imply that it works by leaving it.  We also remove a bunch
of other untested code about changing the speed the DDR runs at.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoarmv7: Mark the default lowlevel_init function as weak
Tom Rini [Tue, 16 May 2017 18:46:34 +0000 (14:46 -0400)]
armv7: Mark the default lowlevel_init function as weak

Rather than have a long and if check in the Makefile, mark the default
lowlevel_init function as weak (as we do on armv8) so that SoCs can
override it if needed, and it will still be discarded if unused.
Provide a weak s_init as well to allow for this to link and be
discarded.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoconfigs: davinci: omapl138_lcdk: add random eth address support
Anna, Suman [Tue, 16 May 2017 17:50:18 +0000 (12:50 -0500)]
configs: davinci: omapl138_lcdk: add random eth address support

Any TFTP or DHCP boot on the Davinci OMAP-L138 LCDK board requires
that the 'ethaddr' variable be defined. There are no e-fuses to store
the ethernet mac address for this platform, and neither is a MAC
address reserved in any format. So enable random MAC address support
so that networking boot can be supported.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoEnable PXE boot on meson-gxbb.
Vagrant Cascadian [Fri, 5 May 2017 21:11:26 +0000 (14:11 -0700)]
Enable PXE boot on meson-gxbb.

Enable distro_bootcmd PXE functions on meson-gxbb systems.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Mon, 5 Jun 2017 02:29:33 +0000 (22:29 -0400)]
Merge git://git.denx.de/u-boot-x86

7 years agox86: fsp: Remove the call to set up internal uart in fsp_init()
Bin Meng [Thu, 1 Jun 2017 10:41:14 +0000 (03:41 -0700)]
x86: fsp: Remove the call to set up internal uart in fsp_init()

First of all, it's inappropriate to call setup_internal_uart() in a
generic API fsp_init(), as CONFIG_INTERNAL_UART is an option that
is only available on BayTrail platform. Secondly even for BayTrail,
there is no need to call setup_internal_uart() at all, as Intel FSP
will do this for us.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agox86: baytrail: Fix boot hang with a debug build
Bin Meng [Thu, 1 Jun 2017 10:41:13 +0000 (03:41 -0700)]
x86: baytrail: Fix boot hang with a debug build

It was observed that when -DDEBUG is used to generate a debug build,
U-Boot does not boot on MinnowMax board. A workaround is to disable
CONFIG_DEBUG_UART. The real issue is that in order to have the debug
uart to work, BayTrail SoC needs to be configured so that its internal
uart is available to be used as the debug uart.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agox86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer
Bin Meng [Wed, 31 May 2017 08:04:15 +0000 (01:04 -0700)]
x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer

At present lpe/lpss-sio/scc FSP properties are all boolean, but in
fact for "enable-lpe" it has 3 possible options. This adds macros
for these options and change the property from a boolean type to
an integer type, and change their names to explicitly indicate what
the property is really for.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agox86: baytrail: Use macros instead of magic numbers for FSP settings
Bin Meng [Wed, 31 May 2017 08:04:14 +0000 (01:04 -0700)]
x86: baytrail: Use macros instead of magic numbers for FSP settings

Introduce various meaningful macros for FSP settings and switch over
to use them instead of magic numbers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agox86: baytrail: Remove "serial-debug-port-*" settings
Bin Meng [Wed, 31 May 2017 08:04:13 +0000 (01:04 -0700)]
x86: baytrail: Remove "serial-debug-port-*" settings

"serial-debug-port-address" and "serial-debug-port-type" settings
are actually reserved in the FSP UPD data structure. Remove them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agox86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1
Bin Meng [Wed, 31 May 2017 08:04:12 +0000 (01:04 -0700)]
x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1

The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per
FSP default settings. 0 is not valid.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMerge git://git.denx.de/u-boot-fdt
Tom Rini [Sun, 4 Jun 2017 17:13:29 +0000 (13:13 -0400)]
Merge git://git.denx.de/u-boot-fdt

7 years agoMerge git://git.denx.de/u-boot-net
Tom Rini [Sat, 3 Jun 2017 22:05:28 +0000 (18:05 -0400)]
Merge git://git.denx.de/u-boot-net

7 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Sat, 3 Jun 2017 22:05:04 +0000 (18:05 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq

7 years agoMerge git://git.denx.de/u-boot-sunxi
Tom Rini [Sat, 3 Jun 2017 22:04:54 +0000 (18:04 -0400)]
Merge git://git.denx.de/u-boot-sunxi

7 years agoKconfig: Migrate FS_FAT / FAT_WRITE
Tom Rini [Fri, 2 Jun 2017 15:03:50 +0000 (11:03 -0400)]
Kconfig: Migrate FS_FAT / FAT_WRITE

Now that these symbols are in Kconfig, migrate all users.  Use imply on
a number of platforms that default to having this enabled.  As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: enable support for writing to fat partition
Sekhar Nori [Fri, 2 Jun 2017 12:24:04 +0000 (17:54 +0530)]
board: ti: enable support for writing to fat partition

Enable support for writing to FAT partitions on
TI's boards.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
7 years agoconfig_fallbacks: add additional fallbacks for fat filesystem
Sekhar Nori [Fri, 2 Jun 2017 12:24:02 +0000 (17:54 +0530)]
config_fallbacks: add additional fallbacks for fat filesystem

Add fallbacks needed to keep all boards building
while they are migrated to use Kconfig symbols
instead of defines in <board>_config.h files for
FAT filesystem.

These should eventually go away once Kconfig select
or imply statements are put in place and duplicated
defines in <board>_config.h removed.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
[trini: Update logic since CMD_FAT / CONFIG_SPL_FAT_SUPPORT are
        selecting FS_FAT]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoconfigs: k2g_evm: make sure config fallbacks take effect
Sekhar Nori [Fri, 2 Jun 2017 12:24:01 +0000 (17:54 +0530)]
configs: k2g_evm: make sure config fallbacks take effect

Since config fallbacks contained in include/config_fallbacks.h
come into k2g_evm.h file through ti_armv7_keystone2.h, it should
be the last file included.

Without this, #define of FAT_WRITE when environment is in FAT
does not happen as the environment location is decided later
in the file.

Similar issues can come with other config fallbacks implemented.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
7 years agoconfigs: k2*_evm: let each board decide env location
Sekhar Nori [Fri, 2 Jun 2017 12:24:00 +0000 (17:54 +0530)]
configs: k2*_evm: let each board decide env location

Not all TI Keystone2 EVMs want environment in NAND flash.
K2G EVM which has an MMC/SD slot, keep environment in a
FAT partition on SD card.

Since ti_armv7_keystone2.h defines environment is in NAND,
boards which do not follow that have to #undef'ine that
configuration. This leads to ugly ordering issues around
where exactly the include of ti_armv7_keystone2.h can come
in within the k2*_evm.h files.

Move environment location to config file of each board.
This should make it easy to change it for any one board
without affecting all other boards.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
7 years agofs: fat: add kbuild configuration support
Sekhar Nori [Fri, 2 Jun 2017 12:23:59 +0000 (17:53 +0530)]
fs: fat: add kbuild configuration support

Add Kconfig symbols for various configurations
supported by FAT filesystem support code.

CONFIG_SUPPORT_VFAT has been left out since its
force enabled in include/fat.h and probably
should get removed at some point.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
[trini: add select FS_FAT for CMD_FAT and SPL_FAT_SUPPORT]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agonet: pch_gbe: Add cache maintenance
Paul Burton [Sun, 30 Apr 2017 19:57:08 +0000 (21:57 +0200)]
net: pch_gbe: Add cache maintenance

On MIPS systems DMA isn't coherent with the CPU caches unless an IOCU is
present. When there is no IOCU we need to writeback or invalidate the
data caches at appropriate points. Perform this cache maintenance in
the pch_gbe driver which is used on the MIPS Boston development board.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: pch_gbe: CPU accessible addresses are virtual
Paul Burton [Sun, 30 Apr 2017 19:57:07 +0000 (21:57 +0200)]
net: pch_gbe: CPU accessible addresses are virtual

Use the virt_to_bus & bus_to_virt functions rather than phys_to_bus &
bus_to_phys, since the addresses accessed by the CPU will be virtual
rather than physical. On MIPS physical & virtual addresses differ as we
use virtual addresses in kseg0, and attempting to use physical addresses
directly caused problems as they're in the user segment which would be
mapped via the uninitialised TLB.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: pch_gbe: Fix rx descriptor buffer addresses
Paul Burton [Sun, 30 Apr 2017 19:57:06 +0000 (21:57 +0200)]
net: pch_gbe: Fix rx descriptor buffer addresses

The loop to set up buffer addresses in rx descriptors always operated on
descriptor 0, rather than on each descriptor sequentially. Fix this in
order to setup correct buffer addresses for each descriptor.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: pch_gbe: Reset during probe
Paul Burton [Sun, 30 Apr 2017 19:57:05 +0000 (21:57 +0200)]
net: pch_gbe: Reset during probe

Using the EG20T gigabit ethernet controller on the MIPS Boston board, we
find that we have to reset the controller in order for the RGMII link to
the PHY to become functional. Without doing so we constantly time out in
pch_gbe_mdio_ready.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: zynq_gem: Dont flush dummy descriptors
Siva Durga Prasad Paladugu [Tue, 30 May 2017 12:28:40 +0000 (14:28 +0200)]
net: zynq_gem: Dont flush dummy descriptors

Dont flush dummy descriptors as they are already
allocated from a region with dcache off. Tested
this on Zynq(zc702) and ZynqMP(zcu102) boards.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: zynq_gem: Use wait_for_bit with non breakable
Siva Durga Prasad Paladugu [Tue, 30 May 2017 12:28:39 +0000 (14:28 +0200)]
net: zynq_gem: Use wait_for_bit with non breakable

Use wait_for_bit to be non breakable as using it with
breakable causes issue of un interruptible auto negotiation.
This is due to the ctrlc pressed will taken for wait_for_bit()
abort during phy_read() and hence not coming out of
auto negotiation.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: phy: marvell 88e151x: Fix handling of RGMII interface types
Phil Edworthy [Wed, 24 May 2017 13:43:06 +0000 (14:43 +0100)]
net: phy: marvell 88e151x: Fix handling of RGMII interface types

The 88E1518 code is programming the wrong registers for rgmii-id,
rgmii-txid and rgmii-rxid interfaces.

Since the PHY defaults to rgmii-id, it would appear that the code
was previously only used with sgmii and rgmii-id interfaces.

Tested on 88E1512 PHY in rgmii-id mode which is from the same family
as 88E1518.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: core: avoid possible NULL pointer dereference
xypron.glpk@gmx.de [Tue, 16 May 2017 03:07:01 +0000 (05:07 +0200)]
net: core: avoid possible NULL pointer dereference

Checking if dev is NULL after dereferencing it does not make sense.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agodrivers: net: cpsw: abort init() on aneg timeout
Sekhar Nori [Mon, 8 May 2017 15:19:56 +0000 (20:49 +0530)]
drivers: net: cpsw: abort init() on aneg timeout

Abort CPSW driver init when auto-negotiation of link
times out. Currently, the code ignores return status
of phy_startup(), and goes ahead with network operation
(like DHCP) even though the link may be down.

Instead, abort init process if link is down or if there
is another error, so phy_startup() can easily be retried
again. This also helps quick fallback to next network interface
(like USB RNDIS) without inordinate delay.

Tested on AM571x IDK and AM335x BeagleBone black.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: macb: Fix GMAC not work when enable DM_ETH
Wenyou Yang [Thu, 20 Apr 2017 03:13:13 +0000 (11:13 +0800)]
net: macb: Fix GMAC not work when enable DM_ETH

Always search the PHY to determine the macb->phy_addr before using
the PHY to fix "No PHY present" error.

Fix the wrong test of the GMAC's phy interface mode, it should be
PHY_INTERFACE_MODE_RGMII.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: mvpp2.c: Enable 10G support for port 0 (SFI)
Stefan Chulski [Thu, 6 Apr 2017 13:39:08 +0000 (15:39 +0200)]
net: mvpp2.c: Enable 10G support for port 0 (SFI)

This patch fixes some remaining issues in the mvpp2 driver for the 10GB
support on port 0. These changes are:

- Incorrect PCS configuration
- Skip PHY configuration when no PHY is connected
- Skip GMAC configurations if 10G SFI mode set

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agoarmv8/ls1046a: RGMII PHY requires internal delay on Tx
Madalin Bucur [Mon, 3 Apr 2017 14:43:56 +0000 (17:43 +0300)]
armv8/ls1046a: RGMII PHY requires internal delay on Tx

Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agoarmv8/ls1043a: RGMII PHY requires internal delay on Tx
Madalin Bucur [Mon, 3 Apr 2017 14:43:55 +0000 (17:43 +0300)]
armv8/ls1043a: RGMII PHY requires internal delay on Tx

Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: zynq_gem: Do not return -ENOSYS on success
Olliver Schinagl [Mon, 3 Apr 2017 14:18:53 +0000 (16:18 +0200)]
net: zynq_gem: Do not return -ENOSYS on success

The .read_rom_hwaddr net_ops hook does not check the return value, which
is why it was never caught that we are currently returning 0 if the
read_rom_hwaddr function return -ENOSYS and -ENOSYS otherwise.

In this case we can simplify this by just returning the result of the
function.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
7 years agonet: designware: Add phy supply support
Jacob Chen [Mon, 27 Mar 2017 08:54:17 +0000 (16:54 +0800)]
net: designware: Add phy supply support

Some board need a regulator for gmac phy, so add this code to handle it.
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: Kconfig:make PHY_GIGE and individual Micrel PHYs selectable
Philipp Tomsich [Sun, 26 Mar 2017 16:50:23 +0000 (18:50 +0200)]
net: Kconfig:make PHY_GIGE and individual Micrel PHYs selectable

This change migrate the following configuration options for Kconfig:
 * PHY_GIGE, indicates that a controller (with an appropriate PHY) is
   Gigabit capable and enables extra support in the miiutil for
   parsing the status of Gigabit PHYs
 * adds configuration options for Micrel KSZ9021 and KSZ9031 GbE PHYs,
   which previously had to enabled through a board-specific config file

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agofdt: Drop fdt_select.py
Simon Glass [Sat, 27 May 2017 13:38:30 +0000 (07:38 -0600)]
fdt: Drop fdt_select.py

This file was used to select between the normal and fallback libfdt
implementations. Now that we only have one, it is not needed.

Drop it and fix up all users.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agobinman: Rename fdt variable to dtb
Simon Glass [Sat, 27 May 2017 13:38:29 +0000 (07:38 -0600)]
binman: Rename fdt variable to dtb

Since fdt is the name of a module, use a different name for variables to
avoid a conflict.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Merge fdt_normal with its base class
Simon Glass [Sat, 27 May 2017 13:38:28 +0000 (07:38 -0600)]
fdt: Merge fdt_normal with its base class

Since we only have one Fdt implementation now we don't need to have a base
class. Merge the implementation and the base class together.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agobinman: Drop a special case related to fdt_fallback
Simon Glass [Sat, 27 May 2017 13:38:27 +0000 (07:38 -0600)]
binman: Drop a special case related to fdt_fallback

Previously we were sometimes forced to collate x86 microcode due to not
having access to the offset of each individual piece. Now that we never
use fdt_fallback, we don't have this problem. Drop this special case from
the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Drop fdt_fallback library
Simon Glass [Sat, 27 May 2017 13:38:26 +0000 (07:38 -0600)]
fdt: Drop fdt_fallback library

Drop this now-unused library and associated tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Drop use of the legacy libfdt python module
Simon Glass [Sat, 27 May 2017 13:38:25 +0000 (07:38 -0600)]
fdt: Drop use of the legacy libfdt python module

Now that this is no-longer available, stop looking for it. The new module
will be used if available.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Stop building the old python libfdt module
Simon Glass [Sat, 27 May 2017 13:38:24 +0000 (07:38 -0600)]
fdt: Stop building the old python libfdt module

This is no-longer needed, so stop building it.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Makefile: Build python libfdt library if needed
Simon Glass [Sat, 27 May 2017 13:38:23 +0000 (07:38 -0600)]
fdt: Makefile: Build python libfdt library if needed

This is needed by binman and dtoc, so if those are being used, check that
the library is present and complain if not. Make sure that any error
appears on stderr so that buildman notices it.

This means that the fallback library (which uses fdtget) will not be used
anymore and swig will need to be installed to use binman / dtoc.

This affects any board which uses binman (currently sunxi and x86) or dtoc
(anything that uses CONFIG_SPL_OF_PLATDATA, currently some rockchip
boards).

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Support use of the new python libfdt library
Simon Glass [Sat, 27 May 2017 13:38:22 +0000 (07:38 -0600)]
fdt: Support use of the new python libfdt library

Use the new library if available, while retaining backwards compatibility
with the old library for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: dtoc: Add a full set of property tests
Simon Glass [Sat, 27 May 2017 13:38:21 +0000 (07:38 -0600)]
fdt: dtoc: Add a full set of property tests

The tests don't currently cover all the different property types. Add a
new test which checks each property type in turn, to make sure each has
the correct type and value.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Update fdt_test to use 'dt' instead of 'fdt'
Simon Glass [Sat, 27 May 2017 13:38:20 +0000 (07:38 -0600)]
fdt: Update fdt_test to use 'dt' instead of 'fdt'

Since fdt is a module it conflicts with this variable name and prevents it
being used in tests. Rename the variable.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Build the new python libfdt module
Simon Glass [Sat, 27 May 2017 13:38:19 +0000 (07:38 -0600)]
fdt: Build the new python libfdt module

Build the upstream python libfdt module. At present the legacy module is
still built and is the one that it used. Future work will switch this
over.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Rename existing python libfdt module
Simon Glass [Sat, 27 May 2017 13:38:18 +0000 (07:38 -0600)]
fdt: Rename existing python libfdt module

Now that this module has been accepted upstream we should stop using the
local U-Boot one. In preparation for this, rename it to indicate it is for
legacy use.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Add all source files to the libfdt build
Simon Glass [Sat, 27 May 2017 13:38:17 +0000 (07:38 -0600)]
fdt: Add all source files to the libfdt build

At present only a subset of source files are build. Add the rest and
refactor this so that a source file list is available also. This will be
used in later commit.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Allow swig options to be provided by Makefile
Simon Glass [Sat, 27 May 2017 13:38:16 +0000 (07:38 -0600)]
fdt: Allow swig options to be provided by Makefile

U-Boot needs to provide some swig include directories. Add this feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Move header files into lib/libfdt
Simon Glass [Sat, 27 May 2017 13:38:15 +0000 (07:38 -0600)]
fdt: Move header files into lib/libfdt

These header files are actually part of libfdt. Move them there to make
it easier to build pylibfdt and easier to merge changes from upstream.

Update the license header to use SPDX at the same time.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Use SPDX format for licenses in the libfdt headers
Simon Glass [Sat, 27 May 2017 13:38:14 +0000 (07:38 -0600)]
fdt: Use SPDX format for licenses in the libfdt headers

These should follow the UBoot standard. Update them.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Correct cast for sandbox in fdtdec_setup_memory_size()
Simon Glass [Sat, 27 May 2017 13:38:13 +0000 (07:38 -0600)]
fdt: Correct cast for sandbox in fdtdec_setup_memory_size()

This gives a warning with some native compilers:

lib/fdtdec.c:1203:8: warning: format ‘%llx’ expects argument of type
   ‘long long unsigned int’, but argument 3 has type
   ‘long unsigned int’ [-Wformat=]

Fix it with a cast.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agopci: Correct cast for sandbox
Simon Glass [Sat, 27 May 2017 13:38:12 +0000 (07:38 -0600)]
pci: Correct cast for sandbox

This gives a warning with some native compilers:

cmd/pci.c:152:11: warning: format ‘%llx’ expects argument of type
   ‘long long unsigned int’, but argument 3 has type
   ‘u64 {aka long unsigned int}’ [-Wformat=]

Fix it with a cast.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Add Python bindings
Simon Glass [Sat, 27 May 2017 13:38:11 +0000 (07:38 -0600)]
fdt: Add Python bindings

An early version of this is available upstream. Bring it in as a starting
point. This is from dtc upstream commit e56f2b0.

Future work will plumb it into dtoc and remove the now-unnecessary local
libraries.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agosun50i: h5: Add initial Orangepi Prime support
Jagan Teki [Wed, 24 May 2017 19:18:08 +0000 (19:18 +0000)]
sun50i: h5: Add initial Orangepi Prime support

Orangepi Prime is an open-source single-board computer
using the Allwinner h5 SOC.

H5 Orangepi Prime has
- Quad-core Cortex-A53
- 2GB DDR3
- Debug TTL UART
- 1000M/100M Ethernet RJ45
- Three USB 2.0
- HDMI
- Audio and MIC
- Wifi + BT
- IR receiver
- HDMI
- Wifi + BT

Boot from MMC:
-------------
U-Boot SPL 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:30:14)
DRAM: 2048 MiB
Trying to boot from MMC1
NOTICE:  BL3-1: Running on H5 (1718) in SRAM A2 (@0x44000)
NOTICE:  Configuring SPC Controller
NOTICE:  BL3-1: v1.0(debug):aa75c8d
NOTICE:  BL3-1: Built : 18:28:27, May 24 2017
INFO:    BL3-1: Initializing runtime services
INFO:    BL3-1: Preparing for EL3 exit to normal world
INFO:    BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9

U-Boot 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:30:14 +0000) Allwinner Technology

CPU:   Allwinner H5 (SUN50I)
Model: OrangePi Prime
DRAM:  2 GiB
MMC:   SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   phy interface7
eth0: ethernet@1c30000
starting USB...
USB0:   USB EHCI 1.00
USB1:   USB OHCI 1.0
scanning bus 0 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autoboot:  0

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agoarmv8: ls1046ardb: Enable loading PPA during SPL stage for SD boot
York Sun [Mon, 15 May 2017 15:52:03 +0000 (08:52 -0700)]
armv8: ls1046ardb: Enable loading PPA during SPL stage for SD boot

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1046a: Enable spl_board_init() function
York Sun [Mon, 15 May 2017 15:52:02 +0000 (08:52 -0700)]
armv8: ls1046a: Enable spl_board_init() function

CONFIG_SPL_BOARD_INIT is used for SPL boot. It is only enabled for
secure boot at this moment. Enable it in defconfig files for SPL
build.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1043ardb: Enable loading PPA during SPL stage for SD boot
York Sun [Mon, 15 May 2017 15:52:01 +0000 (08:52 -0700)]
armv8: ls1043ardb: Enable loading PPA during SPL stage for SD boot

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: layerscape: Enabling loading PPA during SPL stage
York Sun [Mon, 15 May 2017 15:52:00 +0000 (08:52 -0700)]
armv8: layerscape: Enabling loading PPA during SPL stage

Loading PPA in SPL puts the rest of U-Boot (including RAM version
loaded later) in EL2 with MMU and cache enabled. Once PPA is loaded,
PSCI is available.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: layerscape: Make U-Boot EL2 safe
York Sun [Mon, 15 May 2017 15:51:59 +0000 (08:51 -0700)]
armv8: layerscape: Make U-Boot EL2 safe

When U-Boot boots from EL2, skip some lowlevel init code requiring
EL3, including CCI-400/CCN-504, trust zone, GIC, etc. These
initialization tasks are carried out before U-Boot runs. This applies
to the RAM version image used for SPL boot if PPA is loaded first.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls2080aqds: Add support for SD boot
Santan Kumar [Fri, 5 May 2017 10:12:29 +0000 (15:42 +0530)]
armv8: ls2080aqds: Add support for SD boot

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls2080a: Reorganise NAND_BOOT code in config flag
Santan Kumar [Fri, 5 May 2017 10:12:28 +0000 (15:42 +0530)]
armv8: ls2080a: Reorganise NAND_BOOT code in config flag

Add CONFIG_NAND_BOOT config flag to organise
NAND_BOOT specific code in config flag like
-nand-boot specfic errata errata_rcw_src()
-CONFIG_SYS_NAND_U_BOOT_DST,etc

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoQE: add QE support on SD boot
Zhao Qiang [Thu, 25 May 2017 01:47:40 +0000 (09:47 +0800)]
QE: add QE support on SD boot

modify u_qe_init to upload QE firmware from SD card when it is SD
boot

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agodrivers: net: fsl-mc: Include MAC addr fixup to DPL
Bogdan Purcareata [Wed, 24 May 2017 16:40:22 +0000 (16:40 +0000)]
drivers: net: fsl-mc: Include MAC addr fixup to DPL

Previous to MC v10.x, port mac address was specified via DPL. Since
newer MC versions are compatible with old style DPLs, make the u-boot
env mac addresses visible there. This applies only to DPLs that have
an older version.

DPLs use 32 bit values for specifying MAC addresses. U-boot
environment variables take precedence over the MAC addresses already
visible in the DPL/DPC.

Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Signed-off-by: Heinz Wrobel <heinz.wrobel@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agodrivers: net: fsl-mc: Link MC boot to PHY_RESET_R
Bogdan Purcareata [Wed, 24 May 2017 16:40:21 +0000 (16:40 +0000)]
drivers: net: fsl-mc: Link MC boot to PHY_RESET_R

DPAA2 platforms boot the Management Complex based on the u-boot env
variable "mcinitcmd". Instead of doing this step on each platform
individually, define a single mc_env_boot function in the MC driver,
since it's semantically tied to it.

Call the function in a per-board reset_phy hook, as it gets called at a
later moment, when all board PHY devices have been initialized.

Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Signed-off-by: Heinz Wrobel <heinz.wrobel@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarm64: dts: sun50i: h5: orangepi-pc2: Use GPIO flag binding macro
Jagan Teki [Thu, 25 May 2017 18:26:41 +0000 (18:26 +0000)]
arm64: dts: sun50i: h5: orangepi-pc2: Use GPIO flag binding macro

Instead of defining numerical value on GPIO flag
better to use existing binding macro.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoarm64: dts: sun50i: Add sun50i-h5.dtsi
Jagan Teki [Thu, 25 May 2017 18:15:36 +0000 (18:15 +0000)]
arm64: dts: sun50i: Add sun50i-h5.dtsi

The Allwinner H5 SoC is pin-compatible to the H3 SoC,
but uses Cortex-A53 cores instead.

So move the shared cpu based and peripherals nodes into
sun50i-h5.dtsi so, that it can shared among the sun50i-h5
board dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agosandbox: Move to use live tree
Simon Glass [Fri, 19 May 2017 02:10:02 +0000 (20:10 -0600)]
sandbox: Move to use live tree

This updates sandbox to use a live device tree. This means that after
relocation (from board_init_r() onwards) it no-longer uses flat device
tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: gpio: power: Convert pm8916 drivers to livetree
Simon Glass [Fri, 19 May 2017 02:10:01 +0000 (20:10 -0600)]
dm: gpio: power: Convert pm8916 drivers to livetree

This PMIC driver (power and GPIO) is used by the sandbox SPMI tests.
Update the drivers to support a live device tree so that the tests pass.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: test: Fix nit with position of backslash
Simon Glass [Fri, 19 May 2017 02:10:00 +0000 (20:10 -0600)]
dm: test: Fix nit with position of backslash

Line up this backslash with all the others.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: sandbox: sysreset: Convert driver to livetree
Simon Glass [Fri, 19 May 2017 02:09:59 +0000 (20:09 -0600)]
dm: sandbox: sysreset: Convert driver to livetree

Update this driver to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: sandbox: spi: Convert driver to support livetree
Simon Glass [Fri, 19 May 2017 02:09:58 +0000 (20:09 -0600)]
dm: sandbox: spi: Convert driver to support livetree

Update this driver to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: spi-flash: Convert uclass to livetree
Simon Glass [Fri, 19 May 2017 02:09:57 +0000 (20:09 -0600)]
dm: spi-flash: Convert uclass to livetree

Update the SPI flash uclass to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: sandbox: i2c_rtc: Drop fdtdec.h header
Simon Glass [Fri, 19 May 2017 02:09:56 +0000 (20:09 -0600)]
dm: sandbox: i2c_rtc: Drop fdtdec.h header

This is not needed in this driver. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: sandbox: i2c: Drop fdtdec.h header
Simon Glass [Fri, 19 May 2017 02:09:55 +0000 (20:09 -0600)]
dm: sandbox: i2c: Drop fdtdec.h header

This is not needed in this driver. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: spi: Convert uclass to livetree
Simon Glass [Fri, 19 May 2017 02:09:54 +0000 (20:09 -0600)]
dm: spi: Convert uclass to livetree

Update the SPI uclass to support a live device tree. Also adjust
spi_slave_ofdata_to_platdata() to accept a device instead of a blob and
offset.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agocros_ec: Update the cros_ec keyboard driver to livetree
Simon Glass [Fri, 19 May 2017 02:09:53 +0000 (20:09 -0600)]
cros_ec: Update the cros_ec keyboard driver to livetree

Update this driver and key_matrix to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: Update the I2C eeprom driver for livetree
Simon Glass [Fri, 19 May 2017 02:09:52 +0000 (20:09 -0600)]
dm: Update the I2C eeprom driver for livetree

Update this driver so that it works with livetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: pci: Update uclass to support livetree
Simon Glass [Fri, 19 May 2017 02:09:51 +0000 (20:09 -0600)]
dm: pci: Update uclass to support livetree

Update the PCI uclass to support livetree. This mostly involves fixing
the address decoding from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: reset: Update uclass to support livetree
Simon Glass [Fri, 19 May 2017 02:09:50 +0000 (20:09 -0600)]
dm: reset: Update uclass to support livetree

Update the reset domain uclass to support livetree. Fix the xlate() method
which has no callers.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: power-domain: Update uclass to support livetree
Simon Glass [Fri, 19 May 2017 02:09:49 +0000 (20:09 -0600)]
dm: power-domain: Update uclass to support livetree

Update the power domain uclass to support livetree. Fix the xlate() method
which has no callers.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agosandbox: phy: Update driver for livetree
Simon Glass [Fri, 19 May 2017 02:09:48 +0000 (20:09 -0600)]
sandbox: phy: Update driver for livetree

Update the sandbox phy driver to support livetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: phy: Update uclass to support livetree
Simon Glass [Fri, 19 May 2017 02:09:47 +0000 (20:09 -0600)]
dm: phy: Update uclass to support livetree

Update the phy uclass to support livetree. Fix the xlate() method
which has no callers.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: mailbox: Update uclass to support livetree
Simon Glass [Fri, 19 May 2017 02:09:46 +0000 (20:09 -0600)]
dm: mailbox: Update uclass to support livetree

Update the mailbox uclass to support livetree. Fix the xlate() method
in all callers.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: phy: Update tests to use ut_asserteq()
Simon Glass [Fri, 19 May 2017 02:09:45 +0000 (20:09 -0600)]
dm: phy: Update tests to use ut_asserteq()

Use ut_asserteq() to test equality since this gives a better error message
on failure. Also make a few of the tests more specific.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: test: Disable the fdt_offset test with livetree
Simon Glass [Fri, 19 May 2017 02:09:44 +0000 (20:09 -0600)]
dm: test: Disable the fdt_offset test with livetree

We cannot run this test with livetree since it uses device tree offsets.
Mark it as flat tree only.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: test: Separate out the bus DT offset test
Simon Glass [Fri, 19 May 2017 02:09:43 +0000 (20:09 -0600)]
dm: test: Separate out the bus DT offset test

We cannot access the device tree via an offset when running in livetree
mode. Separate out that part of the bus' children tests and mark it as
for the flat tree only.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: clk: fixed: Update to support livetree
Simon Glass [Fri, 19 May 2017 02:09:42 +0000 (20:09 -0600)]
dm: clk: fixed: Update to support livetree

Update the fixed-rate clock driver to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: clk: Update uclass to support livetree
Simon Glass [Wed, 31 May 2017 03:47:29 +0000 (21:47 -0600)]
dm: clk: Update uclass to support livetree

Update the clk uclass to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoclk: Modify xlate() method for livetree
Simon Glass [Fri, 19 May 2017 02:09:40 +0000 (20:09 -0600)]
clk: Modify xlate() method for livetree

Update the xlate() method to use ofnode_phandle_args instead of the fdtdec
variant. This will allow drivers to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agosandbox: usb: Convert emulators to livetree
Simon Glass [Fri, 19 May 2017 02:09:39 +0000 (20:09 -0600)]
sandbox: usb: Convert emulators to livetree

Update the sandbox flash and hub USB emulators to support a live device
tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodm: usb: Convert uclass to livetree
Simon Glass [Fri, 19 May 2017 02:09:38 +0000 (20:09 -0600)]
dm: usb: Convert uclass to livetree

Update the usb uclass to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>