]> git.sur5r.net Git - u-boot/log
u-boot
7 years agox86: spl: Add weak arch_cpu_init_dm()
Bin Meng [Wed, 18 Jan 2017 11:32:53 +0000 (03:32 -0800)]
x86: spl: Add weak arch_cpu_init_dm()

arch_cpu_init_dm() might not be implemented by every platform.
Implement a weak version for SPL.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agox86: Wrap print_ch() with config option
Bin Meng [Wed, 18 Jan 2017 11:32:52 +0000 (03:32 -0800)]
x86: Wrap print_ch() with config option

print_ch() should not be used if DEBUG_UART is off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agox86: qemu: Add missing DECLARE_GLOBAL_DATA_PTR in e820.c
Bin Meng [Wed, 18 Jan 2017 11:32:51 +0000 (03:32 -0800)]
x86: qemu: Add missing DECLARE_GLOBAL_DATA_PTR in e820.c

DECLARE_GLOBAL_DATA_PTR is missing which causes 64-bit build error.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agox86: link: Add a config for 64-bit U-Boot
Simon Glass [Mon, 16 Jan 2017 14:04:27 +0000 (07:04 -0700)]
x86: link: Add a config for 64-bit U-Boot

Add a new board config which uses 64-bit U-Boot. This is not fully
functional but is it a start. Missing features:

- SDRAM sizing
- Booting linux
- EFI support
- SCSI device init
(and others)

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Update compile/link flags to support 64-bit U-Boot
Simon Glass [Mon, 16 Jan 2017 14:04:26 +0000 (07:04 -0700)]
x86: Update compile/link flags to support 64-bit U-Boot

Update config.mk settings to support both 32-bit and 64-bit U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: link: Add build options for SPL
Simon Glass [Mon, 16 Jan 2017 14:04:25 +0000 (07:04 -0700)]
x86: link: Add build options for SPL

If SPL is used we want to use the generic SPL framework and boot from SPI
via a board-specific means. Add these options to the board config file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: link: Set up device tree for SPL
Simon Glass [Mon, 16 Jan 2017 14:04:24 +0000 (07:04 -0700)]
x86: link: Set up device tree for SPL

Add the correct pre-relocation tag so that the required device tree nodes
are present in the SPL device tree.

On x86 it doesn't make a lot of sense to have a separate SPL device tree.
Since everything is in the same ROM we might as well just use the main
device tree in both SPL and U-Boot proper. But we haven't implemented that,
so this is a good first step.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: link: Add SPL declarations to the binman image
Simon Glass [Mon, 16 Jan 2017 14:04:23 +0000 (07:04 -0700)]
x86: link: Add SPL declarations to the binman image

When building for 64-bit we need to put an SPL binary into the image. Update
the binman image description to reflect this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: link: Add a text base for 64-bit U-Boot
Simon Glass [Mon, 16 Jan 2017 14:04:22 +0000 (07:04 -0700)]
x86: link: Add a text base for 64-bit U-Boot

Set up the 64-bit U-Boot text base if building for that target.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Add a dummy setjmp implementation for x86_64
Simon Glass [Mon, 16 Jan 2017 14:04:21 +0000 (07:04 -0700)]
x86: Add a dummy setjmp implementation for x86_64

We don't have the code for this yet. Add a dummy version for now, so that
EFI builds correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Move setjmp to the i386 directory
Simon Glass [Mon, 16 Jan 2017 14:04:20 +0000 (07:04 -0700)]
x86: Move setjmp to the i386 directory

This code is only used in 32-bit mode. Move it so that it does not get
built with 64-bit U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Move call64 to the i386 directory
Simon Glass [Mon, 16 Jan 2017 14:04:19 +0000 (07:04 -0700)]
x86: Move call64 to the i386 directory

This code is only used in 32-bit mode. Move it so that it does not get
built with 64-bit U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Change irq_already_routed to a local variable
Simon Glass [Mon, 16 Jan 2017 14:04:18 +0000 (07:04 -0700)]
x86: Change irq_already_routed to a local variable

This avoids using BSS before SDRAM is set up in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Move turbo_state to global_data
Simon Glass [Mon, 16 Jan 2017 14:04:17 +0000 (07:04 -0700)]
x86: Move turbo_state to global_data

To avoid using BSS in SPL before SDRAM is set up, move this field to
global_data.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Move pirq_routing_table to global_data
Simon Glass [Mon, 16 Jan 2017 14:04:16 +0000 (07:04 -0700)]
x86: Move pirq_routing_table to global_data

To avoid using BSS in SPL before SDRAM is set up, move this field to
global_data.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Support jumping from SPL to U-Boot
Simon Glass [Mon, 16 Jan 2017 14:04:15 +0000 (07:04 -0700)]
x86: Support jumping from SPL to U-Boot

Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot.
This still needs work to clean it up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Drop interrupt support in 64-bit mode
Simon Glass [Mon, 16 Jan 2017 14:04:14 +0000 (07:04 -0700)]
x86: Drop interrupt support in 64-bit mode

This is not currently supported, so drop the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Don't try to boot Linux from SPL
Simon Glass [Mon, 16 Jan 2017 14:04:13 +0000 (07:04 -0700)]
x86: Don't try to boot Linux from SPL

Booting into linux from 64-bit U-Boot is not yet supported. Avoid bringing
in the bootm code until it is implemented.

Of course 32-bit U-Boot still supports booting into both 32- and 64-bit
kernels.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Don't build 32-bit efi files on x86_64
Simon Glass [Mon, 16 Jan 2017 14:04:12 +0000 (07:04 -0700)]
x86: Don't build 32-bit efi files on x86_64

These cannot be built in this mode, so drop them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Don't build cpu files which are not supported on 64-bit
Simon Glass [Mon, 16 Jan 2017 14:04:11 +0000 (07:04 -0700)]
x86: Don't build cpu files which are not supported on 64-bit

Some files cannot be built with 64-bit and mostly don't make sense in that
context. Disable them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Don't build call64 and setjmp on 64-bit
Simon Glass [Mon, 16 Jan 2017 14:04:10 +0000 (07:04 -0700)]
x86: Don't build call64 and setjmp on 64-bit

These are currently not supported. Calling 64-bit code from 64-bit U-Boot is
much simpler, so this code is not needed. setjmp() is not yet implemented for
64-bit.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Don't try to run the VGA BIOS in 64-bit mode
Simon Glass [Mon, 16 Jan 2017 14:04:09 +0000 (07:04 -0700)]
x86: Don't try to run the VGA BIOS in 64-bit mode

This is not supported, so disable it for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: ivybridge: Provide a dummy SDRAM init for 64-bit
Simon Glass [Mon, 16 Jan 2017 14:04:08 +0000 (07:04 -0700)]
x86: ivybridge: Provide a dummy SDRAM init for 64-bit

We don't support SDRAM init in 64-bit mode since it is essentially
impossible to get into that mode before SDRAM set up. Provide dummy functions
for now. At some point we will need to pass the SDRAM parameters through from
SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: ivybridge: Skip SATA init in SPL
Simon Glass [Mon, 16 Jan 2017 14:04:07 +0000 (07:04 -0700)]
x86: ivybridge: Skip SATA init in SPL

This doesn't work at present. Disable it for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Fix up type sizes for 64-bit
Simon Glass [Mon, 16 Jan 2017 14:04:06 +0000 (07:04 -0700)]
x86: Fix up type sizes for 64-bit

Adjust types as needed to support 64-bit compilation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Drop flag_is_changable() on x86_64
Simon Glass [Mon, 16 Jan 2017 14:04:05 +0000 (07:04 -0700)]
x86: Drop flag_is_changable() on x86_64

This doesn't build at present and is not used in a 64-bit build. Disable it
for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Fix up byteorder.h for x86_64
Simon Glass [Mon, 16 Jan 2017 14:04:04 +0000 (07:04 -0700)]
x86: Fix up byteorder.h for x86_64

Remove the very old x86 code and add support for 64-bit.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Add SPL build rules for start-up code
Simon Glass [Mon, 16 Jan 2017 14:04:03 +0000 (07:04 -0700)]
x86: Add SPL build rules for start-up code

When SPL is used we need to build the 16-bit start-up code. Add Makefile
rules to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Add a link script for SPL
Simon Glass [Mon, 16 Jan 2017 14:04:02 +0000 (07:04 -0700)]
x86: Add a link script for SPL

If SPL is used it is always build in 32-bit mode. Add a link script to
handle the correct placement of the sections.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Add a link script for 64-bit x86
Simon Glass [Mon, 16 Jan 2017 14:04:01 +0000 (07:04 -0700)]
x86: Add a link script for 64-bit x86

This needs a different image format from 32-bit x86, so add a new link
script.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Fix up CONFIG_X86_64 check
Simon Glass [Mon, 16 Jan 2017 14:04:00 +0000 (07:04 -0700)]
x86: Fix up CONFIG_X86_64 check

When SPL and U-Boot proper have different settings for this flag, we need to
use the correct one. Fix this up in the interrupt code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Support global_data on x86_64
Simon Glass [Mon, 16 Jan 2017 14:03:59 +0000 (07:03 -0700)]
x86: Support global_data on x86_64

At present this is just an ordinary variable. We may consider making it a
fixed register in the future.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Add cpu code for x86_64
Simon Glass [Mon, 16 Jan 2017 14:03:58 +0000 (07:03 -0700)]
x86: Add cpu code for x86_64

There is not much needed at present, but set up a separate directory to put
this code as it grows.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Move the i386 code into its own directory
Simon Glass [Mon, 16 Jan 2017 14:03:57 +0000 (07:03 -0700)]
x86: Move the i386 code into its own directory

Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it
into its own directory and build it only in 32-bit mode.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Add an SPL implementation
Simon Glass [Mon, 16 Jan 2017 14:03:56 +0000 (07:03 -0700)]
x86: Add an SPL implementation

SPL needs to set up the machine ready for loading 64-bit U-Boot and jumping
to it. Call the existing init routines in order to accomplish this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Tidy up use of size_t in relocation
Simon Glass [Mon, 16 Jan 2017 14:03:55 +0000 (07:03 -0700)]
x86: Tidy up use of size_t in relocation

Addresses should not be cast to size_t. Use uintptr_t instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Add support for 64-bit relocation
Simon Glass [Mon, 16 Jan 2017 14:03:54 +0000 (07:03 -0700)]
x86: Add support for 64-bit relocation

Add a 64-bit relocation function. SPL loads U-Boot into RAM at a fixed
address and runs it. U-Boot then relocates itself to the top of RAM using
this relocation function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Refactor relocation to prepare for 64-bit
Simon Glass [Mon, 16 Jan 2017 14:03:53 +0000 (07:03 -0700)]
x86: Refactor relocation to prepare for 64-bit

Move the core relocation code into a separate function so that the checking
code can be used for 64-bit relocation also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Do relocation before clearing BSS
Simon Glass [Mon, 16 Jan 2017 14:03:52 +0000 (07:03 -0700)]
x86: Do relocation before clearing BSS

The BSS region may overlap with relocations. If we clear BSS we will
overwrite the start of the relocation area. This doesn't matter when running
from SPI flash, since it is read-only. But when relocating 64-bit U-Boot
from one place in RAM to another, relocation will fail because some of its
relocations have been zeroed.

To fix this, put the ELF fixup call before the BSS clearing call.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: board_r: Set the global data pointer after relocation
Simon Glass [Mon, 16 Jan 2017 14:03:51 +0000 (07:03 -0700)]
x86: board_r: Set the global data pointer after relocation

Since 'gd' is just a normal variable on 64-bit x86, it is relocated by the
time we get to board_init_r(). The old 'gd' variable is passed in as
parameter to board_init_r(), presumably for this situation.

Assign it on 64-bit x86 so that gd points to the correct data.

Options to improve this:
- Make gd a fixed register and remove the board_init_r() parameter
- Make all archs use this board_init_r() parameter

The second has a TODO in the code. The first has a TODO in a future commit
('x86: Support global_data on x86_64')

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agoboard_f/r: Use static const for the init sequences
Simon Glass [Mon, 16 Jan 2017 14:03:50 +0000 (07:03 -0700)]
board_f/r: Use static const for the init sequences

These tables should be declared static const. Unfortunately the table in
board_r is updated on machines with manual relocation.

Update them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: board_f: Update init sequence for 64-bit startup
Simon Glass [Mon, 16 Jan 2017 14:03:49 +0000 (07:03 -0700)]
x86: board_f: Update init sequence for 64-bit startup

Adjust the code so that 64-bit startup works. Since we don't need to do CAR
changes in U-Boot proper anymore (they are done in SPL) we can simplify the
flow and return normally from board_init_f().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Add 64-bit start-up code
Simon Glass [Mon, 16 Jan 2017 14:03:48 +0000 (07:03 -0700)]
x86: Add 64-bit start-up code

Add code to start up U-Boot in 64-bit mode. It is fairly simple since we are
running from RAM and SPL has done the low-level init.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: ivybridge: Allow 32-bit init to move to SPL
Simon Glass [Mon, 16 Jan 2017 14:03:47 +0000 (07:03 -0700)]
x86: ivybridge: Allow 32-bit init to move to SPL

Update the Makefile so that some 32-bit init can be built into SPL rather
than U-Boot proper.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR
Simon Glass [Mon, 16 Jan 2017 14:03:46 +0000 (07:03 -0700)]
x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR

Use this new option to control the location of 32-bit init. This will allow
us to place this in SPL if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Use X86_16BIT_INIT instead of X86_RESET_VECTOR
Simon Glass [Mon, 16 Jan 2017 14:03:45 +0000 (07:03 -0700)]
x86: Use X86_16BIT_INIT instead of X86_RESET_VECTOR

Use this new option to control the location of 16-bit init. This will allow
us to place this in SPL if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Kconfig: Add location options for 16/32-bit init
Simon Glass [Mon, 16 Jan 2017 14:03:44 +0000 (07:03 -0700)]
x86: Kconfig: Add location options for 16/32-bit init

At present all 16/32-bit init is controlled by CONFIG_X86_RESET_VECTOR. If
this is enabled, then U-Boot is the 'first' boot loader and handles execution
from the reset vector through to U-Boot's command prompt. If it is not
enabled then U-Boot starts at the 32-bit entry and skips most of its init,
assuming that the previous boot loader has done this already.

With the move to suport 64-bit operation, we have more cases to consider.
The 16-bit and 32-bit init may be in SPL rather than in U-Boot proper.

Add Kconfig options which control the location of the 16-bit and the 32-bit
init. These are not intended to be user-setting except for experimentation.
Their values should be determined by whether 64-bit U-Boot is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Add Kconfig options to build 64-bit U-Boot
Simon Glass [Mon, 16 Jan 2017 14:03:43 +0000 (07:03 -0700)]
x86: Add Kconfig options to build 64-bit U-Boot

Add a new CONFIG_X86_64 option which will eventually cause U-Boot to be
built as a 64-bit application, with SPL doing the 16/32-bit init.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: lib: Fix types and casts for 64-bit compilation
Simon Glass [Mon, 16 Jan 2017 14:03:42 +0000 (07:03 -0700)]
x86: lib: Fix types and casts for 64-bit compilation

Fix various compiler warnings in the x86 library code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: fsp: Fix cast for 64-bit compilation
Simon Glass [Mon, 16 Jan 2017 14:03:41 +0000 (07:03 -0700)]
x86: fsp: Fix cast for 64-bit compilation

Fix a cast in get_next_hob() that causes warnings on 64-bit machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: dts: Mark serial as needed before relocation
Simon Glass [Mon, 16 Jan 2017 14:03:40 +0000 (07:03 -0700)]
x86: dts: Mark serial as needed before relocation

We almost always need the serial port before relocation, so mark it as such.
This will ensure that it appears in the device tree for SPL, if used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: ivybridge: Fix types for 64-bit compilation
Simon Glass [Mon, 16 Jan 2017 14:03:39 +0000 (07:03 -0700)]
x86: ivybridge: Fix types for 64-bit compilation

Fix a few types that causes warnings on 64-bit machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: ivybridge: Add more debugging for failures
Simon Glass [Mon, 16 Jan 2017 14:03:38 +0000 (07:03 -0700)]
x86: ivybridge: Add more debugging for failures

Add various debug() messages in places where errors occur. This aids with
debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: ivybridge: Declare global data where it is used
Simon Glass [Mon, 16 Jan 2017 14:03:37 +0000 (07:03 -0700)]
x86: ivybridge: Declare global data where it is used

Some files are missing this declaration. Add it to avoid build errors when
we actually need the declaration.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Update mpspec to build on 64-bit machines
Simon Glass [Mon, 16 Jan 2017 14:03:36 +0000 (07:03 -0700)]
x86: Update mpspec to build on 64-bit machines

At present this uses u32 to store an address. We should use unsigned long
and avoid special types in function return values and parameters unless
necessary. This makes the code more portable.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Use unsigned long for address in table generation
Simon Glass [Mon, 16 Jan 2017 14:03:35 +0000 (07:03 -0700)]
x86: Use unsigned long for address in table generation

We should use unsigned long rather than u32 for addresses. Update this so
that the table-generation code builds correctly on 64-bit machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agospl: Don't create a BSS padding when it is separate
Simon Glass [Mon, 16 Jan 2017 14:03:34 +0000 (07:03 -0700)]
spl: Don't create a BSS padding when it is separate

When BSS does not immediate follow the SPL image we don't need padding
before the device tree. Remove it in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agospl: Allow PCH drivers to be used in SPL
Simon Glass [Mon, 16 Jan 2017 14:03:33 +0000 (07:03 -0700)]
spl: Allow PCH drivers to be used in SPL

Add an option for building Platorm Controller Hub drivers in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agospl: Allow timer drivers to be used in SPL
Simon Glass [Mon, 16 Jan 2017 14:03:32 +0000 (07:03 -0700)]
spl: Allow timer drivers to be used in SPL

Add a new Kconfig option to allow timer drivers to be used in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agospl: Allow RTC drivers to be used in SPL
Simon Glass [Mon, 16 Jan 2017 14:03:31 +0000 (07:03 -0700)]
spl: Allow RTC drivers to be used in SPL

Add a new Kconfig option to allow RTC drivers to be used in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agospl: Allow PCI drivers to be used in SPL
Simon Glass [Mon, 16 Jan 2017 14:03:30 +0000 (07:03 -0700)]
spl: Allow PCI drivers to be used in SPL

Add a new Kconfig option to allow PCI drivers to be used in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agospl: Allow CPU drivers to be used in SPL
Simon Glass [Mon, 16 Jan 2017 14:03:29 +0000 (07:03 -0700)]
spl: Allow CPU drivers to be used in SPL

Add a new Kconfig option to allow CPU drivers to be used in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agospl: Makefile: Define SPL_ earlier
Simon Glass [Mon, 16 Jan 2017 14:03:28 +0000 (07:03 -0700)]
spl: Makefile: Define SPL_ earlier

This Makefile variable can be used in the architecture's main Makefile but
at present it is not set up until later. Set it just before this Makefile is
included.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agospl: spi: Add a debug message if loading fails
Simon Glass [Mon, 16 Jan 2017 14:03:27 +0000 (07:03 -0700)]
spl: spi: Add a debug message if loading fails

This currently fails silently. Add a debug message to aid debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agoconsole: Don't enable CONFIG-CONSOLE_MUX, etc. in SPL
Simon Glass [Mon, 16 Jan 2017 14:03:26 +0000 (07:03 -0700)]
console: Don't enable CONFIG-CONSOLE_MUX, etc. in SPL

CONFIG_CONSOLE_MUX and CONFIG_SYS_CONSOLE_IS_IN_ENV are not applicable
for SPL. Update the console code to use CONFIG_IS_ENABLED(), so that these
options will be inactive in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Synchronize list of x86 subarchitectures (update bootparam.h)
Andy Shevchenko [Sun, 8 Jan 2017 20:51:04 +0000 (23:51 +0300)]
x86: Synchronize list of x86 subarchitectures (update bootparam.h)

Basically rename X86_SUBARCH_MRST to X86_SUBARCH_INTEL_MID to be more specific.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Sat, 4 Feb 2017 01:33:42 +0000 (20:33 -0500)]
Merge git://git.denx.de/u-boot-fsl-qoriq

Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
configs/ls1046aqds_defconfig
configs/ls1046aqds_nand_defconfig
configs/ls1046aqds_qspi_defconfig
configs/ls1046aqds_sdcard_ifc_defconfig
configs/ls1046aqds_sdcard_qspi_defconfig
configs/ls1046ardb_emmc_defconfig
configs/ls1046ardb_qspi_defconfig
configs/ls1046ardb_sdcard_defconfig

7 years agoarch: powerpc: update the eLBC IP input clock
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:32:00 +0000 (15:02 +0530)]
arch: powerpc: update the eLBC IP input clock

eLBC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock ratio register (LCRR) used in
current implementation governs eLBC IP output cloc.

Update sys_info->freq_localbus to represent eLBC input clock with
value constant divisor of platform clock.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarch: powerpc: Move CONFIG_FSL_ELBC to Kconfig
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:31:48 +0000 (15:01 +0530)]
arch: powerpc: Move CONFIG_FSL_ELBC to Kconfig

Enable ELBC from Kconfig.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarch: arm: update the IFC IP input clock
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:31:37 +0000 (15:01 +0530)]
arch: arm: update the IFC IP input clock

IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock control register (CCR) used in
current implementation governs IFC IP output clock.

Update sys_info->freq_localbus to represent IFC input clock with
value constant divisor of platform clock.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarch: powerpc: update the IFC IP input clock
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:31:26 +0000 (15:01 +0530)]
arch: powerpc: update the IFC IP input clock

IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock control register (CCR) used in
current implementation governs IFC IP output clock.

Update sys_info->freq_localbus to represent IFC input clock with
value constant divisor of platform clock.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarch: powerpc: Move CONFIG_FSL_IFC to Kconfig
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:31:13 +0000 (15:01 +0530)]
arch: powerpc: Move CONFIG_FSL_IFC to Kconfig

Enable IFC from Kconfig.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1012a: Add support of PPA
Prabhakar Kushwaha [Mon, 30 Jan 2017 11:35:35 +0000 (17:05 +0530)]
armv8: ls1012a: Add support of PPA

The PPA implements PSCI which requires for power managment.

Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoboard: freescale: ls1012a: Enable secure DDR on LS1012A platforms
Prabhakar Kushwaha [Mon, 30 Jan 2017 11:35:22 +0000 (17:05 +0530)]
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms

PPA binary needs to be relocated on secure DDR, hence marking out
a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag
is set

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoMerge git://git.denx.de/u-boot-mpc85xx
Tom Rini [Wed, 1 Feb 2017 21:34:36 +0000 (16:34 -0500)]
Merge git://git.denx.de/u-boot-mpc85xx

7 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-imx
Tom Rini [Wed, 1 Feb 2017 21:34:25 +0000 (16:34 -0500)]
Merge branch 'master' of git://www.denx.de/git/u-boot-imx

7 years agopowerpc: mpc5200: Correct return value of memcpy function
Mark Marshall [Tue, 24 Jan 2017 12:47:31 +0000 (13:47 +0100)]
powerpc: mpc5200: Correct return value of memcpy function

The memcpy() function returns a pointer to trg.

Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at>
Reviewed-by: Thomas Graziadei <thomas.graziadei@omicronenergy.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoMerge git://www.denx.de/git/u-boot-marvell
Tom Rini [Wed, 1 Feb 2017 11:57:35 +0000 (06:57 -0500)]
Merge git://www.denx.de/git/u-boot-marvell

7 years agoarm: mvebu: Implement secure boot
Mario Six [Wed, 11 Jan 2017 15:01:00 +0000 (16:01 +0100)]
arm: mvebu: Implement secure boot

The patch implements secure booting for the mvebu architecture.

This includes:
- The addition of secure headers and all needed signatures and keys in
  mkimage
- Commands capable of writing the board's efuses to both write the
  needed cryptographic data and enable the secure booting mechanism
- The creation of convenience text files containing the necessary
  commands to write the efuses

The KAK and CSK keys are expected to reside in the files kwb_kak.key and
kwb_csk.key (OpenSSL 2048 bit private keys) in the top-level directory.

Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agotools: kwbimage: Refactor line parsing and fix error
Mario Six [Wed, 11 Jan 2017 15:00:59 +0000 (16:00 +0100)]
tools: kwbimage: Refactor line parsing and fix error

The function image_create_config_parse_oneline is pretty complex, and
since more parameters will be added to support secure booting, we
refactor the function to make it more readable.

Also, when a line contained just a keyword without any parameters,
strtok_r returned NULL, which was then indiscriminately fed into atoi,
causing a segfault. To correct this, we add a NULL check before feeding
the extracted token to atoi, and print an error message in case the
token is NULL.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agotools: kwbimage: Factor out add_binary_header_v1
Mario Six [Wed, 11 Jan 2017 15:00:58 +0000 (16:00 +0100)]
tools: kwbimage: Factor out add_binary_header_v1

In preparation of adding the creation of secure headers, we factor the
add_binary_header_v1 function out of the image_create_v1 function.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agotools: kwbimage: Remove unused parameter
Mario Six [Wed, 11 Jan 2017 15:00:57 +0000 (16:00 +0100)]
tools: kwbimage: Remove unused parameter

The parameter 'params' of the image_headersz_v1 function is never used
by the function.

Hence, remove it.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agotools: kwbimage: Reduce scope of variables
Mario Six [Wed, 11 Jan 2017 15:00:56 +0000 (16:00 +0100)]
tools: kwbimage: Reduce scope of variables

This patch reduces the scope of some variables.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agotools: kwbimage: Fix arithmetic with void pointers
Mario Six [Wed, 11 Jan 2017 15:00:55 +0000 (16:00 +0100)]
tools: kwbimage: Fix arithmetic with void pointers

Arithmetic with void pointers, e.g. a - b where both a and b are void
pointers, is undefined in the C standard. Since we are operating with
byte data here, we switch the void pointers to uint8_t pointers, and add
the necessary casts.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agotools: kwbimage: Fix style violations
Mario Six [Wed, 11 Jan 2017 15:00:54 +0000 (16:00 +0100)]
tools: kwbimage: Fix style violations

Fix some style violations:

- nine instances of missing blank lines after declarations
- one overly long line
- one split string (which also rewords an error message more concisely)
- two superfluous else

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agotools: kwbimage: Fix dest addr
Mario Six [Wed, 11 Jan 2017 15:00:53 +0000 (16:00 +0100)]
tools: kwbimage: Fix dest addr

To enable secure boot, we need to jump back into the BootROM to continue
the SoC's boot process instead of letting the SPL load and run the main
U-Boot image.

But, since the u-boot-spl.img (including the 64 byte header) is loaded
by the SoC as the main image, we need to compensate for the header
length to get a correct entry point.

Thus, we subtract the header size from the destination address, so that
the execution address points at the actual entry point of the image.

The current boards ignore both parameters anyway, so this change shouldn't
concern them.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agolib: tpm: Add command to flush resources
Mario Six [Wed, 11 Jan 2017 15:00:50 +0000 (16:00 +0100)]
lib: tpm: Add command to flush resources

This patch adds a function to the TPM library, which allows U-Boot to
flush resources, e.g. keys, from the TPM.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm: mvebu: spl.c: Remove useless gd declaration
Reinhard Pfau [Wed, 11 Jan 2017 15:00:48 +0000 (16:00 +0100)]
arm: mvebu: spl.c: Remove useless gd declaration

ddaa905 ("arm: mvebu: Add DM (driver model) support") removed the
assignment of the gd pointer, but kept the (now superfluous) declaration
of the gd pointer.

Remove this declaration.

Signed-off-by: Reinhard Pfau <pfau@gdsys.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agomvebu: Add board_pex_config()
Mario Six [Wed, 11 Jan 2017 15:00:47 +0000 (16:00 +0100)]
mvebu: Add board_pex_config()

Allow boards to do some initialization when PCIe comes up.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agonet: phy: Support Marvell 88E1680
Dirk Eibach [Wed, 11 Jan 2017 15:00:46 +0000 (16:00 +0100)]
net: phy: Support Marvell 88E1680

Add support for Marvell 88E1680 Integrated Octal
10/100/1000 Mbps Energy Efficient Ethernet Transceiver.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agopci: mvebu: Fix Armada 38x support
Dirk Eibach [Wed, 11 Jan 2017 15:00:45 +0000 (16:00 +0100)]
pci: mvebu: Fix Armada 38x support

Armada 38x has four PCI ports, not three.

The optimization in pci_init_board() seems to assume that every port has
three lanes. This is obviously wrong, and breaks support for Armada 38x.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agophy: comphy_a3700: Change SD/MMC compatible DT node to match the updates
Stefan Roese [Thu, 12 Jan 2017 15:37:49 +0000 (16:37 +0100)]
phy: comphy_a3700: Change SD/MMC compatible DT node to match the updates

Now that the SD/SDIO/MMC DT properties are updated in the Marvell
A3700 and A7/8k DT files, we need to match the checks for compatible
node in the PHY driver as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agopowerpc: mpc85xx: Use symbolic names for cache control bits
Mark Marshall [Tue, 24 Jan 2017 14:40:23 +0000 (15:40 +0100)]
powerpc: mpc85xx: Use symbolic names for cache control bits

We should use the symbolic names for the cache control bits.

Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at>
Reviewed-by: Thomas Graziadei <thomas.graziadei@omicronenergy.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: mpc83xx: Enable pre-relocation malloc
mario.six@gdsys.cc [Tue, 17 Jan 2017 07:33:48 +0000 (08:33 +0100)]
powerpc: mpc83xx: Enable pre-relocation malloc

To enable DM on MPC83xx, we need pre-relocation malloc, which is
implemented in this patch.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
[York S: Fixed compiling warning for unused variable 'i']
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: mpc83xx: Minimize r1 modification
mario.six@gdsys.cc [Tue, 17 Jan 2017 07:33:47 +0000 (08:33 +0100)]
powerpc: mpc83xx: Minimize r1 modification

The r1 register is modified several times during the cache-ram setup of
the MPC83xx SoCs.

Since this SP modification confuses debuggers, we use a general purpose
register to compute the new stack pointer value, and only set the SP
once after all computations are done.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1046a: Enable workaround for erratum A-008336
York Sun [Fri, 27 Jan 2017 17:57:31 +0000 (09:57 -0800)]
armv8: ls1046a: Enable workaround for erratum A-008336

Erratum A-008336 applies to LS1046A per latest SoC document.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
7 years agoarmv7: ls1021aqds: Set cpo_sample for erratum A-009942
York Sun [Wed, 25 Jan 2017 21:26:50 +0000 (13:26 -0800)]
armv7: ls1021aqds: Set cpo_sample for erratum A-009942

Set cpo_sample as suggested by the driver
"WARN: pls set popts->cpo_sample = 0x58 in <board>/ddr.c to optimize
cpo".

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
7 years agodrivers: net: fsl-mc: Fixup MAC addresses in DPC
Bogdan Purcareata [Wed, 11 Jan 2017 15:58:36 +0000 (15:58 +0000)]
drivers: net: fsl-mc: Fixup MAC addresses in DPC

Fixup port_mac_address property in MC DPC with values from the u-boot
environment. Since u-boot already reads the environment MAC addresses
when probing the PHYs, use these values.

The u-boot environment MAC addresses take precedence over any eventual
ones defined in the DPC, except for the case where they are randomly
assigned (no u-boot env value declared for port).

The patch assumes the "/board_info/ports/" node is present in the DPC.

Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[York S: Fix several indentations]
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agommc: atmel: rename CONFIG_ATMEL_SDHCI to CONFIG_MMC_SDHCI_ATMEL
Masahiro Yamada [Mon, 30 Jan 2017 10:46:55 +0000 (19:46 +0900)]
mmc: atmel: rename CONFIG_ATMEL_SDHCI to CONFIG_MMC_SDHCI_ATMEL

Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

While we are here, add "depends on ARCH_AT91".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agommc: pic32: rename CONFIG_PIC32_SDHCI to CONFIG_MMC_SDHCI_PIC32
Masahiro Yamada [Mon, 30 Jan 2017 10:46:54 +0000 (19:46 +0900)]
mmc: pic32: rename CONFIG_PIC32_SDHCI to CONFIG_MMC_SDHCI_PIC32

Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>