Heiko Schocher [Tue, 31 May 2011 20:24:07 +0000 (20:24 +0000)]
post, memory test: add memory_post_test() to include file
This include is needed, if this memory test is used "outside"
from post code, for example booting with nand_spl, and using
this memory test before copying u-boot code to RAM and jumping
to it.
Macpaul Lin [Sun, 24 Apr 2011 22:01:38 +0000 (22:01 +0000)]
andes_spi: add andes_spi interface
andes_spi is an spi interface developed by Andes Tech.
Signed-off-by: Macpaul Lin <macpaul@andestech.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 2 Jun 2011 05:19:38 +0000 (05:19 +0000)]
net: designware: fix uninitialized phy_addr usage
When CONFIG_DW_SEARCH_PHY is disabled, the local phy_addr variable
never gets initialized which causes random behavior at runtime and a
gcc warning. So set it by default to the stored phy address.
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Fix commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
Becky Bruce [Mon, 18 Jul 2011 23:49:16 +0000 (18:49 -0500)]
board/tqm85xx: Create and tear down TLB for get_ram_size()
We need a TLB entry to call get_ram_size(); the common code doesn't create
one until *after* fixed_sdram() has determined the size. So we set up tlbs
for the max possible size and tear them down once we're done with
get_ram_size(); the common 85xx code will then set up a final set of tlb
entries for the *actual* detected size of ddr.
This prevents us from having TLB entries that are larger than DDR sitting
around for very long, which is not a recommended scenario.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Becky Bruce [Mon, 18 Jul 2011 23:49:15 +0000 (18:49 -0500)]
powerpc/mpc85xx: Add clear_ddr_tlbs function
This is useful when we just want to wipe out the TLBs. There's currently
a function that resets the ddr tlbs to a different value; it is changed to
utilize this function. The new function can be used in conjunction with
setup_ddr_tlbs() for a board to temporarily map/unmap the DDR address
range as needed.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Tue, 3 May 2011 18:35:11 +0000 (13:35 -0500)]
fman: insert the Fman firmware into the device tree
The Fman device tree node binding allows for the entire Fman firmware binary
data to be embedded in the device tree. This eliminates the need to have
NOR flash mapped to Linux just so that the Fman driver can see the firmware.
The location of the Fman firmware is taken from the 'fman_ucode' environment
variable.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Tue, 10 May 2011 20:28:14 +0000 (15:28 -0500)]
powerpc/85xx: add support the ePAPR "phandle" property
The ePAPR specification says that phandle properties should be called
"phandle", and not "linux,phandle". To facilitate the migration from
"linux,phandle" to "phandle", we update fdt_qportal() to use the new
function, fdt_create_phandle(). This function abstracts the creation of
phandle properties.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Wolfgang Denk [Tue, 19 Jul 2011 20:27:07 +0000 (22:27 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc
* 'master' of git://git.denx.de/u-boot-mmc:
mmc: rescan fails on empty slot
AT91:mmc:fix multiple read/write error
mmc: Access mode validation for eMMC cards > 2 GiB
mmc: sh_mmcif: add support for Renesas MMCIF
mmc: fix the condition for MMC version 4
MMC: add marvell sdhci driver
MMC: add sdhci generic framework
MMC: add erase function to both mmc and sd
MMC: unify mmc read and write operation
mmc: Tegra2: Enable SD/MMC driver for Seaboard and Harmony
mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3
Wolfgang Denk [Mon, 18 Jul 2011 19:04:56 +0000 (21:04 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
ARM: MX5: Fix broken leftover TO-2 errata workaround
MX31: Cleanup clock function
scb9328: Add ARM relocation support
am3517evm: change console device from ttyS2 to ttyO2
Remove volatile qualifier in get_ram_size() calls
TI: TNETV107X Fix Build Error
ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7
arm: add CONFIG_MACH_TYPE setting and documentation
arm: add __ilog2 function
Timer: Fix misuse of ARM *timer_masked() functions outside arch/arm
EfikaMX: Enable EXT2 booting
EfikaMX: Add missing CONFIG_SYS_TEXT_BASE
EfikaMX: Use correct imximage.cfg
MX27: Update to autogenerated asm-offsets.h
MX5: Update to autogenerated asm-offsets.h
imx: Add support for zmx25 board
imx: Make imx25 compatible to mxc_gpio driver and fix in tx25
imx: Add auto generation of asm-offsets.h for imx25
imx: Add support for USB EHCI on imx25
imx: Use correct imx25 reset.c
imx: Add get_tbclk() function for imx25
ARM: Update maintainer of board scb9328
mx27: Make the UART port number explicit
build: Add targets for auto gen of asm-offsets.h and use it in imx35
mx31pdk: cosmetic: Fix line over 80 characters
This patch fixes compiler errors due to missing definitions of
CONFIG_SYS_SDRAM_BASE and CONFIG_SYS_INIT_SP_ADDR.
It also does some cleanup: CONFIG_SYS_TEXT_BASE was moved to scb9328.h,
obsolete config.mk was removed. The scb9328 board has 1 DRAM bank, so don't
ask for more banks. CONFIG_NR_DRAM_BANKS will ever be 1.
am3517evm: change console device from ttyS2 to ttyO2
the serial device names have been changed from ttySx to ttyOx, so the
console device name should be also changed to support the latest kernel
versions.
Mingkai Hu [Thu, 7 Jul 2011 04:29:15 +0000 (12:29 +0800)]
powerpc/p2041rdb: Add p2041rdb board support
P2041RDB Specification:
-----------------------
Memory subsystem:
* 4Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
* 128 Mbyte NOR flash single-chip memory
* 256 Kbit M24256 I2C EEPROM
* 16 Mbyte SPI memory
* SD connector to interface with the SD memory card
Ethernet:
* dTSEC1: connected to the Vitesse SGMII PHY (VSC8221)
* dTSEC2: connected to the Vitesse SGMII PHY (VSC8221)
* dTSEC3: connected to the Vitesse SGMII PHY (VSC8221)
* dTSEC4: connected to the Vitesse RGMII PHY (VSC8641)
* dTSEC5: connected to the Vitesse RGMII PHY (VSC8641)
PCIe:
* Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1
* Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2
SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors
USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces
I2C:
* I2C1: Real time clock, Temperature sensor, Memory module
* I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM, PCIe slot1/2
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Albert ARIBAUD [Sun, 3 Jul 2011 05:55:33 +0000 (05:55 +0000)]
Remove volatile qualifier in get_ram_size() calls
Checkpatch.pl complains about the volatile qualifier in calls to
get_ram_size(). Remove this qualifier in the prototype and in the
calls where it is useless, and leave it only in the function body
where it is needed.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Igor Grinberg [Thu, 14 Jul 2011 05:45:07 +0000 (05:45 +0000)]
arm: add CONFIG_MACH_TYPE setting and documentation
CONFIG_MACH_TYPE is used to set the machine type number in the
common arm code instead of setting it in the board code.
Boards with dynamically discoverable machine types can still set the
machine type number in the board code.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
David A. Long [Sat, 9 Jul 2011 20:40:19 +0000 (16:40 -0400)]
Add uboot "fdt_high" enviroment variable
Add a new "fdt_high" enviroment variable. This can be used to control (or prevent) the
relocation of the flattened device tree on boot. It can be used to prevent relocation
of the fdt into highmem. The variable behaves similarly to the existing "initrd_high"
variable.
Signed-off-by: David A. Long <dave.long@linaro.org>
mmc: Access mode validation for eMMC cards > 2 GiB
This patch provides handling of the two way handshake when SEND_OP_COND
(CMD1) is send to mmc card. It is necessary to inform eMMC card if the
host can work with high capacity cards (Jedec JESD84-A441, point 7.4.3).
The extra flag MMC_MODE_HC (high capacity) is added to indicate if the
host is capable of handling the high capacity eMMC cards.
Since this change is added to the generic mmc framework, then it requires
other boards to indicate if their mmc controllers can handle high capacity
cards. As it is now - the old behaviour of the framework is preserved.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Fix the problem that if we use the chip of MMC version 4 and
the capacity is smaller than 2GB or equal, the mmc->capacity is
invalid. According to the JEDEC Standard, the value of ext_csd's
capacity is valid if the value is more than 2GB.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Andy Fleming <afleming@freescale.com>
Lei Wen [Tue, 28 Jun 2011 21:50:07 +0000 (21:50 +0000)]
MMC: add marvell sdhci driver
This could support both armada100 and pantheon serial in the mainline,
while this driver also be tested to support upcoming mg, mmp2 and mmp3
hardware.
Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Andy Fleming <afleming@freescale.com>
Lei Wen [Tue, 28 Jun 2011 21:50:06 +0000 (21:50 +0000)]
MMC: add sdhci generic framework
Nowdays, there are plenty of mmc driver in uboot adopt the sd standard
host design, aka as sdhci. It is better to centralize the common logic
together to better maintenance.
Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Andy Fleming <afleming@freescale.com>
Lei Wen [Wed, 22 Jun 2011 17:03:31 +0000 (17:03 +0000)]
MMC: add erase function to both mmc and sd
Erase is a very basic function since the begin of sd specification is
announced. Although we could write a bulk of full 0xff memory to the
range to take place of erase, it is more convenient and safe to
implement the erase function itself.
Signed-off-by: Lei Wen <leiwen@marvell.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
The ePAPR specification says that phandle properties should be called
"phandle", and not "linux,phandle". To facilitate the migration from
"linux,phandle" to "phandle", introduce function fdt_create_phandle(),
which creates a phandle in a given node. For now, we create both the
"phandle" and "linux,phandle" properties. A later version of this
function will remove support for "linux,phandle".
Timur Tabi [Tue, 3 May 2011 18:24:07 +0000 (13:24 -0500)]
fdt: introduce fdt_verify_alias_address() and fdt_get_base_address()
Introduce two functions, fdt_verify_alias_address() and
fdt_get_base_address(), which can be used to verify the physical address
of a device in a device tree.
fdt_get_base_address() returns the base address of an SOC or PCI node.
fdt_verify_alias_address() prints a message if the address of a node
specified by an alias does not match the given physical address.
David Gibson [Tue, 9 Mar 2010 06:39:14 +0000 (17:39 +1100)]
libfdt: Implement property iteration functions
For ages, we've been talking about adding functions to libfdt to allow
iteration through properties. So, finally, here are some.
I got bogged down on this for a long time because I didn't want to
expose offsets directly to properties to the callers. But without
that, attempting to make reasonable iteration functions just became
horrible. So eventually, I settled on an interface which does now
expose property offsets. fdt_first_property_offset() and
fdt_next_property_offset() are used to step through the offsets of the
properties starting from a particularly node offset. The details of
the property at each offset can then be retrieved with either
fdt_get_property_by_offset() or fdt_getprop_by_offset() which have
interfaces similar to fdt_get_property() and fdt_getprop()
respectively.
No explicit testcases are included, but we do use the new functions to
reimplement the existing fdt_get_property() function.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This was extracted from the DTC commit: 73dca9ae0b9abe6924ba640164ecce9f8df69c5a Mon Sep 17 00:00:00 2001
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
David Gibson [Thu, 26 Nov 2009 04:37:13 +0000 (15:37 +1100)]
Support ePAPR compliant phandle properties
Currently, the Linux kernel, libfdt and dtc, when using flattened
device trees encode a node's phandle into a property named
"linux,phandle". The ePAPR specification, however - aiming as it is
to not be a Linux specific spec - requires that phandles be encoded in
a property named simply "phandle".
This patch adds support for this newer approach to dtc and libfdt.
Specifically:
- fdt_get_phandle() will now return the correct phandle if it
is supplied in either of these properties
- fdt_node_offset_by_phandle() will correctly find a node with
the given phandle encoded in either property.
- By default, when auto-generating phandles, dtc will encode
it into both properties for maximum compatibility. A new -H
option allows either only old-style or only new-style
properties to be generated.
- If phandle properties are explicitly supplied in the dts
file, dtc will not auto-generate ones in the alternate format.
- If both properties are supplied, dtc will check that they
have the same value.
- Some existing testcases are updated to use a mix of old and
new-style phandles, partially testing the changes.
- A new phandle_format test further tests the libfdt support,
and the -H option.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This was extracted from the DTC commit: d75b33af676d0beac8398651a7f09037555a550b Mon Sep 17 00:00:00 2001
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
York Sun [Thu, 30 Jun 2011 18:00:56 +0000 (11:00 -0700)]
powerpc/corenet_ds: add back buffer write for NOR flash
Enable buffer write for better performance. This platform uses a NOR flash
chip which supports write buffer programming. CFI driver can query the
buffer size and use it to program the flash for best performance.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some P4080 rev1 errata work-arounds, notably erratum SERDES4, required a
bank soft-reset after the bank was configured and enabled, even though
enabling a bank causes it to reset. Because the reset was required for
multiple errata, it was not properly enclosed in an #ifdef, and so was
not removed with all the other rev1 errata work-arounds.
Erratum SERDES-8 says that the clocks for bank 3 needs to be enabled if
bank 2 is enabled, but this was not being done for SERDES protocols 0xF
and 0x10. The bank reset also happened to enable bank 3 (apparently an
undocumented feature). Simply removing the reset breaks these two
protocols.
It turns out that every time we call enable_bank(), we do want at least
one lane of the bank enabled, either because the bank is supposed to be
enabled, or because we need the clock from that bank enabled.
For erratum SERDES-A001, we don't want to modify srds_lpd_b[] when we
call enable_bank(), because that array is used elsewhere to determine if
the bank is available.
Note that the side effect of these changes is that the work-arounds for
these two errata are now linked. Specifically, if SERDES-A001 is
enabled, then we need SERDES-8 enabled as well.
Because this was the only SERDES bank soft-reset, there is no need to
implement a work-around for erratum SERDES-A003.
Also fix an off-by-one error in a printf().
Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Ed Swarthout <swarthou@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Ramneek Mehresh [Thu, 12 May 2011 14:00:36 +0000 (19:30 +0530)]
qoriq/p1_p2_rdb: USB device-tree fixups for P1020
Resolve P1020 second USB controller multiplexing with eLBC
- mandatory to mention USB2 in hwconfig string to select it
over eLBC, otherwise USB2 node is removed
- works only for SPI and SD boot
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Ramneek Mehresh [Wed, 8 Jun 2011 11:44:20 +0000 (17:14 +0530)]
powerpc/8xxx: Update USB mode device tree fixup
Modify support for USB mode fixup:
- Add common support for USB mode and phy type
device tree fix-up for all USB controllers
mentioned in hwconfig string
- Fetch USB mode and phy type via hwconfig; if not
defined in hwconfig, then fetch them from env
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Roy Zang [Thu, 9 Jun 2011 03:30:52 +0000 (11:30 +0800)]
powerpc/85xx: Add basic support for P1023RDS board
The P1023RDS board is the reference board for the P1023 SoC.
Add support for booting it from NOR or NAND, with fixed 2G of DDR, PCIe,
UART, I2C, etc.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
York Sun [Mon, 27 Jun 2011 20:35:25 +0000 (13:35 -0700)]
powerpc/mpc8xxx: fix DDR data width checking
Checking width before setting DDR controller. SPD for DDR1 and DDR2 has
data width and primary sdram width. The latter one has different meaning
for DDR3.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
York Sun [Tue, 7 Jun 2011 01:42:16 +0000 (09:42 +0800)]
powerpc/mpc8xxx: Enable calculation for fixed DDR chips
We used to have fixed parameters for soldered DDR chips. This patch
introduces CONFIG_SYS_DDR_RAW_TIMING to enable calculation based on timing
data from DDR chip datasheet, implemneted in board-specific files or header
files.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Felix Radensky [Mon, 27 Jun 2011 06:39:29 +0000 (09:39 +0300)]
powerpc/85xx: Fix pin muxing for second USB controller
On P1022/P1013 second USB controller is muxed with second
Ethernet controller. The current code to enable second USB
fails to properly clear pinmux bits used by ethernet. As a
result, Linux freezes when this controller is used. This
patch fixes the problem.
Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 19 May 2011 21:15:11 +0000 (16:15 -0500)]
powerpc/85xx: Fix compile errors if CONFIG_SYS_DPAA_QBMAN isn't set
Add ifdef protection for qp_info and liodn associated with Q/BMan. Also
rearrange setting of _tbl_sz variables to utilize existing ifdef
protection for things like FMAN.
Also add protection around setup_portals() call in corenet_ds board
code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Bill Cook [Wed, 25 May 2011 19:51:07 +0000 (15:51 -0400)]
MPC83XX: Fix PCI express clock setup
On a 8308 based board it was found that the PEX_GLK_RATIO register
(programmed in arch/powerpc/cpu/mpc83xx/pcie.c) was getting set to 0, This
was tracked to the fact that the pci express clock frequency was not being
assigned to the pciexp1_clk entry in the global data structure in file
arch/powerpc/cpu/mpc83xx/speed.c. Fix this and a similiar issue in
'do_clocks' command.
Signed-off-by: Bill Cook <cook@isgchips.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Andre Schwarz [Thu, 14 Apr 2011 12:54:05 +0000 (14:54 +0200)]
MPC83xx: add config options for memory setup.
CPO value and driver strength settings are board specifc.
Also allow SPD data fetch from any accessible I2C EEPROM.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Acked-by: York Sun <yorksun@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Ira W. Snyder [Tue, 1 Mar 2011 22:40:55 +0000 (14:40 -0800)]
fsl_dma: fix support for 83xx DMA engine
Commit 359ec4931944adb885882deb9b781e4095eabc94 broke support for the
Freescale DMA engine on the 83xx parts. This is due to using registers
which do not exist on 83xx. Remove the attribute register accesses from
the 83xx build.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Cc: York Sun <yorksun@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Simon Guinot [Fri, 17 Jun 2011 14:11:33 +0000 (19:41 +0530)]
Add support for Network Space v2 and parents
This patch add support for the Network Space v2 board and parents, based
on the Marvell Kirkwood 6281 SoC. This include Network Space (Max) v2
and Internet Space v2.
Additional information is available at:
http://lacie-nas.org/doku.php?id=network_space_v2
This adds support for the keymile Kirkwood BEC portl2 board. This board
relies on the km_arm (km_kirkwood) BEC.
The egiga driver is configured for a 100M full-duplex, A/N off connnection
to the backplane. This board has always ethernet present, because it is
connected to the marvell switch similar to mgcoge3un. The reset_phy
functionality is also the same to mgcoge3un.
Holger Brunck [Thu, 16 Jun 2011 12:41:15 +0000 (18:11 +0530)]
arm/km: replace suenx targets with km_kirkwood
suen3 and suen8 were in first HW version quite different, but
now they are from a u-boot point of view similar. So these
two boards can use the same header file. Other keymile boards
differ only in the usage of the PCI interface. Therefore
a target km_kirkwood_pci was introduced. All targets use
the same header file.
arm/km: use board KM_ENV_BUS for CONFIG_I2C_ENV_EEPROM_BUS
This is defined for all km_kirkwood boards and was not used up to now.
This value was the same for all boards but it could be changed for some
boards (and thus needs to be defined for every board).
projects / u-boot / log