CPU: Freescale i.MX6SOLO rev1.3 at 792MHz
CPU: Industrial temperature grade (-40C to 105C) at 31C
Reset cause: POR
DRAM: 256 MiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc0 is current device
switch to partitions #0, OK
mmc0 is current device
reading boot.scr
** Unable to read file boot.scr **
reading zImage 6741808 bytes read in 341 ms (18.9 MiB/s)
Booting from mmc ...
reading imx6dl-icore.dtb
30600 bytes read in 19 ms (1.5 MiB/s)
Booting using the fdt blob at 0x18000000
Using Device Tree in place at 18000000, end 1800a787
Starting kernel ...
[ 0.000000] Booting Linux on physical CPU 0x0
Boot Log for i.CoreM6 Quad/Dual Starter Kit:
--------------------------------------------
CPU: Freescale i.MX6Q rev1.2 at 792MHz
CPU: Industrial temperature grade (-40C to 105C) at 28C
Reset cause: POR
DRAM: 512 MiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot: 0
icorem6qdl>
Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Sat, 8 Oct 2016 12:30:10 +0000 (18:00 +0530)]
config: Move CONFIG_DEFAULT_FDT_FILE to defconfigs
- Add DEFAULT_FDT_FILE kconfig entry
- Move CONFIG_DEFAULT_FDT_FILE from include/configs to defconfigs
Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Peng Fan [Tue, 11 Oct 2016 06:29:11 +0000 (14:29 +0800)]
imx: mx7: Add plugin support
Add mx7_plugin.S which calls boot rom setup function, generate the second ivt,
and jump back to boot rom.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
Peng Fan [Tue, 11 Oct 2016 06:29:10 +0000 (14:29 +0800)]
imx: mx6: Add plugin support
Add mx6_plugin.S which calls boot rom setup function, generate the second ivt,
and jump back to boot rom.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Peng Fan [Tue, 11 Oct 2016 06:29:09 +0000 (14:29 +0800)]
tools: imximage: add plugin support
Add plugin support for imximage.
Define CONFIG_USE_IMXIMG_PLUGIN in defconfig to enable using plugin.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Nelson <eric@nelint.com> Cc: Ye Li <ye.li@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Diego Dorta [Tue, 11 Oct 2016 14:09:28 +0000 (11:09 -0300)]
mx6sabresd: Add README file
Add a README to explain the steps for booting mx6sabresd in different ways:
1. Booting via Normal U-Boot (u-boot.imx)
2. Booting via SPL (SPL and u-boot.img)
3. Booting via Falcon mode (SPL launches the kernel directly)
Gary Bisson [Thu, 25 Aug 2016 17:03:20 +0000 (19:03 +0200)]
nitrogen6x: add secure boot support
Declaring a CSF section makes the imximage tool increase the size of
data to be loaded by the BootROM and also adds a pointer to that CSF
section in the IVT header to the BootROM can check the signature.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Peng Fan [Thu, 25 Aug 2016 17:03:17 +0000 (19:03 +0200)]
arm: imx-common: introduce back usec2ticks
This commit "2bb014820c49a63902103bac710bc86b5772e843"
do some clean up to use the code in lib/time.c.
But usec2ticks is still being used by security related job ring code.
Bring back the function to avoid build break when CONFIG_FSL_CAAM
is defined.
The computation logic has been changed, using 64-bit variable
to ease the process, making it work on older (MX5) platforms.
Signed-off-by: Peng Fan <van.freenix@gmail.com> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Jon Master reports that QEMU refuses to load a U-Boot image built
with CONFIG_ARMV7_NONSEC, but without CONFIG_ARMV7_PSCI since
commit 5a3aae68c74e ("ARM: armv7: guard memory reserve for PSCI
with #ifdef CONFIG_ARMV7_PSCI").
It looks like only PSCI that needs the Secure stack, so move
the #ifdef to guard the whole of .secure_stack allocation in order
not to create the empty section.
Simon Glass [Sun, 2 Oct 2016 23:59:27 +0000 (17:59 -0600)]
libfdt: Sync up with upstream
This includes small changes to the following functions, from upstream
commit 6d1832c:
- fdt_get_max_phandle() (upstream commit 84e0e134)
- fdt_node_check_compatible (upstream commit 53bf130b)
- fdt_setprop_inplace_namelen_partial() to remove useless brackets and
use idx instead of index
- _fdt_resize_property() to use idx instead of index
- _fdt_splice() (upstream commit d4c7c25c)
David Gibson [Sun, 2 Oct 2016 23:59:26 +0000 (17:59 -0600)]
libfdt: Fix undefined behaviour in fdt_offset_ptr()
Using pointer arithmetic to generate a pointer outside a known object is,
technically, undefined behaviour in C. Unfortunately, we were using that
in fdt_offset_ptr() to detect overflows.
To fix this we need to do our bounds / overflow checking on the offsets
before constructing pointers from them.
Reported-by: David Binderman <dcb314@hotmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Simon Glass <sjg@chromium.org>
Hannes Schmelzer [Tue, 20 Sep 2016 16:10:43 +0000 (18:10 +0200)]
cmd/fdt: add possibilty to have 'extrasize' on fdt resize
Sometimes devicetree nodes and or properties are added out of the u-boot
console, maybe through some script or manual interaction.
The devicetree as loaded or embedded is quite small, so the devicetree
has to be resized to take up those new nodes/properties.
In original the devicetree was only extended by effective
4 * add_mem_rsv.
With this commit we can add an argument to the "fdt resize" command,
which takes the extrasize to be added.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com> Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Acked-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Thu, 15 Sep 2016 18:53:22 +0000 (12:53 -0600)]
net: smsc95xx: fix DM MAC address reading
eth-uclass.c expects DM-capable Ethernet adapters to implement ops->
read_rom_hwaddr(), or for some other mechanism to set pdata->enetaddr, or
for the user to set environment variable $usbethaddr. Without any of
these, it will refuse to initialize the device since no valid MAC address
is known. Implement this function for the smsc95xx driver.
With this feature implemented, there is no point smsc95xx_init_common()
re-reading the MAC address from ROM, so ifdef out this code when DM_ETH
is enabled.
This allows (at least) the built-in Ethernet on the NVIDIA Harmony board
to operate again.
Fixes: 0990fcb77219 ("net: smsc95xx: Add driver-model support") Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add a NFS download test, based on TFTP test.
Tested on i.MX6 SabreLite board.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Tom Rini <trini@konsulko.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Peter Chubb [Wed, 14 Sep 2016 03:49:22 +0000 (03:49 +0000)]
net: Fix cache misalignment message after network load operations
After any operation that downloads a file (e.g., pxe get, or dhcp), the
buffer containing the downloaded data is flushed. This is unnecessary
and annoying. Unnecessary, because
the network driver should already have fliushed the cache for the DMAed area,
and annoying because it generates a cache misalignment message.
Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Peter Chubb [Wed, 14 Sep 2016 01:29:03 +0000 (01:29 +0000)]
rtl8169: fix cache misalignment message on transmit.
The call to flush cache on the transmit buffer was misplaced (for very
short packets) and asked to flush less than a cacheline.
Move the flush cache call to after a short packet has been padded
to minimum length (so the padding is flushed too), and round the size
up to a cacheline.
Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Chris Packham [Fri, 26 Aug 2016 05:30:26 +0000 (17:30 +1200)]
net: mv88e61xx: Add support for fixed links
On some boards these switches are wired directly into a SERDES
interface on another Ethernet MAC. Add the ability to specify
these kinds of boards using CONFIG_MV88E61XX_FIXED_PORTS which defines
a bit mask of these fixed ports.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Chris Packham [Fri, 26 Aug 2016 05:30:25 +0000 (17:30 +1200)]
net: Add support for mv88e609x switches
The Marvell Link Street mv88e60xx is a series of FastEthernet switch
chips, some of which also support Gigabit ports. It is similar to the
mv88e61xx series which support Gigabit on all ports.
The main difference is the number of ports. Which affects the
PORT_COUNT define and the size of the mask passed to
mv88e61xx_port_set_vlan().
Other than that it's just a matter of adding the appropriate chip
IDs.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Cc: Joshua Scott <joshua.scott@alliedtelesis.co.nz> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Roger Quadros [Wed, 24 Aug 2016 12:35:51 +0000 (15:35 +0300)]
board: am335x: Always set eth/eth1addr environment variable
Ethernet ports might be used in the kernel even if CPSW driver
is disabled at u-boot. So always set ethaddr and eth1addr
environment variable from efuse.
Retain usbnet_devaddr as it is required for SPL USB eth boot.
Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Both ethernet ports can be used as CPSW ethernet (RMII mode)
or PRU ethernet (MII mode) by setting the jumper near the port.
Read the jumper value and set the pinmux, external mux and
PHY clock accordingly.
As jumper line is overridden by PHY RX_DV pin immediately
after bootstrap (power-up/reset), we have to use GPIO edge
detection to capture the jumper line status.
As u-boot doesn't provide any infrastructure for GPIO edge
detection, we directly access the GPIO registers.
Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 13 Oct 2016 14:03:38 +0000 (19:33 +0530)]
driver: net: cpsw: add support for RGMII id mode support and RMII clock source selection
cpsw driver supports only selection of phy mode in control module
but control module has more setting like RGMII ID mode selection,
RMII clock source selection. So ported to cpsw-phy-sel driver
from kernel to u-boot.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 13 Oct 2016 14:03:37 +0000 (19:33 +0530)]
include: configs: am335x: add Atheros phy support
In AM335x GP EVM, Atheros 8031 phy is used, enable the driver as
AM335x SoC RGMII delay mode has to be enabled in phy as mentioned
in the silicon errata Advisory 1.0.10
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 13 Oct 2016 14:03:36 +0000 (19:33 +0530)]
drivers: net: phy: atheros: add separate config for AR8031
In the current driver implementation, config() callback is common
for AR8035 and AR8031 phy. In config() callback, driver tries to
configure MMD Access Control Register and MMD Access Address Data
Register unconditionally for both phy versions which leads to
auto negotiation failure in AM335x EVMsk second port which uses
AR8031 Giga bit RGMII phy. Fixing this by adding separate config
for AR8031 phy.
Reviewed-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Andrea Merello [Thu, 26 May 2016 16:24:28 +0000 (18:24 +0200)]
phy: atheros: add support for RGMII_ID, RGMII_TXID and RGMII_RXID
This adds support for internal delay on RX and TX on RGMII interface for the
AR8035 phy.
This is basically the same Linux driver do. Tested on a Zynq Zturn board (for
which u-boot support in is my tree; first patch waiting ML approval)
Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Bin Meng [Sun, 9 Oct 2016 11:14:17 +0000 (04:14 -0700)]
dm: video: Don't do anything in alloc_fb() when plat->size is zero
With DM VESA driver on x86 boards, plat->base/size/align are all
zeroes and starting address passed to alloc_fb() happens to be 1MB
aligned, so this routine does not trigger any issue. On QEMU with
U-Boot as coreboot payload, the starting address is within 1MB
range (eg: 0x7fb0000), thus causes failure in video_post_bind().
Actually if plat->size is zero, it makes no sense to do anything
in this routine. Add such check there.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 9 Oct 2016 11:14:13 +0000 (04:14 -0700)]
x86: Convert to use DM VESA video driver
At present only chromebook boards are converted to DM video. Other
x86 boards are still using the legacy cfb_console driver. This
switches to use DM version drivers.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 9 Oct 2016 11:14:10 +0000 (04:14 -0700)]
x86: doc: Document coreboot framebuffer driver issue on QEMU
For some unknown reason, coreboot framebuffer driver never works on
QEMU since day 1. It seems the driver only works on real hardware.
Document this issue.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stefan Brüns [Tue, 4 Oct 2016 19:46:35 +0000 (21:46 +0200)]
sandbox/fs: Set correct filetype for unknown filetype
The "hostfs ls" command prefixes each directory entry with either DIR,
LNK or " " if it is a directory, symlink resp. regular file, or
"???" for any other or unknown type.
The latter only works if the type is set correctly, as the entry defaults
to OS_FILET_REG and e.g. socket files show up as regular files.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org>
Stefan Brüns [Sat, 1 Oct 2016 18:41:40 +0000 (20:41 +0200)]
sandbox/fs: Use correct size path name buffer
The readdir linux manpage explicitly states (quoting POSIX.1) that
sizeof(d_name) is not correct for determining the required size, but to
always use strlen. Grow the buffer if needed.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org>
Stefan Brüns [Sat, 1 Oct 2016 18:41:39 +0000 (20:41 +0200)]
sandbox/fs: Make linking of nodes in os_dirent_ls more obvious
Previously, after reading/creating the second dirent, the second entry
would be chained to the first entry and the first entry would be linked
to head. Instead, immediately link the first entry to head.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org>
power: regulator: Add ctrl_reg and volt_reg fields for pmic
The ctrl reg contains bit fields to enable and disable regulators,
and volt_reg has the bit fields to configure the voltage values.
The registers are frequently accessed hence make them part
of dm_regulator_uclass_platdata structure.
Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for gpio regulators. As of now this driver caters
to gpio regulators with one gpio. Supports setting voltage values to gpio
regulators and retrieving the values.
Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 26 Sep 2016 03:33:31 +0000 (21:33 -0600)]
x86: Don't export interrupt handlers with x86_64
We don't have a way of adjusting these at present so it is best to refuse to
export these functions. This can be implemented later if the API is required.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
projects / u-boot / log