Jeffrey Mann [Wed, 16 May 2007 11:23:10 +0000 (13:23 +0200)]
[PATCH] Run new sequoia boards with an EBC speed of 83MHz
Because the Sequoia board does not boot with an EBC faster than 66MHz,
the clock divider are changed after the initial boot process.
This allows for maximum clocking speeds to be achieved on newer boards.
Sequoia boards with 666.66 MHz processors require that the EBC divider
be set to 3 in order to start the initial boot process at a slower EBC
speed. After the initial boot process, the divider can be set back to 2,
which will cause the boards to run at 83.333MHz. This is backward
compatible with boards with 533.33 MHz processors, as these boards will
already be set with an EBC divider of 2.
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
[MPC5xxx] There are networking problems on the Motion-PRO board with
current PHY initalization code (tftp timeouts all the time). This commit
temporarily disables PHY initalization sequence to make the networking
operational, until a fix is found.
Timur Tabi [Sat, 5 May 2007 06:12:30 +0000 (08:12 +0200)]
5xxx: write MAC address to mac-address and local-mac-address
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.
Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
[PATCH] Use PVR to distinguish MPC5200B from MPC5200 in boot message
MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up
message. Use PVR to distinguish between the two variants, and print proper CPU
information.
Signed-off-by: Grzegorz Wianecki <grzegorz.wianecki@gmail.com> Signed-off-by: Bartlomiej Sieka <tur@semihalf.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Sergei Shtylyov [Mon, 23 Apr 2007 13:30:39 +0000 (15:30 +0200)]
[PATCH] Avoid assigning PCI resources from zero address
If a PCI IDE card happens to get a zero address assigned to it, the Linux IDE
core complains and IDE drivers fails to work. Also, assigning zero to a BAR
was illegal according to PCI 2.1 (the later revisions seem to have excluded the
sentence about "0" being considered an invalid address) -- so, use a reasonable
starting value of 0x1000 (that's what the most Linux archs are using).
Alternatively, one might have fixed the calls to pci_set_region() individually
(some code even seems to have taken care of this issue) but that would have
been a lot more work. :-)
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Acked-by: Stefan Roese <sr@denx.de>
Mike Frysinger [Mon, 23 Apr 2007 11:54:24 +0000 (13:54 +0200)]
[patch] use unsigned char in smc91111 driver for mac
the v_mac variable in the smc91111 driver is declared as a signed char ...
this causes problems when one of the bytes in the MAC is "signed" like 0xE0
because when it gets printed out, you get a display like:
0xFFFFFFE0 and that's no good
Jeffrey Mann [Sat, 5 May 2007 06:32:14 +0000 (08:32 +0200)]
ppc4xx: Detect if the sysclk on Sequoia is 33 or 33.333 MHz
The AMCC Secquoia board has been changed in a new revision from using a
33.000 MHz clock to a 33.333 MHz system clock. A bit in the CPLD
indicates the difference. This patch reads that bit and uses the correct
clock speed for the board. This code is backward compatable will all
prior boards. All prior boards will be read as 33.000.
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com> Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Sat, 5 May 2007 06:29:01 +0000 (08:29 +0200)]
ppc4xx: Sequoia: Remove cpu/ppc4xx/speed.c from NAND booting
Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big
for the 4k NAND boot image so define bus_frequency to 133MHz here
which is save for the refresh counter setup.
Thomas Knobloch [Sat, 5 May 2007 05:04:42 +0000 (07:04 +0200)]
NAND: Wrong calculation of page number in nand_block_bad()
In case that there is no memory based bad block table available the
function nand_block_checkbad() in drivers/mtd/nand/nand_base.c will call
nand_block_bad() directly. When parameter 'getchip' is set to zero,
nand_block_bad() will not right shift the offset to calculate the
correct page number.
Signed-off-by: Thomas Knobloch <knobloch@siemens.com> Signed-off-by: Stefan Roese <sr@denx.de>
Wolfgang Denk [Thu, 3 May 2007 14:34:41 +0000 (16:34 +0200)]
Update board configuration for STX GP3SSA board:
Enable hush shell, environment in flash rather in EEPROM,
more user-friendly default environment, etc.
The simple EEPROM environment can be selected easily in the board
config file.
Andy Fleming [Sat, 24 Feb 2007 07:08:13 +0000 (01:08 -0600)]
Cleaned up some 85xx PCI bugs
* Cleaned up the CDS PCI Config Tables and added NULL entries to
the end
* Fixed PCIe LAWBAR assignemt to use the cpu-relative address
* Fixed 85xx PCI code to assign powar region sizes based on the
config values (rather than hard-coding them)
* Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address
Signed-off-by: Andy Fleming <afleming@freescale.com>
Andy Fleming [Mon, 23 Apr 2007 07:54:25 +0000 (02:54 -0500)]
Add support for the 8568 MDS board
This included some changes to common files:
* Add 8568 processor SVR to various places
* Add support for setting the qe bus-frequency value in the dts
* Add the 8568MDS target to the Makefile
Signed-off-by: Andy Fleming <afleming@freescale.com>
David Updegraff [Fri, 20 Apr 2007 19:34:48 +0000 (14:34 -0500)]
Add support for treating unknown PHYs as generic PHYs.
When bringing up u-boot on new boards, PHY support sometimes gets
neglected. Most PHYs don't really need any special support,
though. By adding a generic entry that always matches if nothing
else does, we can provide support for "unsupported" PHYs for the
tsec.
The generic PHY driver supports most PHYs, including gigabit.
Signed-off-by: David Updegraff <dave@cray.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Timur Tabi [Mon, 30 Apr 2007 18:59:50 +0000 (13:59 -0500)]
Fix memory initialization on MPC8349E-mITX
Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349E-mITX and MPC8349E-mITX-GP.
This allows ddr->sdram_clk_cntl to be properly initialized. This is necessary
on some ITX boards, notably those with a revision 3.1 CPU.
Also change spd_sdram() in cpu/mpc83xx/spd_sdram.c to not write anything into
ddr->sdram_clk_cntl if CFG_DDR_SDRAM_CLK_CNTL is not defined.
Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Michael Benedict <MBenedict@twacs.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
James Yang [Fri, 16 Mar 2007 18:02:53 +0000 (13:02 -0500)]
Rewrote picos_to_clk() to avoid rounding errors.
Clarified that conversion is to DRAM clocks rather than platform clocks.
Made function static to spd_sdram.c.
Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
Timur Tabi [Mon, 12 Feb 2007 19:34:55 +0000 (13:34 -0600)]
85xx: write MAC address to mac-address and local-mac-address
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.
Andy Fleming [Mon, 23 Apr 2007 06:44:44 +0000 (01:44 -0500)]
Some 85xx cpu cleanups
* Cleaned up the TSR[WIS] clearing
* Cleaned up DMA initialization
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
Andy Fleming [Mon, 23 Apr 2007 06:32:22 +0000 (01:32 -0500)]
Add cpu support for the 8544
Recognize new SVR values, and add a few register definitions
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
Sergei Shtylyov [Wed, 27 Dec 2006 19:07:15 +0000 (22:07 +0300)]
Fix PCI I/O space mapping on Freescale MPC85x0ADS
The PCI I/O space mapping for Freescale MPC8540ADS board was broken by commit 52c7a68b8d587ebcf5a6b051b58b3d3ffa377ddc which failed to update the #define's
describing the local address window used for the PCI I/O space accesses -- fix
this and carry over the necessary changes into the MPC8560ADS code since the
PCI I/O space mapping was also broken for this board (by the earlier commit 087454609e47295443af793a282cddcd91a5f49c). Add the comments clarifying how
the PCI I/O space must be mapped to all the MPC85xx board config. headers.
Zang Roy-r61911 [Wed, 20 Dec 2006 03:01:00 +0000 (11:01 +0800)]
u-boot: v2: Remove the fixed TLB and LAW entrynubmer
Remove the fixed TLB and LAW entry nubmer. Use actually TLB and LAW
entry number to control the loop. This can reduce the potential risk
for the 85xx processor increasing its TLB adn LAW entry number.
Signed-off-by: Swarthout Edward <swarthout@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Scott Wood [Mon, 16 Apr 2007 19:34:21 +0000 (14:34 -0500)]
mpc83xx: Add generic PCI setup code.
Board code can now request the generic setup code rather than having to
copy-and-paste it for themselves. Boards should be converted to use this
once they're tested with it.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Mon, 16 Apr 2007 19:34:16 +0000 (14:34 -0500)]
mpc83xx: Change PVR_83xx to PVR_E300C1-3, and update checkcpu().
Rather than misleadingly define PVR_83xx as the specific type of 83xx
being built for, the PVR of each core revision is defined. checkcpu() now
prints the core that it detects, rather than aborting if it doesn't find
what it thinks it wants.
Signed-off-by: Scott Wood <scottwood@freescale.com>
projects / u-boot / log