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7 years agoarmv8: fsl-lsch2: Use Chassis-2 streamid definition for ls1012a
Bharat Bhushan [Wed, 22 Mar 2017 06:36:29 +0000 (12:06 +0530)]
armv8: fsl-lsch2: Use Chassis-2 streamid definition for ls1012a

LS1012A is Chassis-2 type SOC and shares same streamid definition.
This patch adds using streamids for ls1012a

Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: fsl-lsch2: Use Chassis-2 streamid definition for ls1046a
Bharat Bhushan [Wed, 22 Mar 2017 06:36:28 +0000 (12:06 +0530)]
armv8: fsl-lsch2: Use Chassis-2 streamid definition for ls1046a

LS1046A is Chassis-2 type SOC and shares same streamid definition,
this patch adds using streamids for LS1046A.

Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarvm8: pcie-layerscape: Define stream-ids for Layerscape Chassis-2
Bharat Bhushan [Wed, 22 Mar 2017 06:36:27 +0000 (12:06 +0530)]
arvm8: pcie-layerscape: Define stream-ids for Layerscape Chassis-2

Layerscape Chassis-2 have PCIe device, some platform devices and
DPAA1 devices which will use stream-ids for iommu level isolation
as they are behind SMMU.

This patch defines the stream-ids for Chassis-2 devices. DPAA1 is
reserved for future use.

Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: fsl-lsch3: Rewrite comment for stream IDs
Bharat Bhushan [Wed, 22 Mar 2017 06:36:26 +0000 (12:06 +0530)]
armv8: fsl-lsch3: Rewrite comment for stream IDs

LS2080a, LS1088a and LS2088a SOCs are based on Chassis-3 and shared
same stream-id partitioning. This patch rewords the definition to
support all these SOCs.

Also have changes in description about iommu-map property updates
in PCI node.

Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: fsl-lsch3: rename ls2080a_stream_id.h to stream_id_lsch3.h
Bharat Bhushan [Wed, 22 Mar 2017 06:36:25 +0000 (12:06 +0530)]
armv8: fsl-lsch3: rename ls2080a_stream_id.h to stream_id_lsch3.h

The stream ID allocation for Chasis 3.0 devices can be shared among
LS1088, LS2088 and LS2080.

Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agofsl-layerscape/ls104xardb: enable PPA support for eMMC/SD and NAND boot
Hou Zhiqiang [Fri, 17 Mar 2017 08:12:34 +0000 (16:12 +0800)]
fsl-layerscape/ls104xardb: enable PPA support for eMMC/SD and NAND boot

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: Kconfig: fsl-ppa: support load PPA from eMMC/SD and NAND Flash
Hou Zhiqiang [Fri, 17 Mar 2017 08:12:33 +0000 (16:12 +0800)]
armv8: Kconfig: fsl-ppa: support load PPA from eMMC/SD and NAND Flash

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agofsl: PPA: add support PPA image loading from NAND and SD
Hou Zhiqiang [Fri, 17 Mar 2017 08:12:32 +0000 (16:12 +0800)]
fsl: PPA: add support PPA image loading from NAND and SD

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agomtd: nand: remove nand size print from nand_init function
Hou Zhiqiang [Fri, 17 Mar 2017 08:12:31 +0000 (16:12 +0800)]
mtd: nand: remove nand size print from nand_init function

Add nand_size() function to move the nand size print into initr_nand().
Remove nand size print from nand_init() to allow other function to call
nand_init() without printing nand size.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agomtd: nand: add initialization flag
Hou Zhiqiang [Fri, 17 Mar 2017 08:12:30 +0000 (16:12 +0800)]
mtd: nand: add initialization flag

Add initialization flag to avoid initializing NAND Flash multiple
times, otherwise it will calculate a wrong total size.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8/fsl-layerscape: fdt: Skip checking USB clock on LS1012A
Yingxi Yu [Thu, 16 Mar 2017 07:18:32 +0000 (15:18 +0800)]
armv8/fsl-layerscape: fdt: Skip checking USB clock on LS1012A

USB requires 100MHz clock. On LS1012A, a dedicated 100MHz is provided
instead of SYSCLK (125MHz). Skipping checking SYSCLK for FDT fixup.

Signed-off-by: Yingxi Yu <yingxi.yu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1043a/ls1046aqds: fix the offsets of MTD partitions on NOR flash
Wenbin Song [Fri, 24 Mar 2017 10:05:48 +0000 (18:05 +0800)]
armv8: ls1043a/ls1046aqds: fix the offsets of MTD partitions on NOR flash

Fix the offsets of MTD partitions on Nor flash on ls1043ardb,
ls1043aqds and ls1046aqds boards. Delete the rcw, uboot env and fman
partitions. Add user partitions for general usage.

Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoboard: freescale: ls2080a/ls2088a: Enable PPA
Santan Kumar [Tue, 7 Mar 2017 05:51:03 +0000 (11:21 +0530)]
board: freescale: ls2080a/ls2088a: Enable PPA

Enable PPA on LS2080A, LS2088A boards:
-LS2080ARDB, LS2080AQDS
-LS2088ARDB, LS2088AQDS

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agopci: layerscape: Fixup device tree node for ls2088a
Hou Zhiqiang [Fri, 3 Mar 2017 04:35:10 +0000 (12:35 +0800)]
pci: layerscape: Fixup device tree node for ls2088a

LS2088A and its variants have different PCIe node than LS2080A.
The compatible string is updated accordingly.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agopci: layerscape: add LS2088A series SoC pcie support
Hou Zhiqiang [Fri, 3 Mar 2017 04:35:09 +0000 (12:35 +0800)]
pci: layerscape: add LS2088A series SoC pcie support

The LS2088A series SoCs has different physical memory map address and
CCSR registers address against LS2080A series SoCs.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agotools: plbimage support generate rcw file
yuan linyu [Sun, 26 Feb 2017 00:38:27 +0000 (08:38 +0800)]
tools: plbimage support generate rcw file

some system will not generate pbl format u-boot, but require rcw.

Signed-off-by: yuan linyu <Linyu.Yuan@alcatel-sbell.com.cn>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: fsl-lsch3: Conditionally apply workaround for erratum a0009203
Ashish kumar [Thu, 23 Feb 2017 10:33:57 +0000 (16:03 +0530)]
armv8: fsl-lsch3: Conditionally apply workaround for erratum a0009203

This i2c errata only applies to LS2080A and its variants, namely
LS2080A, LS2085A and LS2088A.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: dts: fsl-ls1012a: Change number of CS in SPI node
Suresh Gupta [Tue, 21 Feb 2017 08:56:47 +0000 (14:26 +0530)]
armv8: dts: fsl-ls1012a: Change number of CS in SPI node

LS1012A has only one chip select for QSPI flash.

Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agospi: fsl_qspi: Add support for single chip select
Suresh Gupta [Tue, 21 Feb 2017 08:56:46 +0000 (14:26 +0530)]
spi: fsl_qspi: Add support for single chip select

SOC’s like LS1012A has only one chip select signal for QSPI flash.
Avoid scanning other flash.

Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8:fsl-layerscape: Avoid RCWSR28 register hard-coding
Prabhakar Kushwaha [Wed, 15 Feb 2017 15:10:35 +0000 (20:40 +0530)]
armv8:fsl-layerscape: Avoid RCWSR28 register hard-coding

SerDes information is not necessary to be present in RCWSR29 register.
It may vary from SoC to SoC.

So Avoid RCWSR28 register hard-coding.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarm: fsl-layerscape: Move QSGMII wriop_init to SoC file
Prabhakar Kushwaha [Wed, 15 Feb 2017 15:10:00 +0000 (20:40 +0530)]
arm: fsl-layerscape: Move QSGMII wriop_init to SoC file

MAC number used per QSGMII is not fixed. It may wary from SoC to SoC.

So move QSGMII wriop_init_dpmac() to SoC file.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8/fsl-layerscape: Update erratum A009635 implementation
Priyanka Jain [Tue, 14 Feb 2017 05:04:31 +0000 (10:34 +0530)]
armv8/fsl-layerscape: Update erratum A009635 implementation

Erratum A009635 is valid only for LS2080A SoC and its
personality. Add SoC svr check.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agopci: layerscape: enable PCIe config ready
Hou Zhiqiang [Fri, 10 Feb 2017 07:42:11 +0000 (15:42 +0800)]
pci: layerscape: enable PCIe config ready

In EP mode, to enable accesses from the Root Complex, the
CONFIG_READY bit must be set, otherwise any config attempts
from the Root Complex will be returned with config retry
status (CRS).

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agofsl: Secure Boot: Enable IE (Key extention) Feature
Udit Agarwal [Thu, 9 Feb 2017 16:06:11 +0000 (21:36 +0530)]
fsl: Secure Boot: Enable IE (Key extention) Feature

For validating images from uboot (Such as Kernel Image), either keys
from SoC fuses can be used or keys from a verified table of public
keys can be used. The latter feature is called IE Key Extension
Feature.

For Layerscape Chasis 3 based platforms, IE table is validated by
Bootrom and address of this table is written in scratch registers 13
and 14 via PBI commands.

Following are the steps describing usage of this feature:

1) Verify IE Table in ISBC phase using keys stored in fuses.
2) Install IE table. (To be used across verification of multiple
   images stored in a static global structure.)
3) Use keys from IE table, to verify further images.

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls2080ardb, ls2080aqds: Add mcmemsize in default env setting
Santan Kumar [Mon, 6 Feb 2017 08:48:12 +0000 (14:18 +0530)]
armv8: ls2080ardb, ls2080aqds: Add mcmemsize in default env setting

Initialize mcmemsize to 0x40000000

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agofsl-layerscape/ppa: cleanup ppa.h
Hou Zhiqiang [Mon, 6 Feb 2017 03:27:27 +0000 (11:27 +0800)]
fsl-layerscape/ppa: cleanup ppa.h

Moved the ifdef into ppa.h and removed the duplicated macros.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: LS2080A: Move sec_init to board_init
Udit Agarwal [Fri, 3 Feb 2017 17:23:38 +0000 (22:53 +0530)]
armv8: LS2080A: Move sec_init to board_init

Moves sec_init to board_init rather than in misc_init function beacuse
PPA will be initialised in board_init function and for PPA validation
sec_init has to be done prior to PPA init.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: lsch3: SECURE_BOOT: Define CONFIG_SYS_LS_PPA_ESBC_ADDR for LS2080A
Udit Agarwal [Fri, 3 Feb 2017 17:23:37 +0000 (22:53 +0530)]
armv8: lsch3: SECURE_BOOT: Define CONFIG_SYS_LS_PPA_ESBC_ADDR for LS2080A

Add header address for PPA to be validated during ESBC phase for LS2080A
platform based on Layescape Chasis 3.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoMerge git://git.denx.de/u-boot-arc
Tom Rini [Fri, 24 Mar 2017 12:19:30 +0000 (08:19 -0400)]
Merge git://git.denx.de/u-boot-arc

This replaces legacy arch/arc/lib/timer.c implementation and allows us
to describe ARC Timers in Device Tree. Among other things that way we
may properly inherit Timer's clock from CPU's clock s they really run
synchronously.

7 years agoarc: use timer driver for ARC boards
Vlad Zakharov [Tue, 21 Mar 2017 11:49:49 +0000 (14:49 +0300)]
arc: use timer driver for ARC boards

This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoarc: dts: separate single axs10x.dts file
Vlad Zakharov [Tue, 21 Mar 2017 11:49:48 +0000 (14:49 +0300)]
arc: dts: separate single axs10x.dts file

We want to use the same device tree blobs in both Linux and U-Boot for
ARC boards.

Earlier device tree sources in U-Boot were very simplified and hadn't been
updated for quite a long period of time.

So this commit is the first step on the road to unified device tree blobs.

First of all we re-organize device tree sources for AXS10X boards.
As AXS101 and AXS103 boards consist of AXS10X motherboard and AXC001 and
AXC003 cpu tiles respectively we add corresponding device tree source
files: axs10x_mb.dtsi for motherboard, axc001.dtsi and axc003.dtsi for
cpu tiles and axs101.dts and axs103.dts to represent actual boards.

Also we delete axs10x.dts as it is no longer used.

One more important change - we add timer device to ARC skeleton device
tree sources as both ARC700 and ARCHS cores contain such timer.
We add core_clk nodes to abilis_tb100, nsim, axc001 and axc003 device tree
sources as it is referenced via phandle from timer node in common
skeleton.dtsi file.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMerge git://www.denx.de/git/u-boot-marvell
Tom Rini [Fri, 24 Mar 2017 11:21:57 +0000 (07:21 -0400)]
Merge git://www.denx.de/git/u-boot-marvell

This mainly adds support for some new boards, like the ARMv8 community
boards MACCHIATOBin and ESPRESSBin

7 years agodrivers: timer: Introduce ARC timer driver
Vlad Zakharov [Tue, 21 Mar 2017 11:49:47 +0000 (14:49 +0300)]
drivers: timer: Introduce ARC timer driver

This commit introduces timer driver for ARC.

ARC timers are configured via ARC AUX registers so we use special
functions to access timer control registers.

This driver allows utilization of either timer0 or timer1
depending on which one is available in real hardware. Essentially
only existing timers should be mentioned in board's Device Tree
description.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Thu, 23 Mar 2017 16:19:07 +0000 (12:19 -0400)]
Merge git://git.denx.de/u-boot-dm

7 years agoarm: mvebu: Add gdsys ControlCenter-Compact board
Dirk Eibach [Wed, 22 Feb 2017 15:07:23 +0000 (16:07 +0100)]
arm: mvebu: Add gdsys ControlCenter-Compact board

The gdsys ControlCenter Digital board is based on a Marvell Armada 38x
SOC.

It boots from SPI-Flash but can be configured to boot from SD-card for
factory programming and testing.

On board peripherals include:
- 2 x GbE
- Xilinx Kintex-7 FPGA connected via PCIe
- mSATA
- USB3 host
- Atmel TPM

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agodm: Add callback to modify the device tree
mario.six@gdsys.cc [Wed, 22 Feb 2017 15:07:22 +0000 (16:07 +0100)]
dm: Add callback to modify the device tree

Certain boards come in different variations by way of utilizing daughter
boards, for example. These boards might contain additional chips, which
are added to the main board's busses, e.g. I2C.

The device tree support for such boards would either, quite naturally,
employ the overlay mechanism to add such chips to the tree, or would use
one large default device tree, and delete the devices that are actually
not present.

Regardless of approach, even on the U-Boot level, a modification of the
device tree is a prerequisite to have such modular families of boards
supported properly.

Therefore, we add an option to make the U-Boot device tree (the actual
copy later used by the driver model) writeable, and add a callback
method that allows boards to modify the device tree at an early stage,
at which, hopefully, also the application of device tree overlays will
be possible.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm: mvebu: theadorable: Add 'pcie' test command
Stefan Roese [Fri, 10 Mar 2017 14:40:32 +0000 (15:40 +0100)]
arm: mvebu: theadorable: Add 'pcie' test command

This board specific command tests for the presence of a specified PCIe
device (via vendor-ID and device-ID). If the device is not detected,
this will get printed. If the device is detected, the board will get
resetted so that an easy loop test can be done. The board will reboot
until the PCIe device is not detected.

Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm: mvebu: theadorable: Add board-specific PEX detection pulse width
Stefan Roese [Fri, 10 Mar 2017 14:40:31 +0000 (15:40 +0100)]
arm: mvebu: theadorable: Add board-specific PEX detection pulse width

Define a board-specific detection pulse-width array for the SerDes PCIe
interfaces. If not defined in the board code, the default of currently 2
is used. Values from 0...3 are possible (2 bits).

In this case of the theadorable board, PEX interface 0 needs a value
of 0 for the detection pulse width so that the PCIe device (Atheros
WLAN PCIe device) is consistantly detected.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Adam Shobash <adams@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm: mvebu: AXP: Add possiblity to configure PEX detection pulse width
Stefan Roese [Fri, 10 Mar 2017 14:40:30 +0000 (15:40 +0100)]
arm: mvebu: AXP: Add possiblity to configure PEX detection pulse width

Tests have shown that on some boards the default width of the
configuration pulse for the PEX link detection might lead to
non-established PCIe links (link down). Especially under certain
conditions (higher temperature) and with specific PCIe devices
(in the case on the theadorable board its a Atheros PCIe WLAN
device). To enable a board-specific detection pulse width this weak
array "serdes_pex_pulse_width[4]" is introduced which can be
overwritten if needed by a board-specific version. If the board
code does not provide a non-weak version of this variable, the
default value will be used. So nothing is changed from the
current setup on the supported board.

Many thanks to Adam from Marvell for all his insights here and
his suggestion about testing with a changed detection pulse width.

Signed-off-by: Stefan Roese <sr@denx.de>
Suggested-by: Adam Shobash <adams@marvell.com>
Cc: Adam Shobash <adams@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: a37xx: Remove DM_I2C_COMPAT from the board config
Konstantin Porotchkin [Thu, 16 Feb 2017 11:52:33 +0000 (13:52 +0200)]
arm64: a37xx: Remove DM_I2C_COMPAT from the board config

Remove DM_I2C_COMPAT from the board configurations for
Armada 37xx platform boards for supressing the buid tim
warning.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: a37xx: Disable DB configurations on ESPRESSOBin board
Konstantin Porotchkin [Thu, 16 Feb 2017 11:52:32 +0000 (13:52 +0200)]
arm64: a37xx: Disable DB configurations on ESPRESSOBin board

Bypass XHCI and AHCi board configuration flow on ESPRESSOBin
community board.
The community board does not have i2c expander and USB VBUS
is always on, so the scan for AHCi and USB devices can be
faster without unneded configurations.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: mvebu: Add default config for ESPRESSOBin board
Konstantin Porotchkin [Thu, 16 Feb 2017 11:52:31 +0000 (13:52 +0200)]
arm64: mvebu: Add default config for ESPRESSOBin board

Add initial default configuration for Marvell ESPRESSOBin
community board based on Aramda-3720 SoC

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: dts: Add device tree for ESPRESSOBin board
Konstantin Porotchkin [Thu, 16 Feb 2017 11:52:30 +0000 (13:52 +0200)]
arm64: dts: Add device tree for ESPRESSOBin board

Initial DTS file for Marvell ESPRESSOBin comunity board
based on Armada-3720 SoC.
The Marvell ESPRESSOBin is a tiny board made by Globalscale
and available on KickStarter site. It has dual core Armv8
Marvell SoC (Armada-3720) with 512MB/1GB/2GB DDR3 RAM,
mini-PCIe 2.0 slot, single SATA-3 port, USB 2.0 and USB 3.0
interfaces, Gigabit Ethernet switch with 3 ports, micro-SD
socket and two 46-pin GPIO connectors.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agomvebu: a37xx: Add init for ESPRESSBin Topaz switch
Konstantin Porotchkin [Thu, 16 Feb 2017 11:52:29 +0000 (13:52 +0200)]
mvebu: a37xx: Add init for ESPRESSBin Topaz switch

Implement the board-specific network init function for
ESPRESSOBin community board, setting the on-board Topaz
switch port to forward mode and allow network connection
through any of the available Etherenet ports.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agomvebu: neta: a37xx: Add fixed link support to neta driver
Konstantin Porotchkin [Thu, 16 Feb 2017 11:52:28 +0000 (13:52 +0200)]
mvebu: neta: a37xx: Add fixed link support to neta driver

Add support for fixed link to NETA driver.
This feature requreed for proper support of SFP modules
and onboard connected devices like Ethernet switches

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Terry Zhou <bjzhou@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agomvebu: neta: Add support for board init function
Konstantin Porotchkin [Thu, 16 Feb 2017 11:52:27 +0000 (13:52 +0200)]
mvebu: neta: Add support for board init function

Add ability to use board-specific initialization flow
to NETA driver (for instance Ethernet switch bring-up)

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: a37xx: Handle pin controls in early board init
Konstantin Porotchkin [Thu, 16 Feb 2017 11:52:26 +0000 (13:52 +0200)]
arm64: a37xx: Handle pin controls in early board init

Fix the default pin control values in a board-specific
function on early board init stage.
This fix allows the NETA driver to work in RGMII
mode until the full-featured pin control driver gets
introduced.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: a37xx: dts: Add pin control nodes to DT
Konstantin Porotchkin [Thu, 16 Feb 2017 11:52:25 +0000 (13:52 +0200)]
arm64: a37xx: dts: Add pin control nodes to DT

Add pin control nodes for North and South bridges to
Armada-37xx DT

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: a37xx: Enable bubt command support on A3720-DB
Konstantin Porotchkin [Thu, 16 Feb 2017 11:52:24 +0000 (13:52 +0200)]
arm64: a37xx: Enable bubt command support on A3720-DB

Enable mvebu bubt command support on A3720 DB

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: a37xx: Enable Marvell ETH PHY support
Konstantin Porotchkin [Thu, 16 Feb 2017 11:52:23 +0000 (13:52 +0200)]
arm64: a37xx: Enable Marvell ETH PHY support

Enable support for Marvell Ethernet PHYs on A37xx platforms

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: mvebu: Rename the db-88f3720 to armada-37xx platform
Konstantin Porotchkin [Thu, 16 Feb 2017 11:52:22 +0000 (13:52 +0200)]
arm64: mvebu: Rename the db-88f3720 to armada-37xx platform

Modify the file names and deifinitions relater to Marvell
db-77f3720 board support. Convert these names to more generic
armada-37xx platform for future addition of more boards
based on the same SoC family.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agomvebu: usb: xhci: Add VBUS regulator supply to the host driver
Konstantin Porotchkin [Sun, 12 Feb 2017 09:10:30 +0000 (11:10 +0200)]
mvebu: usb: xhci: Add VBUS regulator supply to the host driver

The USB device should linked to VBUS regulator through "vbus-supply"
DTS property.
This patch adds handling for "vbus-supply" property inside the USB
device entry for turning on the VBUS regulator upon the host adapter probe.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: mvebu: Add default configuraton for MACCHIATOBin board
Konstantin Porotchkin [Thu, 9 Feb 2017 10:39:37 +0000 (12:39 +0200)]
arm64: mvebu: Add default configuraton for MACCHIATOBin board

Add default configuration for MACHHIATOBin community board
based on Aramda-8040 SoC.

Change-Id: Ic6b562065c0929ec338492452f765115c15a6188
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: mvebu: dts: Add DTS file for MACCHIATOBin board
Rabeeh Khoury [Thu, 9 Feb 2017 10:39:10 +0000 (12:39 +0200)]
arm64: mvebu: dts: Add DTS file for MACCHIATOBin board

Added A8040 dts file for community board MACCHIATIBin.
The patch includes the following features:
AP -  Serial console (connected to onboard FTDI usb to serial)
CP0 - PCIe x4, SATA, I2C and 10G KR
      (connected to Marvell 3310 10G copper / SFP+ phy)
CP1 - Boot SPI, USB3 host, 2xSATA, 10G KR
      (connected to Marvell 3310 10G copper / SFP+ phy),
      SGMII connected to onboard 1512 1Gbps copper phy,
      and additional SGMII connected to SFP
      (default 1Gbps can be configured to 2.5Gbps).

Network interface naming -
egiga0 - CP0 KR
egiga1 - CP1 KR
egiga2 - CP1 RJ45 1Gbps connector (recommended for TFTP boot)
egiga3 - CP1 SFP default 1Gbps and can be modified to 2.5Gbps

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agomvebu: pcie: Add support for GPIO reset for PCIe device
Konstantin Porotchkin [Wed, 8 Feb 2017 15:34:13 +0000 (17:34 +0200)]
mvebu: pcie: Add support for GPIO reset for PCIe device

Add support for "marvell,reset-gpio" property to mvebu DW PCIe
driver.
This option is valid when CONFIG_DM_GPIO=y

Change-Id: Ic17c500449050c2fbb700731f1a9ca8b83298986
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: mvebu: dts: Add i2c1 pin definitions to CPM
Konstantin Porotchkin [Wed, 8 Feb 2017 15:34:12 +0000 (17:34 +0200)]
arm64: mvebu: dts: Add i2c1 pin definitions to CPM

Add i2c-1 pin mappings to CP0(master) DTSI file

Change-Id: I0c6e6de8a557393f518f7df8e6daa6dfce1788b0
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agoarm64: mvebu: gpio: Add GPIO nodes to A8K family devices
Konstantin Porotchkin [Wed, 8 Feb 2017 15:34:11 +0000 (17:34 +0200)]
arm64: mvebu: gpio: Add GPIO nodes to A8K family devices

Add GPIO nodes to AP-806 and CP-110-master DTSI files.

Change-Id: I05958698d460cb721b7d8683d34f74a5ea32532c
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agodtoc: make ScanTree recurse into subnodes
Philipp Tomsich [Wed, 22 Feb 2017 18:06:04 +0000 (19:06 +0100)]
dtoc: make ScanTree recurse into subnodes

Previously, dtoc could only process the top-level nodes which led to
device nodes in hierarchical trees to be ignored. E.g. the mmc0 node
in the following example would be ignored, as only the soc node was
processed:

  / {
soc {
mmc0 {
/* ... */
};
};
  };

This introduces a recursive helper method ScanNode, which is used by
ScanTree to recursively parse the entire tree hierarchy.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodrivers: ti_qspi: use syscon to get the address ctrl_mod_mmap register
Jean-Jacques Hiblot [Mon, 13 Feb 2017 15:17:49 +0000 (16:17 +0100)]
drivers: ti_qspi: use syscon to get the address ctrl_mod_mmap register

We used to get the address of the optionnal ctrl_mod_mmap register as the
third memory range of the "reg" property. the linux driver moved to use a
syscon instead. In order to keep the DTS as close as possible to that of
linux, we move to using a syscon as well.

If SYSCON is not supported, the driver reverts to the old way of getting
the address from the 3rd memory range

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
7 years agoregmap: use fdt address translation
Jean-Jacques Hiblot [Mon, 13 Feb 2017 15:17:48 +0000 (16:17 +0100)]
regmap: use fdt address translation

In the DTS, the addresses are defined relative to the parent bus. We need
to translate them to get the address as seen by the CPU core.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
7 years agodm: core: Fix Handling of global_data moving in SPL
Lokesh Vutla [Mon, 13 Feb 2017 03:51:22 +0000 (09:21 +0530)]
dm: core: Fix Handling of global_data moving in SPL

commit 2f11cd9121658 ("dm: core: Handle global_data moving in SPL")
handles relocation of GD in SPL if spl_init() is called before
board_init_r(). So, uclass_root.next need not be initialized always
and accessing uclass_root.next->prev gives an abort. Update the
uclass_root only if it is available.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-mmc
Tom Rini [Tue, 21 Mar 2017 18:10:15 +0000 (14:10 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc

7 years agommc: xenon_sdhci: Add missing host->max_clk to Xenon SDHCI driver
Stefan Roese [Mon, 20 Mar 2017 16:00:32 +0000 (17:00 +0100)]
mmc: xenon_sdhci: Add missing host->max_clk to Xenon SDHCI driver

The Xenon SDHCI driver just missed the integration of this patch:

git ID 6d0e34bf
mmc: sdhci: Distinguish between base clock and maximum peripheral frequency

With this patch applied, the SDHCI subsystem complains now with this warning
while probing:

sdhci_setup_cfg: Hardware doesn't specify base clock frequency

This patch fixes this issue, by providing the missing host->max_clk
variable to the SDHCI subsystem.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Hu Ziji <huziji@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
7 years agommc: drop unnecessary send_status request
Xu Ziyuan [Sun, 12 Mar 2017 06:19:04 +0000 (14:19 +0800)]
mmc: drop unnecessary send_status request

It's redundant to send cmd13 after cmd9 whose response is not R1b. The
card devices will not be busy w/ cmd9.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
7 years agommc: sdhci: only flush cache for data command
Kevin Liu [Wed, 8 Mar 2017 07:16:44 +0000 (15:16 +0800)]
mmc: sdhci: only flush cache for data command

No need to flush cache for command without data.

Signed-off-by: Kevin Liu <kevinliu@asrmicro.com>
7 years agommc: tangier: Add Intel Tangier eMMC/SDHCI driver
Felipe Balbi [Mon, 20 Feb 2017 11:24:14 +0000 (14:24 +0300)]
mmc: tangier: Add Intel Tangier eMMC/SDHCI driver

This patch adds Intel Tangier eMMC/SDHCI driver.

Intel Tangier SoC contains a hybrid of PCI and non-PCI devices. SDHCI
controller is one of the devices which are *not* on a PCI and, hence,
cannot be enumerated by standard PCI means. This driver, allows for
SDHCI controller on Tangier SoC to work in U-Boot.

Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agommc: pci: Add CONFIG_MMC_PCI
Felipe Balbi [Mon, 20 Feb 2017 11:24:13 +0000 (14:24 +0300)]
mmc: pci: Add CONFIG_MMC_PCI

We don't want pci_mmc to compile every time x86 compiles, only when
there's a platform that needs it. For that reason, we're adding a new
CONFIG_MMC_PCI which platforms can choose to enable.

Suggested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7 years agoconfigs: am43xx_evm: Enable SPL_DM
Lokesh Vutla [Tue, 21 Feb 2017 06:10:44 +0000 (11:40 +0530)]
configs: am43xx_evm: Enable SPL_DM

Enable SPL_DM on all AM43xx based platforms

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: AM43xx: Enable DM_I2C/SPI/ETH
Lokesh Vutla [Tue, 21 Feb 2017 06:10:43 +0000 (11:40 +0530)]
ARM: AM43xx: Enable DM_I2C/SPI/ETH

Enable DM_I2C/SPI/ETH for all AM43XX based boards.
Enable it using imply keyword so that a user can
disable this when not needed.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: dts: am43xx: Add u-boot specific dtsi
Lokesh Vutla [Tue, 21 Feb 2017 06:10:42 +0000 (11:40 +0530)]
ARM: dts: am43xx: Add u-boot specific dtsi

Add u-boot specific dtsi for am43xx-gp-evm so
that it will be used for SPL.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoconfigs: dra7xx_evm: Enable SPL_DM
Lokesh Vutla [Fri, 10 Feb 2017 15:07:20 +0000 (20:37 +0530)]
configs: dra7xx_evm: Enable SPL_DM

Enable SPL_DM on all DRA7 based platforms.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoconfigs: am57xx_evm: Enable SPL_DM
Lokesh Vutla [Fri, 10 Feb 2017 15:07:19 +0000 (20:37 +0530)]
configs: am57xx_evm: Enable SPL_DM

Enable SPL_DM on all AM57xx based platforms.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: dts: OMAP5+: Add u-boot specific dtsi
Lokesh Vutla [Fri, 10 Feb 2017 15:07:18 +0000 (20:37 +0530)]
ARM: dts: OMAP5+: Add u-boot specific dtsi

Add u-boot specific dtsi so that this will be
included automatically while building dts.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: OMAP2+: define _image_binary_end to fix SPL_OF_CONTROL
Lokesh Vutla [Fri, 10 Feb 2017 15:07:17 +0000 (20:37 +0530)]
ARM: OMAP2+: define _image_binary_end to fix SPL_OF_CONTROL

To make SPL_OF_CONTROL work on OMAP2+ SoCs, _image_binary_end must be
defined in the linker script along with CONFIG_SPL_SEPARATE_BSS.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agospl: Correct call to spl_common_init() with SPL_STACK_R_MALLOC_SIMPLE_LEN
Tom Rini [Mon, 20 Mar 2017 18:19:27 +0000 (14:19 -0400)]
spl: Correct call to spl_common_init() with SPL_STACK_R_MALLOC_SIMPLE_LEN

Calls to IS_ENABLED() on a non-y/n option will always be false, even
when set.  We can correct this by adding a new bool value that is set
based on the conditions required for SPL_STACK_R_MALLOC_SIMPLE_LEN to be
set instead.

Fixes: 340f418acd11 ("spl: Add spl_early_init()")
Reported-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
Changes in v2:
- Fix thinko pointed out by Lokesh

7 years agoboard: ns2: Add support for Broadcom Northstar 2
Jon Mason [Fri, 17 Mar 2017 16:12:14 +0000 (12:12 -0400)]
board: ns2: Add support for Broadcom Northstar 2

Add support for the Broadcom Northstar2 SoC and SVK (bcm958712k).  The
BCM5871X is a series of quad-core 64-bit 2GHz ARMv8 Cortex-A57
processors targeting a broad range of networking applications.

Signed-off-by: Jon Mason <jon.mason@broadcom.com>
7 years agoda850: Add instructions to copy AIS image to NAND
ahaslam@baylibre.com [Fri, 17 Mar 2017 15:55:23 +0000 (16:55 +0100)]
da850: Add instructions to copy AIS image to NAND

Add instructions to write an AIS image to NAND
by using the u-boot nand tools.

Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
7 years agoPass empty CFLAGS on invocation of libfdt/setup.py
Max Filippov [Thu, 16 Mar 2017 22:23:55 +0000 (15:23 -0700)]
Pass empty CFLAGS on invocation of libfdt/setup.py

When building u-boot tools in cross-build environment CFLAGS environment
variable set up for target is taken into an account when building code
for host. Make it empty on invocation of python.

This fixes the following build errors when cross-compiling for xtensa:

  cc1: error: unrecognized command line option "-mlongcalls"
  cc1: error: unrecognized command line option "-mauto-litpools"

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoKconfig: Don't use RSA_FREESCALE_EXP on IMX
George McCollister [Thu, 16 Mar 2017 21:17:06 +0000 (16:17 -0500)]
Kconfig: Don't use RSA_FREESCALE_EXP on IMX

The CAAM in IMX parts doesn't support public key hardware acceleration
(PKHA), so don't use RSA_FREESCALE_EXP. If you try to use it on IMX
(assuming you have the clocks enabled first) you will get back an
"Invalid KEY Command" error since PKHA isn't a valid key destination for
these parts.

Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: am43xx: fix SOC revision print outs
Tero Kristo [Thu, 16 Mar 2017 07:48:54 +0000 (09:48 +0200)]
ARM: am43xx: fix SOC revision print outs

Currently, AM43xx just re-uses the version strings from AM33xx which is
wrong; the actual values for AM43xx are different. Fix this by adding
a separate version string array for AM43xx and use this instead.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reported-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agotest-fit.py: Minor grammar/spelling/clarification tweaks
Robert P. J. Day [Mon, 13 Mar 2017 10:50:55 +0000 (06:50 -0400)]
test-fit.py: Minor grammar/spelling/clarification tweaks

* Add note that execution needs Python development package installed
* Standardize on upper case "FIT", "FDT" as necessary for clarity
* Fix "tempoerary", "linex" typos

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
7 years agopart_efi: document device-tree binding for part_efi configuration
Philipp Tomsich [Wed, 1 Mar 2017 20:10:41 +0000 (21:10 +0100)]
part_efi: document device-tree binding for part_efi configuration

This adds documentation on the u-boot,efi-partition-entries-offset
property (which overrides CONFIG_EFI_PARTITION_ENTRIES_OFF, if
present).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodoc: move documentation for /config node into a separate file
Philipp Tomsich [Wed, 1 Mar 2017 20:10:40 +0000 (21:10 +0100)]
doc: move documentation for /config node into a separate file

This moves the description of the /config node from README.fdt-control
into a separate file doc/device-tree-bindings/config.txt.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agopart_efi: support padding between the GPT header and partition entries
Philipp Tomsich [Wed, 1 Mar 2017 20:10:39 +0000 (21:10 +0100)]
part_efi: support padding between the GPT header and partition entries

Some architectures require their SPL loader at a fixed address within
the first 16KB of the disk. To avoid an overlap with the partition
entries of the EFI partition table, the first safe offset (in bytes,
from the start of the device) for the entries can be set through
CONFIG_EFI_PARTITION_ENTRIES_OFF (via Kconfig)

When formatting a device with an EFI partition table, we may need to
leave a gap between the GPT header (always in LBA 1) and the partition
entries. The GPT header already contains a field to specify the
on-disk location, which has so far always been set to LBA 2. With this
change, a configurable offset will be translated into a LBA address
indicating where to put the entries.

Now also allows an override via device-tree using a config-node (see
doc/device-tree-bindings/config.txt for documentation).

Tested (exporting an internal MMC formatted with this) against Linux,
MacOS X and Windows.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: __maybe_unused on config_offset to avoid warning]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agonet: don't override ethernet address environment
Roger Quadros [Mon, 13 Mar 2017 13:04:33 +0000 (15:04 +0200)]
net: don't override ethernet address environment

If the ethernet address environment is set with a valid
ethernet address prevent overriding it as it is most likely
set by the user and he/she doesn't want board code to
automatically override it whatsoever.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: k2g: setup PRU ethernet MAC addresses
Roger Quadros [Mon, 13 Mar 2017 13:04:32 +0000 (15:04 +0200)]
ARM: k2g: setup PRU ethernet MAC addresses

PRU ethernet MAC address range is present in the
board EEPROM. Parse it and setup eth?addr
environment variables.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: Use Kconfig for board EEPROM's I2C bus and chip address
Roger Quadros [Mon, 13 Mar 2017 13:04:31 +0000 (15:04 +0200)]
ARM: Use Kconfig for board EEPROM's I2C bus and chip address

In stead of defining the board EEPROM address in the board headers
let's define them in the board config files and make them
configurable by Kconfig.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am57xx-idk: Auto detect LCD Panel
Nishanth Menon [Mon, 13 Mar 2017 13:04:30 +0000 (15:04 +0200)]
board: ti: am57xx-idk: Auto detect LCD Panel

AM571x IDK and AM572x IDK have optional LCD Kits that can be purchased.
These can be one of OSD101T2045 or the newer OSD101T2587. The LCD panel
itself has no registers that can be used to identify the panel, however,
the touchscreen controllers on the panels are different.

Hence to ease user experience, we can use the touch screen controller's
ID information to detect what kind of panel we use and select the
appropriate kernel dtb for the platform configuration.

NOTE: AM572x IDK default configuration is for LCD Connectivity, however
the AM571x IDK has a jumper (J51) that needs to be mounted for the IDK
to operate with LCD (Vs two PRUSS ethernet port option).

Touchscreen ID information is documented in:
http://www.osddisplays.com/TI/OSD101T2587-53TS_A.1.pdf

Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: ti: am571x-idk: Update pinmux for ICSS2 Ethernet
Roger Quadros [Mon, 13 Mar 2017 13:04:29 +0000 (15:04 +0200)]
board: ti: am571x-idk: Update pinmux for ICSS2 Ethernet

Use the same convention that was used for ICSS1 Ethernet
- If pin is output, set as PIN_OUTPUT
- If pin is input and external pull resistor present set as PIN_INPUT
- If pin is input and external pull resistor absent, set pull to same
as that of the external PHY's internall pull.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoboard: ti: am571x-idk: Support 6 port Ethernet or 4 port Ethernet with LCD
Roger Quadros [Mon, 13 Mar 2017 13:04:28 +0000 (15:04 +0200)]
board: ti: am571x-idk: Support 6 port Ethernet or 4 port Ethernet with LCD

The board can support either ICSS1 Ethernet ports or LCD
based on J51 jumper. Factory default is ICSS1 Ethernet ports
(i.e. Jumper not populated).

Use the GPIO to detect the jumper setting and configure the
pinmux accordingly. Also select the right DT blob based on
the chosen configuration.

J51 absent -> ICSS1 Ethernet, no LCD on VOUT -> am571x-idk.dtb
J51 present -> LCD on VOUT, no ICSS1 Ethernet -> am571x-idk-lcd-osd.dtb

At present we only support the assume it is the Legacy LCD.
LCD detection mechanism needs to be added later to differentiate
between legacy vs new LCD.

For ICSS1 Ethernet pins use the following convention to set the pinmux
as PMT data is not yet finalized.

- If pin is output, set as PIN_OUTPUT
- If pin is input and external pull resistor present set as PIN_INPUT
- If pin is input and external pull resistor absent, set pull to same
as that of the external PHY's internall pull.
- Do not use SLEW_CONTROLon any pin.

Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoti: common: board_detect: commodify ethaddr environment setting code
Roger Quadros [Tue, 14 Mar 2017 13:04:19 +0000 (15:04 +0200)]
ti: common: board_detect: commodify ethaddr environment setting code

Keystone and OMAP platforms will need this to set ethernet
MAC addresses from board EEPROM.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoti_armv7_keystone2: Define scratch space in SRAM
Franklin S Cooper Jr [Mon, 13 Mar 2017 13:04:26 +0000 (15:04 +0200)]
ti_armv7_keystone2: Define scratch space in SRAM

Scratch space can be used for features such as board detection. Define
an area within SRAM that can be used for this purpose.

[rogerq@ti.com] Rename EEPROM macro

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
7 years agoti: common: board_detect: Rename EEPROM scratch start macro
Lokesh Vutla [Mon, 13 Mar 2017 13:04:25 +0000 (15:04 +0200)]
ti: common: board_detect: Rename EEPROM scratch start macro

Non OMAP platforms i.e. Keystone will also need to use the board
EEPROM helpers so let's make the macro platform independent.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoARM: OMAP5+: GPIO: Add GPIO_TO_PIN() macro
Roger Quadros [Mon, 13 Mar 2017 13:04:24 +0000 (15:04 +0200)]
ARM: OMAP5+: GPIO: Add GPIO_TO_PIN() macro

GPIO_TO_PIN(bank, bank_gpio) returns the GPIO index
from the GPIO bank number and bank's GPIO offset number.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agotravis-ci: Re-work i.MX6 jobs, clarify Freescale and AArch64
Tom Rini [Mon, 20 Mar 2017 14:21:27 +0000 (10:21 -0400)]
travis-ci: Re-work i.MX6 jobs, clarify Freescale and AArch64

- The catch-all i.MX6 job has been exceeding the time limit again so
  split this up further.  We now have an i.MX6 job and an
  everything-else job.
- The logic we use to say "Freescale and AArch64" can be more clearly
  expressed with '&' rather than excluding various other things, so
  clear that up.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoti: boot: Register the MMC controllers in SPL in the same way as in u-boot
Jean-Jacques Hiblot [Wed, 1 Feb 2017 10:39:14 +0000 (11:39 +0100)]
ti: boot: Register the MMC controllers in SPL in the same way as in u-boot

To keep a consistent MMC device mapping in SPL and in u-boot, let's
register the MMC controllers the same way in u-boot and in the SPL.
In terms of boot time, it doesn't hurt to register more controllers than
needed because the MMC device is initialized only prior being accessed for
the first time.
Having the same device mapping in SPL and u-boot allows us to use the
environment in SPL whatever the MMC boot device.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
7 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-imx
Tom Rini [Sun, 19 Mar 2017 18:49:26 +0000 (14:49 -0400)]
Merge branch 'master' of git://www.denx.de/git/u-boot-imx

Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
configs/bk4r1_defconfig
configs/colibri_vf_defconfig
configs/pcm052_defconfig
include/configs/colibri_vf.h
include/configs/pcm052.h

7 years agoKconfig: Migrate CONFIG_BAUDRATE
Philipp Tomsich [Fri, 17 Mar 2017 19:34:53 +0000 (20:34 +0100)]
Kconfig: Migrate CONFIG_BAUDRATE

Move this in to Kconfig with a default of 115200.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[trini: Run moveconfig.py, reword commit slightly]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoimx: ventana: add EMMC configuration
Tim Harvey [Mon, 13 Mar 2017 15:51:09 +0000 (08:51 -0700)]
imx: ventana: add EMMC configuration

Prepare for boards with EMMC instead of NAND flash

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
7 years agotools: imximage: add set bit command
Peng Fan [Thu, 16 Mar 2017 06:35:06 +0000 (14:35 +0800)]
tools: imximage: add set bit command

Add set bit command support.
Usage: SET_BIT 4 [address] [bitmask]

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>