Mike Frysinger [Fri, 4 Sep 2009 03:12:47 +0000 (23:12 -0400)]
push LOAD_ADDR out to arch mk files
Rather than maintain/extend the current ifeq($(ARCH)) mess that exists in
the standalone Makefile, push the setting up of LOAD_ADDR out to the arch
config.mk (and rename to STANDALONE_LOAD_ADDR in the process). This keeps
the common code clean and lets the arch do whatever crazy crap it wants in
its own area.
Wolfgang Denk [Wed, 2 Sep 2009 12:57:27 +0000 (14:57 +0200)]
License cleanup: remove unintended "All Rights Reserved" notices.
Some files included my old standerd file header which had a "All
Rights Reserved" part. As this has never been my intention, I remove
these lines to make the files compatible with GPL v.2 and later.
Wolfgang Denk [Wed, 2 Sep 2009 08:21:20 +0000 (10:21 +0200)]
cmd_mtdparts.c: fix compiler warning in debug code
Fix warning messages:
cmd_mtdparts.c:1429: warning: format '%08lx' expects type 'long
unsigned int', but argument 6 has type 'u32'
cmd_mtdparts.c:1429: warning: format '%08lx' expects type 'long
unsigned int', but argument 7 has type 'u32'
Kumar Gala [Thu, 27 Aug 2009 13:23:55 +0000 (08:23 -0500)]
Add ability for arch code to make changes before we boot
Added a arch_preboot_os() function that cpu specific code can implement to
allow for various modifications to the state of the machine right before
we boot. This can be useful to setup register state to a specific
configuration.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Graeme Russ [Sun, 23 Aug 2009 02:59:54 +0000 (12:59 +1000)]
Fixup sc520_spunk board
Primary intent is to resolve build errors for this board which has been
neglected for a very long time. I do not have one of these boards, so I
cannot test functionality
Graeme Russ [Sun, 23 Aug 2009 02:59:53 +0000 (12:59 +1000)]
Misc ds1722 fixups
This patch is based on a patch submitted by Jean-Christophe PLAGNIOL-VILLARD
on 18th May 2008 as part of a general i386 / sc520 fixup which was never
applied
Graeme Russ [Sun, 23 Aug 2009 02:59:52 +0000 (12:59 +1000)]
Misc ti_pci1410a fixups
Removed do_pinit() - now declared in cmd_pcmcia.c
Added #define CONFIG_CMD_PCMCIA around pcmcia_off() in line with other
PCMCIA drivers
signed/unsigned type fixups
Added semi-colon after default: label as required by newer gcc
The only board that appears to use this driver is the sc520_spunk which
is very old and very likely very broken anyway. I do not have one to test
whether this patch breaks anything functionaly, I have can only check
that it compiles without warning or error
Graeme Russ [Sun, 23 Aug 2009 02:59:51 +0000 (12:59 +1000)]
Misc SATA fixups
Cast first parameter to sata_cpy()
In /drivers/block/ata_piix.h, ata_id_has_lba48(), ata_id_has_lba(),
ata_id_has_dma(), ata_id_u32(), ata_id_u64() are all defined in
include/libata.h which is included in ata.h which is included by all files
which include ata_piix.h (only ata_piix.c) so these definitions are
supurflous to (and conlict with) this in libata.h. Interestingly, my
compiler complains about ata_id_u64 already being defined, but not
ata_id_u32
ata_dump_id() is defined in include/libata.h and should not be static
(maybe should even use ata_dump_id() in libata.c
Change call to pci_find_class() to pci_find_devices(). This is based on a
patch submitted on 1st March 2007 (Patch that fixes the compilation errors
for sc520_cdp board) by mushtaq_k
This patch requires that PCI_VIDEO_VENDOR_ID and PCI_VIDEO_DEVICE_ID be
specified in the board config file. Dummy values have been added for the
SC520 CDP board to enable compilation, but since I do not have one of these,
I do know what the values should be
Graeme Russ [Sun, 23 Aug 2009 02:59:49 +0000 (12:59 +1000)]
Fix sc520 timer interrupt generation
The current implementation has the timer being started before the interrupt
handler is installed. It the interrupt occurs before the handler is
installed, the timer interrupt is never reset and the timer stops
Graeme Russ [Sun, 23 Aug 2009 02:59:48 +0000 (12:59 +1000)]
Fix environment configuration for eNET board
The current configuration of the Environment has the redundant copy of the
environment in the Boot Flash - This was never the intent. The Environment
should instead be in the first two sectors of the first Strata Flash
Graeme Russ [Sun, 23 Aug 2009 02:59:46 +0000 (12:59 +1000)]
i386: Change inline asm global symbols to local
gcc 4.3.2 optimiser creates multiple copies of inline asm (who knows why)
Remove use of global names for labels to prevent 'symbol already defined'
errors
Mike Frysinger [Thu, 23 Jul 2009 20:37:03 +0000 (16:37 -0400)]
atmel_df_pow2: standalone to convert dataflashes to pow2
Atmel DataFlashes by default operate with pages that are slightly bigger
than normal binary sizes (i.e. many are 1056 byte pages rather than 1024
bytes). However, they also have a "power of 2" mode where the pages show
up with the normal binary size. The latter mode is required in order to
boot with a Blackfin processor, so many people wish to convert their
DataFlashes on their development systems to this mode. This standalone
application does just that.
Mike Frysinger [Wed, 2 Sep 2009 08:21:16 +0000 (04:21 -0400)]
Blackfin: enable 64bit printf for nand
Since the NAND code now uses 64bit code, make sure we enable support for
ADI Blackfin boards in printf to avoid the warning:
nand_util.c:45:2: warning: #warning Please define CONFIG_SYS_64BIT_VSPRINTF for correct output!
Mike Frysinger [Tue, 25 Aug 2009 00:48:04 +0000 (20:48 -0400)]
Blackfin: use scratch pad for exception stack
If the memory layout pushes the stack out of the default DCPLB coverage,
the exception handler may trigger a double fault by trying to push onto
the uncovered stack. So handle the exception stack similar to the kernel
by using the top of the scratch pad SRAM.
Robin Getz [Mon, 17 Aug 2009 15:23:02 +0000 (15:23 +0000)]
Blackfin: change global data register from P5 to P3
Since the Blackfin ABI favors higher scratch registers by default, use the
last scratch register (P3) for global data rather than the first (P5).
This allows the compiler's register allocator to use higher number scratch
P registers, which in turn better matches the Blackfin instruction set,
which reduces the size of U-Boot by more than 1024 bytes...
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
David Brownell [Sun, 30 Aug 2009 18:05:29 +0000 (11:05 -0700)]
bugfix CONFIG_SYS_CONSOLE_INFO_QUIET
The "console: unify printing current devices" patch goofed:
CONFIG_SYS_CONSOLE_INFO_QUIET is supposed to *REMOVE* boot
time noise, not add it. Said patch changed the #ifndefs
to #ifdef; this one restores them to the proper sense.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Timur Tabi [Fri, 28 Aug 2009 21:56:45 +0000 (16:56 -0500)]
fsl: simplify the "mac id" command, improve boot-time informational message
The "mac id" command took a 4-character parameter as the identifier string.
However, for any given board, only one kind of identifier is acceptable, so it
makes no sense to ask the user to type it in. Instead, if the user enters
"mac id", the identifier (and also the version, if it's NXID) will
automatically be set to the correct value.
Improve the message that is displayed when EEPROM is read during boot. It now
displays "EEPROM:" and then either an error message or the EEPROM identifier
if successful.
If the identifier in EEPROM is valid, then always reject a bad CRC, even if the
CRC field has not been initialized.
Don't force the MAC address count to MAX_NUM_PORTS or less. Forcing the value
to be changed resulting in an in-memory copy that does not match what's in
hardware, even though the user did not request that change.
Finally, always update the CRC value in the in-memory copy after any field
is changed, so that the CRC is always correct.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Fri, 21 Aug 2009 01:59:42 +0000 (07:29 +0530)]
driver/fsl_pci: Add fsl_pci_init_port function to initialize a PCI controller
fsl_pci_init_port can be called from board specific PCI initialization
routines to setup the PCI (or PCIe) controller. This will reduce code
redundancy in most of the 85xx/86xx FSL board ports that setup PCI.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Thu, 20 Aug 2009 22:41:11 +0000 (17:41 -0500)]
85xx: Improve MPIC initialization
The MPIC initialization code for Freescale e500 CPUs was not using I/O
accessors, and it was not issuing a read-back to the MPIC after setting
mixed mode. This may be the cause of a spurious interrupt on some systems.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Felix Radensky [Sat, 15 Aug 2009 12:08:37 +0000 (15:08 +0300)]
85xx: Fix memory test range on MPC8536DS
With current values of CONFIG_SYS_MEMTEST_START and CONFIG_SYS_MEMTEST_END
memory test hangs if run without arguments. Set them to sane values, so
that all available 512MB of RAM excluding exception vectors at the bottom
and u-boot code and stack at the top can be tested.
Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 7 Aug 2009 18:00:55 +0000 (13:00 -0500)]
85xx: Move to a common linker script
There are really no differences between all the 85xx linker scripts so
we can just move to a single common one. Board code is still able to
override the common one if need be.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
P1020 is another member of QorIQ series of processors which falls in ULE
category. It is an e500 based dual core SOC.
Being a scaled down version of P2020 it has following differences:
- 533MHz - 800MHz core frequency.
- 256Kbyte L2 cache
- Ethernet controllers with classification capabilities.
Also the SOC is pin compatible with P2020
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Wed, 5 Aug 2009 07:59:24 +0000 (13:29 +0530)]
85xx: Add support for P2020RDB board
The code base adds P1 & P2 RDB platforms support.
The folder and file names can cater to future SOCs of P1/P2 family.
P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series.
Tested following on P2020RDB:
1. eTSECs
2. DDR, NAND, NOR, I2C.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The number of CPUs are getting detected dynamically by checking the
processor SVR value. Also removed CONFIG_NUM_CPUS references from all
the platforms with 85xx/86xx processors.
This can help to use the same u-boot image across the platforms.
Also revamped and corrected few Freescale Copyright messages.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Wed, 5 Aug 2009 12:59:35 +0000 (07:59 -0500)]
pci/fsl_pci_init: Rework PCI ATMU setup to handle >4G of memory
The old PCI ATMU setup code would just mimic the PCI regions into the
ATMU registers. For simple memory maps in which all memory, MMIO, etc
space fit into 4G this works ok. However there are issues with we have
>4G of memory as we know can't access all of memory and we need to
ensure that PCICSRBAR (PEXCSRBAR on PCIe) isn't overlapping with
anything since we can't turn it off.
We first setup outbound windows based on what the board code setup
in the pci regions for MMIO and IO access. Next we place PCICSRBAR
below the MMIO window. After which we try to setup the inbound windows
to map as much of memory as possible.
On PCIe based controllers we are able to overmap the ATMU setup since
RX & TX links are separate but report the proper amount of inbound
address space to the region tracking to ensure there is no overlap.
On PCI based controllers we use as many inbound windows as available to
map as much of the memory as possible.
Additionally we changed all the CCSR register access to use proper IO
accessor functions. Also had to add CONFIG_SYS_CCSRBAR_PHYS to some
86xx platforms that didn't have it defined.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Wed, 5 Aug 2009 12:49:27 +0000 (07:49 -0500)]
pci/fsl_pci_init: Use PCIe capability to determine if controller is PCIe
Change the code to use the PCIe capabilities register to determine if we
are a PCIe controller or not. Additionally cleaned up some white space
and formatting in the file.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Tue, 4 Aug 2009 02:02:02 +0000 (21:02 -0500)]
pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init
Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows
before it calls fsl_pci_init. There isn't any reason to just call it
from fsl_pci_init and simplify things a bit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Tue, 4 Aug 2009 01:44:55 +0000 (20:44 -0500)]
pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init
Every platform that calls fsl_pci_init calls pci_setup_indirect before
it calls fsl_pci_init. There isn't any reason to just call it from
fsl_pci_init and simplify things a bit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Also make bootdelay consistent with other boards, so as to give on the
opportunity to fix mistakenly set bootcmd without having checked for an
bootdelay zero setting first.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Sandeep Paulraj [Mon, 10 Aug 2009 17:27:56 +0000 (13:27 -0400)]
MTD:NAND: ADD new ECC mode NAND_ECC_HW_OOB_FIRST
This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to
support 4-bit ECC on TI DaVinci devices with large page (up to 2K) NAND
chips. This ECC mode is similar to NAND_ECC_HW, with the exception of
read_page API that first reads the OOB area, reads the data in chunks,
feeds the ECC from OOB area to the ECC hw engine and perform any
correction on the data as per the ECC status reported by the engine.
This patch has been accepted by Andrew Morton and can be found at
Ilya Yanok [Mon, 10 Aug 2009 22:32:54 +0000 (02:32 +0400)]
mxc_nand: add nand driver for MX2/MX3
Driver for NFC NAND controller found on Freescale's MX2 and MX3
processors. Ported from Linux. Tested only with i.MX27 but should
works with other MX2 and MX3 processors too.
Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Sandeep Paulraj [Mon, 10 Aug 2009 17:27:46 +0000 (13:27 -0400)]
NAND: ADD page Parameter to all read_page/read_page_raw API's
This patch adds a new "page" parameter to all NAND read_page/read_page_raw
APIs. The read_page API for the new mode ECC_HW_OOB_FIRST requires the
page information to send the READOOB command and read the OOB area before
the data area.
This patch has been accepted by Andrew Morton and can be found at
http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-page-parameter-to-all-read_page-read_page_raw-apis.patch
WE would like this to become part of the u-boot GIT as well
Change %08lX to %08X in board.c. Remove unused variable
'oscillator' in mcf5227x/cpu_init.c and 'scm2' in
mcf532x/cpu_init.c. Provide argument type cast in
drivers/dma/MCD_dmaApi.c.
ColdFire: Fix missing _IO_BASE which caused compile error
The compile error was caused by a recent patch. Affected platforms -
M5253DEMO.h, M5253EVBE.h, and M54455EVB.h. Adding the _IO_BASE
automatically defined to 0 in asm-m68k/io.h if it isn't set in
platform configuration file.
Kim Phillips [Mon, 24 Aug 2009 19:32:26 +0000 (14:32 -0500)]
net: tsec - handle user interrupt while waiting for PHY auto negotiation to complete
if you don't have firmware installed for the PHY to come to life, this
wait can be painful - let's give the option to avoid it if we want.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Robin Getz [Thu, 20 Aug 2009 14:50:20 +0000 (10:50 -0400)]
Add Transfer Size Option to tftp
Optionally add RFC 2349 "Transfer Size Option", so we can minimize the
time spent sending data over the UART (now print a single line during a
tftp transfer).
- If turned on (CONFIG_TFTP_TSIZE), U-Boot asks for the size of the file.
- if receives the file size, a single line (50 chars) are printed.
one hash mark == 2% of the file downloaded.
- if it doesn't receive the file size (the server doesn't support RFC
2349, prints standard hash marks (one mark for each UDP frame).
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Ben Warren [Tue, 25 Aug 2009 20:09:37 +0000 (13:09 -0700)]
Convert CS8900 Ethernet driver to CONFIG_NET_MULTI API
All in-tree boards that use this controller have CONFIG_NET_MULTI added
Also:
- changed CONFIG_DRIVER_CS8900 to CONFIG_CS8900
- changed CS8900_BASE to CONFIG_CS8900_BASE
- changed CS8900_BUS?? to CONFIG_CS8900_BUS??
- cleaned up line lengths
- modified VCMA9 command function that accesses the device
- removed MAC address initialization from lib_arm/board.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
To take advantage of defragmented packets, the config file
can define CONFIG_NFS_READ_SIZE to override the 1kB default.
No support is there for an environment variable by now.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
projects / u-boot / log