Hans de Goede [Tue, 22 Mar 2016 19:10:30 +0000 (20:10 +0100)]
sunxi: Turn satapwr on from board_init
There are 2 reasons for doing this:
1) The main reason for doing this is to move it outside of
board/sunxi/ahci.c, so that it can be used on boards which use
a usb<->sata chip too;
2) While doing this I realized that doing it from board_init also meant
doing it much earlier. Some printf get_timer(0) calls show that the
time between board_init() and scsi_init() is more then 600 ms,
so we can drop the mdelay(500)
While at it also drop the printf("SUNXI SCSI INIT\n") AHCI init is
noisy enough by itself.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Thu, 17 Mar 2016 12:53:03 +0000 (13:53 +0100)]
sunxi: Fix gmac not working due to cpu_eth_init no longer being called
cpu_eth_init is no longer called for dm enabled eth drivers, this
was causing the sunxi gmac eth controller to no longer work in u-boot.
This commit fixes this by calling the clock, reset and pinmux setup
function from s_init() and enabling the phy power pin (if any) from
board_init().
The enabling of phy power cannot be done from s_init because it uses dm
and dm is not ready yet at this point.
Note that the mdelay is dropped as the phy gets enabled much earlier
now, so it is no longer needed.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Tested-by: Karsten Merker <merker@debian.org> Tested-by: Michael Haas <haas@computerlinguist.org>
Hans de Goede [Mon, 21 Mar 2016 13:44:35 +0000 (14:44 +0100)]
sunxi: Fix 2nd usb controller on sun4i/sun7i no longer working
The 2nd usb controller on sun4i/sun7i has its base address 0x8000
bytes from the 1st one, rather then 0x1000. Also the ahb clk gates
are interleaved with the ohci clk-gates introducing a hole between
the clks for usb1 and usb2.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Fri, 18 Mar 2016 07:43:04 +0000 (08:43 +0100)]
sunxi: Add a bunch of missing compatible strings to sunxi_gpio.c
The kernel has different compatible strings for the pio block
because the pin-muxing is different on all the different SoCs,
but sunxi_gpio.c only support the basic gpio functionality, which
is identical everywhere. Add the missing compatible strings for
various SoC models.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Alex Kaplan [Mon, 7 Mar 2016 12:50:20 +0000 (13:50 +0100)]
sunxi: Enable composite video out on the CHIP
The CHIP has a composite video output in the mini-Jack connector, alongside
with the 2 audio channels. Enable this output in U-Boot.
Signed-off-by: Alex Kaplan <kaplan2539@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Boris Brezillon [Mon, 7 Mar 2016 12:44:11 +0000 (13:44 +0100)]
sunxi: Fix DCDC2 output in CHIP_defconfig
Unlike the datasheet recommendation, the R8 SoC requires a 1.4V supply
for its CPU when operating at 1Ghz.
Rely on the default value specified in the Kconfig entry.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Lawrence Yu [Fri, 4 Mar 2016 17:08:56 +0000 (09:08 -0800)]
sunxi: Configure only LVDS pins instead of all LCD pins when LVDS interface selected
The behavior before this patch would attempt to configure the mux
setting for pins 0 to 27 on PORTD to all be setting 3 for LVDS. The
LVDS interface actually only uses pins 18 to 27 and not pins 0 to 27
as in the parallel LCD interface. This patch restricts the
configuration to only the relevant pins 18 to 27 on PORTD.
This was tested on a sun8i A33 tablet with an LVDS screen. MMC1 has
the capability to use pins 2 to 7 on PORTD and the mux on those pins
was being inadvertently set to setting 3 for MMC functionality which
this patch corrects.
Signed-off-by: Lawrence Yu <lyu@micile.com>
[hdegoede@redhat.com: Only apply this change to A23 / A33] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Wed, 23 Mar 2016 08:59:23 +0000 (09:59 +0100)]
sunxi: Add defconfig and dts for Orange Pi 2 SBC
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
The added dts file is identical to the one submitted to the upstream
kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Chen-Yu Tsai [Mon, 21 Mar 2016 08:39:07 +0000 (16:39 +0800)]
sunxi: Add defconfig for Sinlinx SinA31s
The Sinlinx A31s SDK is a A31s based module/baseboard development kit.
The core module has the SoC, PMIC, DRAM, eMMC and supporting components.
There are also pads for UART0, JTAG and I2S.
The baseboard has 100 Mbps Ethernet, 5x USB 2.0 host ports via a USB 2.0
hub chip, MMC, HDMI, SPDIF, CIR, audio jacks, 2 tablet-like volume
buttons, RS232 style UART and USB OTG (though VBUS is not connected).
Various headers are available for other addon modules, such as SDIO
WiFi, LCD display, camera sensor, UARTs, I2C, SPI and GPIOs.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Marcus Cooper [Tue, 15 Mar 2016 17:47:39 +0000 (18:47 +0100)]
sun7i: Add defconfig for the Itead Ibox
Add defconfig for the multi board device based on the
Allwinner A20 SoC. It contains the A20 Itead Core module and a
base board for the external interfaces.
The core module comes with 4GB NAND and 1GB DDR RAM.
The base board to which the core board is connected provides
3 USB 2.0 Host ports, 1 USB 2.0 OTG, 1 uSD slot, 10/100 Ethernet
port, HDMI, IR receiver, SPDIF and a 32-pin GPIO header. This
header expands the features of core board by exposing the VGA pins,
audio In/Out pins, SATA, SPI, I2C, UARTS, USB-OTG and power..
Signed-off-by: Marcus Cooper <codekipper@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Wed, 27 Jan 2016 08:34:44 +0000 (16:34 +0800)]
sunxi: Add defconfig for Cubietruck Plus
Cubietruck Plus is a A83T/H8 based development board. The board has
standard DDR3 SDRAM, AXP818 PMIC/codec, SD/MMC, eMMC, USB 2.0 host
via HSIC USB Hub, USB OTG, SATA via USB bridge, gigabit ethernet,
WiFi, headphone out / mic in, and various GPIO headers.
The board also has an EEPROM on i2c0 which holds the MAC address.
DLDO3 and DLDO4 provide power to the EMAC pins and PHY. Pin PA20
is connected to the reset control of the PHY. EMAC is not actually
supported yet.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Mon, 14 Mar 2016 16:35:12 +0000 (17:35 +0100)]
sunxi: Add defconfig and dts for the Polaroid MID2809PXE4 tablet
The Polaroid MID2809PXE4 is a 9" tablet which is clearly marked
Polaroid MID2809PXE4 on the back. It features a 9" 16:9 800x480 LCD,
A23 Soc, 1GB RAM, 8GB NAND, gsl3670 touchscreen and esp8089 wifi.
The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Thu, 10 Mar 2016 21:35:56 +0000 (22:35 +0100)]
sunxi: Add defconfig and dts for Difrence DIT4350 tablet
The Difrnce dit4350 tablet is a tiny tablet with a 4.3" 16:9 480x272 LCD,
A13 SoC, 512M RAM, 4G NAND, solomon systech ssd2532qn6 touchscreen at
i2c1 address 0x48, Memsic MXC622X accelerometer at i2c1 address 0x15 and
rtl8188etv wifi.
The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Wed, 9 Mar 2016 21:45:23 +0000 (22:45 +0100)]
sunxi: Add defconfig and dts for colorfly e708 q1 tablet
The colorfly e708 q1 is a 7" tablet which is clearly marked as colorfly
e708 q1 on the back. It features a 9:16 800x1280 IPS LCD, A31s SoC,
1GB RAM, 8G NAND, ilitek 2139qt004 touchscreen on i2c-1 addr 0x41,
stk8313 accelerometer on i2c-2 addr 0x22 and a rtl8188etv wifi chip.
The added dts is identical to the dts submitted to the upstream kernel,
note this commit also syncs axp22x.dtsi and sun6i-a31.dtsi with the
upstream kernel as the added dts depends on these.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Wed, 16 Mar 2016 19:57:28 +0000 (20:57 +0100)]
sunxi: Fix clock_twi_onoff for sun8i-a83
clock_sun8i_a83.c did not contain a clock_twi_onoff implementation
at all, this is fixed by moving the clock_sun6i.c implementation,
which is correct for the a83 too, to a shared location.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Note this adds a number of new unused board dts files. I've asked the
authors of the kernel commits adding these to submit a matching defconfig
to u-boot.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Wed, 16 Mar 2016 12:41:23 +0000 (13:41 +0100)]
include/dt-bindings: Sync some files with the kernel
This commit syncs the dt-bindings/input/* headers with the kernel (v4.5)
and adds dt-bindings/clock/sun4i-a10-pll2.h, both are necessary for newer
sunxi dts files to build.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Fri, 4 Mar 2016 09:57:34 +0000 (10:57 +0100)]
sunxi: A23: Fix some revisions needing a different magic sram poke
I've had this one a23 tablet which would not boot and I've finally
figured out what the problem is by looking at the released boot0 code,
it seems the magic sram controller poke which we need to do in s_init()
depends on the revision of the a23.
Specifically this change is needed to get the A23 SoC I have with the
following serial to boot: "E6071AB 26Y7".
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Bin Meng [Mon, 21 Mar 2016 13:47:41 +0000 (06:47 -0700)]
net: Move CONFIG_RTL8139 to Kconfig
Introduce CONFIG_RTL8139 in Kconfig and move over boards' defconfig
to use that.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
[trini: Fixup MPC8641HPCN* and r2dplus configs] Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 15 Mar 2016 16:49:12 +0000 (12:49 -0400)]
cmd: Fix license command
The license command isn't usually built and has a few problems:
- The rules to generate license.h haven't worked in a long time,
re-write these based on the bmp_logo.h rules.
- 'tok' is unused and the license text size has increased
- bin2header.c wasn't grabbing unistd.h to know the prototype for
read().
Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Eric Anholt [Mon, 14 Mar 2016 01:16:54 +0000 (18:16 -0700)]
serial: pl01x: Add support for devices with the rate pre-configured.
For Raspberry Pi, we had the input clock rate to the pl011 fixed in
the rpi.c file, but it may be changed by firmware due to user changes
to config.txt. Since the firmware always sets up the uart (default
115200 output unless the user changes it), we can just skip our own
uart init to simplify the boot process and more reliably get serial
output.
Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Simon Glass [Mon, 14 Mar 2016 01:07:35 +0000 (19:07 -0600)]
Drop various features when the command line is not available
Some features are only useful or meaningful when the command line is
present. Ensure that these features are not compiled in when CONFIG_CMDLINE
is not enabled.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Mon, 14 Mar 2016 01:07:33 +0000 (19:07 -0600)]
Allow command code to compile to nothing
When CONFIG_CMDLINE is disabled we need to remove all the command-line
code. Most can be removed by dropping the appropriate linker lists from the
images, but sub-commands must be dealt with specially.
A simple mechanism is used to avoid 'unused static function' errors.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
driver: net: fsl-mc: Return from DPAA_exit if boot_status !=0
Return value of get_mc_boot_status() in case of failure is not necessary
to be -1.
So update the error condition check.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reported-by: Yao Yuan <yao.yuan@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
Alison Wang [Tue, 8 Mar 2016 03:59:59 +0000 (11:59 +0800)]
arm: ls102xa: Enable CONFIG_SYS_CONSOLE_IS_IN_ENV support
CONFIG_SYS_CONSOLE_IS_IN_ENV needs to be enabled, so we could set stdout
environment variable to specify the vga for the console output when
LCD/HDMI is connected to the boards.
Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Yangbo Lu [Tue, 16 Feb 2016 02:54:41 +0000 (10:54 +0800)]
armv8/fsl-lsch2: fix sdhc clock frequency value
The eSDHC could select to use platform clock or peripheral clock to
generate SD clock. The default selection is platform clock. So, fix
the clock frequency value that's calculated for eSDHC.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
armv8: fsl-layerscape: Updating entries in Serdes Table
The serdes protocol entries in Serdes table 1 for protocol
0x03, 0x33, 0x35 and in Serdes table 2 for protocols 0x45
and 0x47 are updated to reflect the entries in
current Reference Manual.
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Reported-by: Jose Rivera <german.rivera@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Shengzhou Liu [Thu, 10 Mar 2016 09:36:56 +0000 (17:36 +0800)]
driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discrete
Add support of address parity for DDR4 UDIMM or discrete memory.
It requires to configurate corresponding MR5[2:0] and
TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig,
e.g. hwconfig=fsl_ddr:parity=on.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Stuart Yoder [Thu, 10 Mar 2016 16:52:30 +0000 (10:52 -0600)]
pci/layerscape: set LUT and msi-map for discovered PCI devices
msi-map properties are used to tell an OS how PCI requester IDs are
mapped to ARM SMMU stream IDs.
for all PCI devices discovered in a system:
-allocate a LUT (look-up-table) entry in that PCI controller
-allocate a stream ID for the device
-program and enable a LUT entry (maps PCI requester id to stream ID)
-set the msi-map property on the controller reflecting the
LUT mapping
basic bus scanning loop/logic was taken from drivers/pci/pci.c
pci_hose_scan_bus().
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Stuart Yoder [Thu, 10 Mar 2016 16:52:07 +0000 (10:52 -0600)]
armv8: ls2080a: update stream ID partitioning info
Update comments around how stream IDs are partitioned.
Stream IDs allocated to PCI are no longer divided up by
controller, but are instead a contiguous range
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Stuart Yoder [Thu, 10 Mar 2016 16:52:01 +0000 (10:52 -0600)]
armv8: ls2080a: remove obsolete stream ID partitioning support
Remove stream ID partitioning support that has been made
obsolete by upstream device tree bindings that specify how
representing how PCI requester IDs are mapped to MSI specifiers
and SMMU stream IDs.
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Aneesh Bansal [Mon, 15 Feb 2016 09:42:57 +0000 (15:12 +0530)]
drivers/crypto/fsl: define structures for PDB
Structures are defined for PDB (Protocol Data Blcks) for various
operations. These structure will be used to add PDB data while
creating the PDB descriptors.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> CC: Ulises Cardenas <raul.casas@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Aneesh Bansal [Thu, 11 Feb 2016 09:06:51 +0000 (14:36 +0530)]
drivers/crypto/fsl: correct error checking in run_descriptor
When CAAM runs a descriptor and an error occurs, a non-zero
value is set in Output Status Register. The if condition should
check the status for a non-zero value.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Shaohui Xie [Thu, 28 Jan 2016 07:38:15 +0000 (15:38 +0800)]
armv8: ls2080ardb: invert irq pins polarity for AQR405 PHY
To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins
polarity by setting IRQCR register, because AQR405 interrupt is low
active but GIC accepts high active.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Alexander Graf [Mon, 21 Mar 2016 19:26:12 +0000 (20:26 +0100)]
arm64: Fix layerscape mmu setup
With commit 7985cdf we converted all systems except for the Layerscape
SoCs to the generic descriptor table based page table setup.
On the Layerscape SoCs however, we just provide an empty table stub
and do the setup ourselves. To reserve enough memory for the tables,
we need to override the default counting mechanism which would end up
with an empty table because we have no maps.
Fixes: 7985cdf Reported-by: York Sun <york.sun@nxp.com> CC: Alison Wang <alison.wang@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: York Sun <york.sun@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
This patch makes the following changes to the SR1500 board port:
- Update defconfig to support SPI NOR (use make savedefconfig).
- Increase SPI speed to a maximum of 100MHz for faster system
bootup.
- Change environment location, so that its not between SPL and
main U-Boot. This way the combined SPL / U-Boot image can
be used for updates.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Feb 2016 18:11:30 +0000 (19:11 +0100)]
arm: socfpga: Fix SR1500 env position
Move the inclusion of the common socfpga configuration file further
down in the sr1500 configuration, so that the socfpga_common.h can
check if environment is in SPI NOR and it's location is defined and
if it is not, define default location.
This fixes "arm: socfpga: Enabling U-Boot environment support in QSPI"
which introduced a minor warning.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
Ted Chen [Fri, 18 Mar 2016 07:26:52 +0000 (17:56 +1030)]
usb: xhci: Fix vendor command error if the request type is USB_REQ_SET_ADDRESS or USB_REQ_SET_CONFIGURATION.
Add test into xhci_submit_control_message for usb requesttype in USB
vendor request being of standardized type. This fixes detection of
certain USB fixes, for example Ethernet, USB 3.0 port. Non standardized
requesttype in USB vendor request will be ignored.
Stefan Roese [Tue, 15 Mar 2016 12:59:15 +0000 (13:59 +0100)]
usb: Change power-on / scanning timeout handling
This patch changes the USB port scanning procedure and timeout
handling in the following ways:
a)
The power-on delay in usb_hub_power_on() is now reduced to a value of
max(100ms, "hub->desc.bPwrOn2PwrGood * 2"). The code does not wait
using mdelay, instead usb_hub_power_on() will wait before querying
the device in the scanning loop later. The total timeout for this
hub, which is 1 second + "hub->desc.bPwrOn2PwrGood * 2" is calculated
and will be used in the following per-port scanning loop as the timeout
to detect active USB devices on this hub.
b)
Don't delay the minimum delay (for power to stabilize) in
usb_hub_power_on(). Instead skip querying these devices in the scannig
loop until the delay time is reached.
c)
The ports are now scanned in a quasi parallel way. The current code did
wait for each (unconnected) port to reach its timeout and only then
continue with the next port. This patch now changes this to scan all
ports of all USB hubs quasi simultaneously. For this, all ports are added
to a scanning list. This list is scanned until all ports are ready
by either a) reaching the connection timeout (calculated earlier), or
by b) detecting a USB device. This results in a faster USB scan time as
the recursive scanning of USB hubs connected to the hub that's currently
being scanned will start earlier.
One small functional change to the original code is, that ports with
overcurrent detection will now get rescanned multiple times
(PORT_OVERCURRENT_MAX_SCAN_COUNT).
Without this patch:
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found
time: 20.163 seconds
With this patch:
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found
time: 1.822 seconds
So ~18.3 seconds of USB scanning time reduction.
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Stephen Warren <swarren@nvidia.com>
Stefan Roese [Tue, 15 Mar 2016 12:59:14 +0000 (13:59 +0100)]
usb: Don't reset the USB hub a 2nd time
Debugging has shown, that all USB hubs are being reset twice while
USB scanning. This introduces additional delays and makes USB scanning
even more slow. Testing has shown that this 2nd USB hub reset doesn't
seem to be necessary.
This patch now removes this 2nd USB hub reset. Resulting in faster USB
scan time. Here the current numbers:
Without this patch:
=> time usb start
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found
time: 24.003 seconds
With this patch:
=> time usb start
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found
time: 20.392 seconds
So ~3.6 seconds of USB scanning time reduction.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Stephen Warren <swarren@nvidia.com> Cc: Marek Vasut <marex@denx.de>
Stefan Roese [Tue, 15 Mar 2016 12:59:13 +0000 (13:59 +0100)]
usb: Remove 200 ms delay in usb_hub_port_connect_change()
This patch removes 2 mdelay(200) calls from usb_hub_port_connect_change().
These delays don't seem to be necessary. At least not in my tests. Here
the number for a custom x86 Bay Trail board (not in mainline yet) with
a quite large and complex USB hub infrastructure.
Without this patch:
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found
time: 28.415 seconds
With this patch:
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 9 USB Device(s) found
time: 24.003 seconds
So ~4.5 seconds of USB scanning time reduction.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Stephen Warren <swarren@nvidia.com> Cc: Marek Vasut <marex@denx.de>
Start with a short USB hub reset delay of 20ms. This can be enough for
some configurations.
The 2nd delay at the end of the loop is completely removed. Since the
delay hasn't been long enough, a longer delay time of 200ms is assigned
and will be used in the next loop round.
This hub reset handling is also used in the v4.4 Linux USB driver,
hub_port_reset().
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Stephen Warren <swarren@nvidia.com> Cc: Marek Vasut <marex@denx.de>
projects / u-boot / log