Peng Fan [Tue, 5 Dec 2017 05:20:59 +0000 (13:20 +0800)]
SPL: Add FIT data-position property support
For external data, FIT has a optional property "data-position" which
can set the external data to a fixed offset to FIT beginning.
Add the support for this property in SPL FIT.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tomas Melin <tomas.melin@vaisala.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: "Andrew F. Davis" <afd@ti.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: "tomas.melin@vaisala.com" <tomas.melin@vaisala.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: York Sun <york.sun@nxp.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: "Cooper Jr., Franklin" <fcooper@ti.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Cc: Jean-Jacques Hiblot <jjhiblot@ti.com> Cc: Rick Altherr <raltherr@google.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: York Sun <york.sun@nxp.com>
Adam Ford [Mon, 4 Dec 2017 23:54:50 +0000 (17:54 -0600)]
ARM: omap3_logic: Enable NAND unlocking during Falcon mode
Falcon mode was already working with SD card. This enables the
unlocking of NAND to allow the NAND read & write. This also
expands the README file based on the am335x describing how to
setup Falcon mode.
This symbol enables some library code used by various SATA drivers,
so make this a non-user-visible symbol select'ed by the respective
drivers, and let moveconfig handle the rest.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Alexey Brodkin [Sun, 10 Dec 2017 17:55:44 +0000 (20:55 +0300)]
gpio/hsdk: Depend on DM_GPIO instead of simple DM
This driver really is DM GPIO one and so we need to have a correct
dependency, because DM alone doesn't provide required for CMD_GPIO
call and we're seeing build failures like this:
---------------------->8---------------------
cmd/built-in.o: In function 'do_gpio':
.../cmd/gpio.c:188: undefined reference to 'gpio_request'
...
---------------------->8---------------------
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Eugeniy Paltsev <paltsev@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 6 Dec 2017 05:16:34 +0000 (14:16 +0900)]
ARM: uniphier: use FIELD_PREP for PLL settings
It is tedious to define both mask and bit-shift. <linux/bitfield.h>
provides a convenient way to get access to register fields with a
single shifted mask.
Eugeniy Paltsev [Sun, 10 Dec 2017 18:20:08 +0000 (21:20 +0300)]
ARC: clk: introduce HSDK CGU clock driver
Synopsys HSDK clock controller generates and supplies clocks to various
controllers and peripherals within the SoC.
Each clock has assigned identifier and client device tree nodes can use
this identifier to specify the clock which they consume. All available
clocks are defined as preprocessor macros in the
dt-bindings/clock/snps,hsdk-cgu.h header and can be used in device
tree sources.
dcache_exists, icache_exists, slc_exists and ioc_exists global
variables in "arch/arc/lib/cache.c" remain uninitialized if
SoC doesn't have corresponding HW.
This happens because we use the next constructions for their
definition and initialization:
-------------------------->>---------------------
int ioc_exists __section(".data");
if (/* condition */)
ioc_exists = 1;
-------------------------->>---------------------
That's quite a non-trivial issue as one may think of it.
The point is we intentionally put those variables in ".data" section
so they might survive relocation (remember we initilaize them very early
before relocation and continue to use after reloaction). While being
non-initialized and not explicitly put in .data section they would end-up
in ".bss" section which by definition is filled with zeroes.
But since we place those variables in .data section we need to care
about their proper initialization ourselves.
Also while at it we change their type to "bool" as more appropriate.
Eugeniy Paltsev [Sat, 21 Oct 2017 12:35:12 +0000 (15:35 +0300)]
ARC: HSDK: Fixup DW SDIO CIU frequency to 50000000Hz
DW SDIO controller has external CIU clock divider controlled via
register in the SDIO IP. Due to its unexpected default value
(we expected it to divide by 1 but in reality it divides by 8)
SDIO IP uses wrong CIU clock (it should be 100000000Hz but actual
is 12500000Hz) and works unstable (see STAR 9001204800).
So increase SDIO CIU frequency from actual 12500000Hz to 50000000Hz
by switching from the default divisor value (div-by-8) to the
minimum possible value of the divisor (div-by-2) in HSDK platform
code.
Eugeniy Paltsev [Mon, 16 Oct 2017 12:15:33 +0000 (15:15 +0300)]
ARC: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIO
With CONFIG_CMD_GPIO compilation reports error:
-------------------------->8---------------------
common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory
#include <asm/gpio.h>
^
-------------------------->8---------------------
rockchip: rk3399-puma: preserve leading zeros in serial#
Linux preserves leading zeros in /proc/cpuinfo, so we
should as well.
Otherwise we have the situation that
/sys/firmware/devicetree/base/serial-number
and /proc/cpuinfo disagree in Linux.
Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
York Sun [Thu, 7 Dec 2017 21:16:07 +0000 (13:16 -0800)]
armv8: fix gd after relocation
Commit 21f4486faa5d ("armv8: update gd after relocate") sets x18
without checking the return value of spl_relocate_stack_gd().
Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: York Sun <york.sun@nxp.com> CC: Kever Yang <kever.yang@rock-chips.com> CC: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Mon, 4 Dec 2017 20:48:22 +0000 (13:48 -0700)]
usb: Correct use of debug()
With clang this gives a warning because hubsts appears to be used before
it is set, even if ultimately it is not used. Simplify the code to avoid
this problem.
Simon Glass [Mon, 4 Dec 2017 20:48:21 +0000 (13:48 -0700)]
mtdparts: Correct use of debug()
The debug() macro now evaluates its expression so does not need #ifdef
protection. In fact the current code causes a warning with the new log
implementation. Adjust the code to fix this.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 4 Dec 2017 20:48:19 +0000 (13:48 -0700)]
Revert "sandbox: Drop special case console code for sandbox"
While sandbox works OK without the special-case code, it does result in
console output being stored in the pre-console buffer while sandbox starts
up. If there is a crash or a problem then there is no indication of what
is going on.
For ease of debugging it seems better to revert this change also.
Simon Glass [Mon, 4 Dec 2017 20:48:17 +0000 (13:48 -0700)]
Revert "sandbox: remove os_putc() and os_puts()"
While sandbox works OK without the special-case code, it does result in
console output being stored in the pre-console buffer while sandbox starts
up. If there is a crash or a problem then there is no indication of what
is going on.
For ease of debugging it seems better to revert this change.
Alan Ott [Wed, 29 Nov 2017 03:25:24 +0000 (22:25 -0500)]
i2c: at91_i2c: remove the .probe_chip function
The .probe_chip function is supposed to probe an i2c device on the bus to
determine whether a device is answering to a particular address.
at91_i2c_probe_chip() did not do anything resembling this and always
returned 0.
It looks as though at91_i2c_probe_chip() was intended to be a .probe
function for the controller, as it was copied-and-pasted to become
at91_i2c_probe() in 0bc8f640a4d7ed.
Removing the at91_i2c_probe_chip() function makes the higher layer
(i2c_probe_chip()) try a zero-length read transfer to test for the
presence of a device instead, which does work.
Signed-off-by: Alan Ott <alan@softiron.com> Acked-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de>
Alan Ott [Wed, 29 Nov 2017 03:25:23 +0000 (22:25 -0500)]
i2c: at91_i2c: Wait for TXRDY after sending the first byte
The driver must wait for TXRDY after each byte is pushed into
the i2c FIFO before pushing the next byte. Previously this was
not done for the first byte, causing a race condition with zeros
sometimes being sent for the next byte (which is typically the
first actual data byte).
Signed-off-by: Alan Ott <alan@softiron.com> Reviewed-by: Heiko Schocher <hs@denx.de>
Add fall back option, to boot from NOR/QSPI/SD for LS1043, LS1046,
LS1021 in case of distro boot failure.
For LS1046, add kernel validation in case of secure boot in sd_bootcmd
and qspi_bootcmd. For LS1043 and LS1021, add kernel validation in case
of secure boot in sd_bootcmd, qspi_bootcmdand nor_bootcmd.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
armv8: fsl-layerscape: Add support of disabling core prefetch
Instruction prefetch feature is by default enabled during core
release. This patch add support of disabling instruction prefetch
by setting core mask in PPA. Here each core mask bit represents a
core and prefetch is disabled at the time of core release.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Yogesh Gaur [Wed, 15 Nov 2017 06:29:31 +0000 (11:59 +0530)]
driver: net: fsl-mc: flib changes for MC 10.3.0
Existing MC driver framework is based on MC-9.x.x flib. This patch
migrates MC obj (DPBP, DPNI, DPRC, DPMAC etc) to use latest MC flib
which is MC-10.3.0.
Changes introduced due to migration:
1. To get OBJ token, pair of create and open API replaces create APIs
2. Pair of close and destroy APIs replaces destroy APIs
3. For version read, get_version APIs replaces get_attributes APIs
4. dpni_get/reset_statistics APIs replaces dpni_get/set_counter APIs
5. Simplifies struct dpni_cfg and removes dpni_extended_cfg struct
6. Single API dpni_get_buffer_layout/set_buffer_layout replaces
dpni_get_rx/set_rx, tx related, tx_conf_buffer_layout related APIs.
New API takes a queue type as an argument.
7. Similarly dpni_get_queue/set_queue replaces
dpni_get_rx_flow/set_rx_flow , tx_flow related, tx_conf related
APIs
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Ashish Kumar [Thu, 23 Nov 2017 09:03:49 +0000 (14:33 +0530)]
armv8: ls1088a: Unset USE_BOOTCOMMAND in defconfig
Unset USE_BOOTCOMMAND for all ls1088 defconfig files to fix
redefinition error. USE_BOOTCOMMAND was introduced in commit b6251db8c3f ("Kconfig: Introduce USE_BOOTCOMMAND and migrate
BOOTCOMMAND").
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
York Sun [Tue, 5 Dec 2017 18:57:54 +0000 (10:57 -0800)]
powerpc: mpc85xx: Fix static TLB table for SDRAM
Most predefined TLB tables don't have memory coherence bit set for
SDRAM. This wasn't an issue before invalidate_dcache_range() function
was enabled. Without the coherence bit, dcache invalidation doesn't
automatically flush the cache. The coherence bit is already set when
dynamic TLB table is used. For some boards with different SPL boot
method, or with legacy fixed setting, this bit needs to be set in
TLB files.
Ran Wang [Mon, 27 Nov 2017 02:51:55 +0000 (10:51 +0800)]
powerpc/p1_p2_rdb_pc: Fix endian access issue on EHCI intinalization
This issue is exposed after commit 9000eddbae0d ("drivers/usb/ehci:
Use platform-specific accessors"), the wrong endianness of EHCI
controller programing will cause USB function down.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 27 Nov 2017 02:51:54 +0000 (10:51 +0800)]
powerpc/T104xRDB: Fix endian access issue on EHCI intinalization
This issue is exposed after commit 9000eddbae0d ("drivers/usb/ehci:
Use platform-specific accessors"), the wrong endianness of EHCI
controller programing will cause USB function down.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Philipp Tomsich [Mon, 4 Dec 2017 16:04:02 +0000 (17:04 +0100)]
tools: omapimage: fix corner-case in byteswap path
Since commit 2614a208471e ("common: command: tempory buffer should
have size of command line buf"), there have been consistent Travis CI
failures on my builds (interestingly not for Tom, even though building
the same commit id) due to a SEGV in building the byteswapped
omapimage:
arm: pcm051_rev3
make[2]: *** [MLO.byteswap] Error 139
^^^ error code for a SEGV
Turns out that the word-based byte-swapping loop in omapimage.c is to
blame. With the loop condition
while (swapped <= (sbuf->st_size / sizeof(uint32_t)))
there had been one-too-many iterations for all file sizes divisible by
the sizeof(uint32_t). I.e. we had 1 iteration for 0 bytes (and also 1
through 3 bytes) and 2 iterations at 4 bytes... clearly overshooting
on 0 and 4 bytes.
This commit fixes the calculation of an up-rounded word-count and
makes sure to keep the zero-based loop-counter below the number of
words to be processed.
References: 2614a20 ("common: command: tempory buffer should have size of command line buf") Fixes: 79b9ebb ("omapimage: Add support for byteswapped SPI images") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Martin Elshuber <martin.elshuber@theobroma-systems.com>
Alexander Graf [Mon, 4 Dec 2017 15:33:51 +0000 (16:33 +0100)]
efi_stub: Use efi_uintn_t
Commit f5a2a93892f ("efi_loader: consistently use efi_uintn_t in boot
services") changed the internal EFI API header without adapting its existing
EFI stub users. Let's adapt the EFI stub as well.
Fixes: f5a2a93892f ("efi_loader: consistently use efi_uintn_t in boot services") Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Peng Fan [Thu, 30 Nov 2017 02:07:07 +0000 (10:07 +0800)]
scripts: spl: fix typo
Typo fix: CONIFG->CONFIG
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Derald D. Woods [Wed, 29 Nov 2017 03:28:55 +0000 (03:28 +0000)]
omap3: evm: Explicitly use DISTRO_DEFAULTS features at startup
[primary] Check MMC 0:1 for /extlinux/extlinux.conf and boot
[fallback 1] Check MMC 0:1 zImage and run mmcbootz
[fallback 2] Check MMC 0:1 uImage and run mmcboot
[fallback 3] Check NAND partitions and run nandboot
If 'extlinux.conf' is not found on MMC 0, the previous boot behavior is
followed.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Neil Armstrong [Mon, 27 Nov 2017 09:35:46 +0000 (10:35 +0100)]
ARM: arch-meson: build memory banks using reported memory from registers
As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware
and a secondary BL32 firmware.
Since mid-2017, the reserved memory address of the BL31 firmware was moved
and grown for security reasons.
But mainline U-Boot and Linux has the old address and size fixed.
These SoCs have a register interface to get the two firmware reserved
memory start and sizes.
This patch adds a dynamic reservation of the memory zones in the device tree bootmem
reserved memory zone used by the kernel in early boot.
To be complete, the memory zones are also added to the EFI reserved zones.
Depends on patchset "Add support for Amlogic GXL Based SBCs" at [2].
Changes since v1:
- switched the #if to if(IS_ENABLED()) to compile all code paths
- renamed function to meson_board_add_reserved_memory()
- added a mem.h header with comment
- updated all boards ft_board_setup()
Changes since RFC v2:
- reduced preprocessor load
- kept Odroid-C2 static memory mapping as exception
Changes since RFC v1:
- switch to fdt rsv mem table and efi reserve memory
- replaced in_le32 by readl()
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[trini: Fix warning on khadas-vim over missing <asm/arch/mem.h> Signed-off-by: Tom Rini <trini@konsulko.com>
Andre Przywara [Mon, 27 Nov 2017 00:47:09 +0000 (00:47 +0000)]
armv8: shrink exception table code
In the moment our exception entry code needs 34 instructions, so we
can't use put it directly into the table entry, which offers "only"
32 instructions there. Right now we just put an unconditional branch
there, then use a macro to place the 34 instructions *per entry* after
that. That effectivly doubles the size of our exception table, which
is quite a waste, given that we use it mostly for debugging purposes.
Since the register saving part is actually identical, let's just convert
that macro into a function, and "bl" into it directly from the exception
slot, of course after having saved at least the original LR.
This saves us about 950 bytes of code, which is quite a relief for some
tight SPLs, in particular the 64-bit Allwinner ones.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Simon Glass [Sat, 25 Nov 2017 18:57:33 +0000 (11:57 -0700)]
test: compression: Convert to unit test framework
Adjust this test to use the unit test framework. Drop the two existing
commands for running the tests and replace them with a single
'ut compression' command, with sub-commands.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Continue to have ret = run_test_internal(...) in run_test so ret
is always initialized] Signed-off-by: Tom Rini <trini@konsulko.com>
We are planning to share more code between different NAND based
devices (SPI NAND, OneNAND and raw NANDs), but before doing that
we need to move the existing include/linux/mtd/nand.h file into
include/linux/mtd/rawnand.h so we can later create a nand.h header
containing all common structure and function prototypes.
projects / u-boot / log