Bryan O'Donoghue [Fri, 26 Jan 2018 16:27:58 +0000 (16:27 +0000)]
imx: mx7: run sec_init for CAAM RNG
This patch adds a sec_init call into arch_misc_init(). Doing so in
conjunction with the patch "drivers/crypto/fsl: assign job-rings to
non-TrustZone" enables use of the CAAM in Linux when OPTEE/TrustZone is
active.
u-boot will initialise the RNG and assign ownership of the job-ring
registers to a non-TrustZone context. With recent changes by Lukas Auer to
fully initialize the RNG in sec_init() this means that u-boot will hand-off
the CAAM in a state that Linux then can use the CAAM without touching the
reserved DECO registers.
This change is safe both for the OPTEE/TrustZone boot path and the regular
non-OPTEE/TrustZone boot path.
Bryan O'Donoghue [Fri, 26 Jan 2018 16:27:14 +0000 (16:27 +0000)]
drivers/crypto/fsl: assign job-rings to non-TrustZone
After enabling TrustZone various parts of the CAAM silicon become
inaccessible to non TrustZone contexts. The job-ring registers are designed
to allow non TrustZone contexts like Linux to still submit jobs to CAAM
even after TrustZone has been enabled.
The default job-ring permissions after the BootROM look like this for
job-ring zero.
ms=0x00008001 ls=0x00008001
The MS field is JRaMIDR_MS (job ring MID most significant).
Referring to "Security Reference Manual for i.MX 7Dual and 7Solo
Applications Processors, Rev. 0, 03/2017" section 8.10.4 we see that
JROWN_NS controls whether or not a job-ring is accessible from non
TrustZone.
Bit 15 (TrustZone) is the logical inverse of bit 3 hence the above value of
0x8001 shows that JROWN_NS=0 and TrustZone=1.
Clearly then as soon as TrustZone becomes active the job-ring registers are
no longer accessible from Linux, which is not what we want.
This patch explicitly sets all job-ring registers to JROWN_NS=1 (non
TrustZone) by default and to the Non-Secure MID 001. Both settings are
required to successfully assign a job-ring to non-secure mode. If a piece
of TrustZone firmware requires ownership of job-ring registers it can unset
the JROWN_NS bit itself.
This patch in conjunction with a modification of the Linux kernel to skip
HWRNG initialisation makes CAAM usable to Linux with TrustZone enabled.
Fabio Estevam [Sun, 28 Jan 2018 14:49:02 +0000 (12:49 -0200)]
mx6sabre_common: Allow building CONFIG_USB_FUNCTION_MASS_STORAGE
Selecting CONFIG_USB_FUNCTION_MASS_STORAGE=y in the defconfig leads to
the following error:
cmd/built-in.o: In function `do_usb_mass_storage':
cmd/usb_mass_storage.c:217: undefined reference to `fsg_main_thread'
cmd/usb_mass_storage.c:170: undefined reference to `fsg_init'
CONFIG_USB_FUNCTION_MASS_STORAGE option is built only for
the non-SPL case as per the logic in drivers/usb/gadget/Makefile,
so remove the incorrect CONFIG_SPL ifdefery to fix the build
failure.
As reported by this application note:
https://www.nxp.com/docs/en/application-note/AN5078.pdf
The software input on (SION) bit is an option to force an input
path to be active regardless of the value driven by the
corresponding module. It is used when the nature direction
of a pin depending on selected alternative function is an output,
but it is needed to read the real logic value on a pin.
The SION bit can be used in:
• Loopback: the module of a selected alternative function drives
the pad and also receives the pad value as an input
• GPIO capture: the module of a selected alternative function
drives the pin and the value is captured by the GPIO
SION bit is not necessary when the pin is configured as a peripheral
apart specific silicon bug. If an application needs to have this
set, this should be done in board file or in dts file
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Peng Fan [Sun, 21 Jan 2018 11:00:24 +0000 (19:00 +0800)]
mmc: fsl_esdhc: support SDR104 and HS200
Introduce SDR104 and HS200 support
The implementation takes linux kernel sdhci.c and sdhci-esdhc-imx.c
as reference.
- Implement esdhc_change_pinstate to dynamically change pad settings
- Implement esdhc_set_timing
- Implement esdhc_set_voltage to switch voltage
- Implement fsl_esdhc_execute_tuning to execute time process
- Enlarge the cfg->f_max to 200MHz.
- Parse fsl,tuning-step, fsl,tuning-start-tap and
fsl,strobe-dll-delay-target from device tree.
- Parse no-1-8-v property
- Introduce esdhc_soc_data to indicate the flags and caps
Peng Fan [Sun, 21 Jan 2018 11:00:23 +0000 (19:00 +0800)]
ARM: dts: add pinmux and tuning settings for HS200/SDR104
The pinmux and tuning settings are from
https://source.codeaurora.org/external/imx/linux-imx/tree/arch/
arm/boot/dts/imx7s.dtsi?h=imx_4.9.11_1.0.0_ga
https://source.codeaurora.org/external/imx/linux-imx/tree/arch/
arm/boot/dts/imx7d-sdb.dts?h=imx_4.9.11_1.0.0_ga
To support HS200 and SDR104, we need change pinmux settings dynamically.
And configure tuning step and start tuning tap, otherwise you may
see tuning failure.
Eric Nelson [Thu, 18 Jan 2018 15:36:26 +0000 (08:36 -0700)]
mx6memcal: fix comment in board header file
The board header file included a reference to the starting point
from nitrogen6x.h, but since so much changed, the file bears
little resemblance to that file.
Eric Nelson [Thu, 18 Jan 2018 14:47:32 +0000 (07:47 -0700)]
mx6memcal: enable SDP support
The initial implementation of mx6memcal reset the CPU after
running the memory calibration procedure because the generic
board has no information about which boot devices are available.
Now that we have SDP support in SPL, use it to allow a full
U-Boot to be uploaded (i.e. to use "mtest").
Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Eric Nelson [Thu, 18 Jan 2018 14:47:31 +0000 (07:47 -0700)]
mx6memcal: launder through savedefconfig
This patch just changes the order of configuration items in
mx6memcal_defconfig to match the Kconfig layout, making it easier
to track changes made using menuconfig.
Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Patrick Bruenn [Tue, 16 Jan 2018 06:59:04 +0000 (07:59 +0100)]
arm: imx: mx53loco: remove usage of mx53_dram_size
Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().
Reused dram initialization functions from arch/arm/mach-imx/mx5/mx53_dram.c
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Patrick Bruenn [Tue, 16 Jan 2018 06:59:03 +0000 (07:59 +0100)]
arm: imx: m53evk: remove usage of mx53_dram_size
Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().
Reused dram initialization functions from arch/arm/mach-imx/mx5/mx53_dram.c
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Patrick Bruenn [Tue, 16 Jan 2018 06:59:02 +0000 (07:59 +0100)]
arm: imx: cx9020: move dram init into common place
Move dram_init(), dram_init_banksize() and get_effective_memsize() to
arch/arm/mach-imx/mx5/mx53_dram.c, where it can be reused by m53evk and
mx53loco.
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Patrick Bruenn [Tue, 16 Jan 2018 06:59:01 +0000 (07:59 +0100)]
arm: imx: cx9020: remove usage of mx53_dram_size
Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().
However multiple calls are better than undefined behavior...
This fixes:
https://lists.denx.de/pipermail/u-boot/2017-November/313214.html
https://lists.denx.de/pipermail/u-boot/2017-December/314480.html
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Ian Ray [Wed, 10 Jan 2018 19:31:37 +0000 (20:31 +0100)]
configs: ge_bx50v3: automatic partition selection and video output failure message
The exact definition of a successful boot is defined by user-space.
Determine the boot partition automatically. A partition is selected if
file `/boot/bootcause/firstboot' exists (meaning that the partition has
freshly installed software) OR if file `/boot/fitImage' exists.
When userspace determines that new software was successfully installed,
it must (1) delete `/boot/fitImage' on the _inactive_ partition and (2)
remove `/boot/bootcause/firstboot'.
Enable video, but do not display logos or other version information.
Silence kernel console logging by default.
Print a message to VGA screen in case of boot failure and reset bootcount
to allow the user to attempt boot again.
Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Ian Ray [Wed, 10 Jan 2018 19:31:35 +0000 (20:31 +0100)]
configs: ge_bx50v3: enable bootcount
Enable bootcount using an EXT file.
Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Ian Ray [Wed, 10 Jan 2018 19:31:34 +0000 (20:31 +0100)]
config: ge_bx50v3: read boot script
Read boot script from shared partition, if available.
Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Ian Ray [Wed, 10 Jan 2018 19:31:33 +0000 (20:31 +0100)]
board: ge: bx50v3: Support FIT and select configuration based on VPD
Modify configuration to support FIT. Set variable `confidx' from VPD,
in order to load the correct device tree. Modify/simplify U-Boot
environment to support loading FIT image.
Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Martyn Welch [Wed, 10 Jan 2018 19:31:32 +0000 (20:31 +0100)]
board: ge: bx50v3: Enable hardware watchdog
Enable the hardware watchdog on bx50v3 to cause it to reset in the event
the board hangs.
Configure GPIO_9 pin as WDOG1_B so that a watchdog timeout results in a
full system reset.
The watchdog is used and reconfigured by systemd approximately 1.7 seconds
into boot. Adding a few seconds for U-Boot and a few more seconds as a
safety margin.
Note that the PCIe controller is _not_ put back into a safe state prior
to board reset. This is a problem if board reset is implemented as CPU
reset.
Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Hannu Lounento [Wed, 10 Jan 2018 19:31:31 +0000 (20:31 +0100)]
board: ge: bx50v3: program MAC address to I210
There are two I210s on the b850v3 and one on the b450v3 and b650v3.
One is connected to Marvell 88e6240 which is already programmed.
Follow the flow documented in doc/README.enetaddr: set the
enet[0-9]*addr environment variable and let the driver program the
hardware.
The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order.
The environment variables are removed after programming the hardware
because the variables seem to influence MAC addresses also after U-Boot.
Specifically the MAC address of FEC (MC interface) would be incorrectly
set: 'ethaddr', which maps to the first I210 chip and is set to I210's
default address read from the driver by eth_write_hwaddr in eth_legacy.c
because the variable is undefined (not set even by bx50v3.c), would
result in the eth0 interface's MAC address to be set to I210's default
address.
Signed-off-by: Hannu Lounento <hannu.lounento@ge.com> Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Martyn Welch [Wed, 10 Jan 2018 19:31:30 +0000 (20:31 +0100)]
board: ge: bx50v3: move FEC MAC address programming to driver
Instead of programming the hardware directly in the board
implementation, follow the flow documented in doc/README.enetaddr: set
the enet[0-9]*addr environment variable and let the driver program the
hardware.
This avoids duplicating the implementation as it already exists in the
driver (drivers/net/fec_mxc.c: fec_set_hwaddr).
The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order, i.e. FEC always has the index 2.
The FEC driver does *not* set the flag Set MAC Address on Transmit (bit
set_eth0_mac_address used to do but this is unnecessary as the Linux
networking stack fills in the MAC address.
Signed-off-by: Hannu Lounento <hannu.lounento@ge.com> Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Ian Ray [Wed, 10 Jan 2018 19:31:29 +0000 (20:31 +0100)]
configs: Add network device support for bx50v3 products
Modify b450v3, b650v3 and b850v3 defconfigs to enable the network devices
found in these products.
Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Martyn Welch [Wed, 10 Jan 2018 19:31:28 +0000 (20:31 +0100)]
board: ge: Enable access to i2c bus 1 and 2
The change in i2c configuration added to support access to the VPD has
inadvertantly caused access to i2c buses 1 & 2 to be lost. This has
resulted in the configuration for the PMIC to be attempted on the wrong
bus and thus isn't taking effect.
Add the required configuration to return access to buses 1 & 2. In order
to ensure that any users of the bus numbering prior to addition in VPD
patches work, add buses before configuration related to mux on bus 0 and
tweak VPD bus usage to fit new numbering scheme.
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Hannu Lounento [Wed, 10 Jan 2018 19:31:25 +0000 (20:31 +0100)]
net: e1000: split e1000_read_mac_addr
Split the implementation of e1000_read_mac_addr into eeprom and register
versions called by e1000_read_mac_addr.
This allows for calling e1000_read_mac_addr when MAC address is needed
with no constraints where it is read from, and for calling the register
and, especially, the eeprom version directly in order to specify where
to read the address from.
Signed-off-by: Hannu Lounento <hannu.lounento@ge.com> CC: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Ye Li [Wed, 10 Jan 2018 05:20:44 +0000 (13:20 +0800)]
net: fec: fix build warnings for 64bits support
When building for 64bits system, we get some warnings about type
cast between pointer and integer. This patch eliminates the warnings
by using ulong/long type which is 32bits on 32bits system or 64bits on
64bits system.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Peng Fan [Wed, 10 Jan 2018 05:20:32 +0000 (13:20 +0800)]
imx: cleanup bootaux
Move i.MX6/7 bootaux code to imx_bootaux.c.
The i.MX6/7 has different src layout, so define M4 reg offset
to ease the cleanup. Redefine the M4 related BIT for share
common code.
Peng Fan [Wed, 10 Jan 2018 05:20:31 +0000 (13:20 +0800)]
imx: refactor imx_get_mac_from_fuse
Move imx_get_mac_from_fuse to a new mac.c for i.MX6/7.
Since fuse regs structure are different for i.MX6/7, use mac
address offset in code and define a new local struture
imx_mac_fuse.
Peng Fan [Wed, 10 Jan 2018 05:20:22 +0000 (13:20 +0800)]
imx: mx8m: add clock driver
Add clock driver to support i.MX8M.
There are two kind PLLs, FRAC pll and SSCG pll. ROM already
configured SYS PLL1/2, we only need to configure the output.
ocotp/i2c/pll decoding and configuration/usdhc/lcdif/dram pll/
enet clock are configured in the code.
Jagan Teki [Tue, 9 Jan 2018 18:49:52 +0000 (00:19 +0530)]
configs: enable spl support wrt env device
nand device needed for mmc config to access nand
for write and update so enabling SPL_SUPPORT to mmc
or nand is wrt to env device rather nand driver check.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
i.CoreM6 1.5 is an another i.CoreM6 QDL cpu modules which can be connected
to EDIMM starter kit design with eMMC and MIPI-CSI interfaces suitable for
Android and video capture application.
notable features:
CPU NXP i.MX6 S/DL/D/Q, Up to 4 x Cortex-A9@800MHz
Memory Up to 2 GB DDR3-1066
Video Interfaces Up to 1 Parallel Up to 2 LVDS HDMI 1.4
port 8 bit CSI INPUT MIPI-CSI INPUT
1 x 10/100 Ethernet interface, 2 x USB, 1 x PCIe, 1 x I2S etc
This patch adds support for Quad/Dual and DualLite/Solo SOM's on
MIPI starter kit with boot from SD and eMMC.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
env: make env drivers propagate env_import return value
For multiple env drivers to correctly implement fallback when
one environment fails to load (e.g. crc error), the return value
of env_import has to be propagated by all env driver's load
function.
Without this change, the first driver that succeeds to load an
environment with an invalid CRC return 0 (success) and no other
drivers are checked.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
There is more common code in mmc, nand and ubi env drivers that
can be shared by moving to env_import_redund.
For this, a status/error value whether the buffers were loaded
are passed as additional parameters to env_import_redund.
Ideally, these are already returned to the env driver by the
storage driver. This is the case for mmc, nand and ubi, so for
this change, code deduplicated.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
env: make env_import(_redund) return 0 on success, not 1
env_import (and env_import_redund) currently return 1 on success
and 0 on error. However, they are only used from functions
returning 0 on success or a negative value on error.
Let's clean this up by making env_import and env_import_redund
return 0 on success and -EIO on error (as was the case for all
users before).
Users that cared for the return value are also updated. Funny
enough, this only affects onenand.c and sf.c
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
cmd: nvedit: env_get_f must check for env_get_char error codes
env_get_f calls env_get_char to load single characters from the
environment. However, the return value of env_get_char was not
checked for errors. Now if the env driver does not support the
.get_char call, env_get_f did not notice this and looped over the
whole size of the environment, calling env_get_char over 8000
times with the default settings, just to return an error in the
end.
Fix this by checking if env_get_char returns < 0.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tom Rini [Wed, 31 Jan 2018 20:34:49 +0000 (15:34 -0500)]
davinci: Fix omapl138_lcdk builds
The omapl138_lcdk platform is not a DA850 SoC so we need to select
SOC_DA8XX and not SOC_DA850, as it was before. It does however point
out a bit of a misnomer in how all of these PLL defines are named as
they are generic to DA8xx, not DA850 centric. Remove the 'if SOC_DA850'
under the defaults as these are simply the defaults. As SOC_DA8XX will
select SYS_DA850_DDR_INIT when needed, we do not need it under both SOC
options.
Fixes: 76e22222d3aa ("Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig") Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 31 Jan 2018 12:10:55 +0000 (07:10 -0500)]
Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.03
- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
- ZynqMP psu rework based on Zynq concept
- Add low level initialization for zc770 and zcu102
- Add support for Zynq zc770 x16 nand configuration
- Add mini nand/emmc ZynqMP targets
- Some arasan nand changes
Adam Ford [Tue, 23 Jan 2018 10:04:28 +0000 (04:04 -0600)]
Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_DV_CLKMODE
CONFIG_SYS_DA850_PLL0_POSTDIV
CONFIG_SYS_DA850_PLL0_PLLDIV1
CONFIG_SYS_DA850_PLL0_PLLDIV2
CONFIG_SYS_DA850_PLL0_PLLDIV3
CONFIG_SYS_DA850_PLL0_PLLDIV4
CONFIG_SYS_DA850_PLL0_PLLDIV5
CONFIG_SYS_DA850_PLL0_PLLDIV6
CONFIG_SYS_DA850_PLL0_PLLDIV7
CONFIG_SYS_DA850_PLL1_POSTDIV
CONFIG_SYS_DA850_PLL1_PLLDIV1
CONFIG_SYS_DA850_PLL1_PLLDIV2
CONFIG_SYS_DA850_PLL1_PLLDIV3
York Sun [Mon, 29 Jan 2018 17:44:40 +0000 (09:44 -0800)]
armv8: ls2088ardb: Add 3DS RDIMM support
Tested with MTA72ASS8G72PSZ-2S6G1. This is 3DS RDIMM module with x4
DDR chips. LS2088ARDB needs to be modified to connect all DQS signals.
Some of them are grounded by default for x8 chips. Tested with RDIMM
MTA18ASF2G72PDZ on main memory controllers. DP-DDR doesn't support
RDIMM. Dropped related timing table.
York Sun [Mon, 29 Jan 2018 17:44:37 +0000 (09:44 -0800)]
drivers/ddr/fsl: Modify binding registers to save time on data init
DDR controllers always use binding register to determine the memory
space to perform data initialization. In case of controller interleaving,
the space is doubled, resulting twice long wait. It wasn't too bad until
the memory capacity increases. To reduce the wait time, reduce the
binding space to half and restore it after data initialization.
Three-way interleaving is no longer used and is removed.
York Sun [Mon, 29 Jan 2018 17:44:33 +0000 (09:44 -0800)]
drivers/ddr/fsl: Fix DDR4 RDIMM support
For DDR4, command/address delay in mode registers and parity latency
in timing config register are only needed for UDIMMs, but not RDIMMs.
Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for
dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix
calculation of timing config registers. Use hexadecimal format for
printing RCW (register control word) registers.
Yogesh Gaur [Tue, 16 Jan 2018 04:38:24 +0000 (10:08 +0530)]
driver: fsl-mc: Perform fsl-mc fdt fixup for lazyapply dpl
For for case of lazyapply method, API fdt_fixup_board_enet() gets
invoked before DPL being deployed. This leads to an issue that
fsl-mc fdt fixup status marked as fail and dprc driver didn't get
registered in linux boot.
Fixes this issue by calling fdt_fixup_board_enet() for case when
DPL is deployed successfully in lazyapply method.
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
projects / u-boot / log