Paul Gortmaker [Tue, 16 Jan 2007 16:38:14 +0000 (11:38 -0500)]
mpc83xx: U-Boot support for Wind River SBC8349
I've redone the SBC8349 support to match git-current, which
incorporates all the MPC834x updates from Freescale since the 1.1.6
release, including the DDR changes.
I've kept all the SBC8349 files as parallel as possible to the
MPC8349EMDS ones for ease of maintenance and to allow for easy
inspection of what was changed to support this board. Hence the SBC8349
U-Boot has FDT support and everything else that the MPC8349EMDS has.
Fortunately the Freescale updates added support for boards using CS0,
but I had to change spd_sdram.c to allow for board specific settings for
the sdram_clk_cntl (it is/was hard coded to zero, and that remains the
default if the board doesn't specify a value.)
Hopefully this should be mergeable as-is and require no whitespace
cleanups or similar, but if something doesn't measure up then let me
know and I'll fix it.
Dave Liu [Thu, 7 Dec 2006 13:11:58 +0000 (21:11 +0800)]
mpc83xx: streamline the 83xx immr head file
For better format and style, I streamlined the 83xx head files,
including immap_83xx.h and mpc83xx.h. In the old head files, 1)
duplicated macro definition appear in the both files; 2) the structure
of QE immr is duplicated in the immap_83xx.h and immap_qe.h; 3) The
macro definition put inside the each structure. So, I cleaned up the
structure of QE immr from immap_83xx.h, deleted the duplicated stuff and
moved the macro definition to mpc83xx.h, Just like MPC8260.
Dave Liu [Wed, 6 Dec 2006 03:38:17 +0000 (11:38 +0800)]
mpc83xx: Fix the UEC driver bug of QE
The patch prevents the GCC tool chain from striping useful code for
optimization. It will make UEC ethernet driver workable, Otherwise the
UEC will fail in tx when you are using gcc4.x. but the driver can work
when using gcc3.4.3.
CHANGELOG
*Prevent the GCC from striping code for optimization, Otherwise the UEC
will tx failed when you are using gcc4.x.
Sergei Poselenov [Tue, 27 Feb 2007 17:15:30 +0000 (20:15 +0300)]
MCC200: Fixes for update procedure
- fix logic error in image type handling
- make sure file system images (cramfs etc.) get stored in flash
with image header stripped so they can be mounted through MTD
Stefan Roese [Thu, 22 Feb 2007 06:43:34 +0000 (07:43 +0100)]
[PATCH] get_dev() now unconditionally uses manual relocation
Since the relocation fix is not included yet and we're not sure how
it will be added, this patch removes code that required relocation
to be fixed for now.
Haiying Wang [Wed, 21 Feb 2007 15:52:31 +0000 (16:52 +0100)]
[PATCH v3] Add sync to ensure flash_write_cmd is fully finished
Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command
is fully finished. The sync() is defined in each CPU's io.h file. For
those CPUs which do not need sync for now, a dummy sync() is defined in
their io.h as well.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Stefan Roese [Tue, 20 Feb 2007 12:21:57 +0000 (13:21 +0100)]
[PATCH] Fix relocation problem with "new" get_dev() function
This patch enables the "new" get_dev() function for block devices
introduced by Grant Likely to be used on systems that still suffer
from the relocation problems (manual relocation neede because of
problems with linker script).
Hopefully we can resolve this relocation issue soon for all platform
so we don't need this additional code anymore.
Stefan Roese [Tue, 20 Feb 2007 09:51:26 +0000 (10:51 +0100)]
[PATCH] I2C: Add support for multiple I2C busses for RTC & DTT
This patch switches to the desired I2C bus when the date/dtt
commands are called. This can be configured using the
CFG_RTC_BUS_NUM and/or CFG_DTT_BUS_NUM defines.
Stefan Roese [Tue, 20 Feb 2007 09:43:34 +0000 (10:43 +0100)]
[PATCH] PPC4xx: Add 440SP(e) DDR2 SPD DIMM support
This patch adds support for the DDR2 controller used on the
440SP and 440SPe. It is tested on the Katmai (440SPe) eval
board and works fine with the following DIMM modules:
- Corsair CM2X512-5400C4 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM)
This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.
Stefan Roese [Tue, 20 Feb 2007 09:35:42 +0000 (10:35 +0100)]
[PATCH] PPC4xx: Split 4xx SPD SDRAM init routines into 2 files
Since the existing 4xx SPD SDRAM initialization routines for the
405 SDRAM controller and the 440 DDR controller don't have much in
common this patch splits both drivers into different files.
This is in preparation for the 440 DDR2 controller support (440SP/e).
Stefan Roese [Tue, 20 Feb 2007 09:27:08 +0000 (10:27 +0100)]
[PATCH] PPC4xx: Add support for multiple I2C busses
This patch adds support for multiple I2C busses on the PPC4xx
platforms. Define CONFIG_I2C_MULTI_BUS in the board config file
to make use of this feature.
It also merges the 405 and 440 i2c header files into one common
file 4xx_i2c.h.
Also the 4xx i2c reset procedure is reworked since I experienced
some problems with the first access on the 440SPe Katmai board.
Grant Likely [Tue, 20 Feb 2007 08:05:23 +0000 (09:05 +0100)]
[PATCH 6_9] Move common_cmd_ace.c to drivers_systemace.c
The code in this file is not a command; it is a device driver. Put it in
the correct place. There are zero functional changes in this patch, it
only moves the file.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Grant Likely [Tue, 20 Feb 2007 08:05:16 +0000 (09:05 +0100)]
[PATCH 5_9] Whitespace fixup on common_cmd_ace.c (using Lindent)
This patch is in preparation of additional changes to the sysace driver.
May as well take this opportunity to fixup the inconsistent whitespace since
this file is about to undergo major changes anyway.
There are zero functional changes in this patch. It only cleans up the
the whitespace.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Grant Likely [Tue, 20 Feb 2007 08:04:52 +0000 (09:04 +0100)]
[PATCH 2_4] Use config.h, not xparameters.h, for xilinx targets
Change the xilinx device drivers and board code to include config.h
instead of xparameters.h directly. config.h always includes the
correct xparameters file. This change reduces the posibility of
including the wrong file when adding a new xilinx board port
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Sergei Poselenov [Wed, 14 Feb 2007 11:30:28 +0000 (14:30 +0300)]
MCC200: Extensions to Software Update Mechanism
Update / extend Software Update Mechanism for MCC200 board:
- Add support for rootfs image added. The environment variables
"rootfs_st" and "rootfs_nd" can be used to override the default
values of the image start and end.
- Remove excessive key check code.
- Code cleanup.
Stefan Roese [Fri, 2 Feb 2007 11:44:22 +0000 (12:44 +0100)]
[PATCH] Correctly display PCI arbiter en-/disabled on some 4xx boards
Previously the strapping DCR/SDR was read to determine if the internal PCI
arbiter is enabled or not. This strapping bit can be overridden, so now
the current status is read from the correct DCR/SDR register.
Stefan Roese [Thu, 1 Feb 2007 12:22:41 +0000 (13:22 +0100)]
[PATCH] Remove PCI-PNP configuration from Sequoia/Rainier config file
When PCI PNP is enabled the pci pnp configuration routine is called
which sets the PCI_CACHE_SIZE_LINE to 8. This seems to generate some
problems with some PCI cards. For now disable the PCI PNP configuration.
Stefan Roese [Tue, 30 Jan 2007 16:06:10 +0000 (17:06 +0100)]
[PATCH] Update Sequoia (440EPx) config file
The config file now handles the 2nd target, the Rainier (440GRx)
evaluation board better. Additionally the PPC input clock was
adjusted to match the correct value of 33.0 MHz.
Stefan Roese [Tue, 30 Jan 2007 16:04:19 +0000 (17:04 +0100)]
[PATCH] Merge Yosemite & Yellowstone board ports
Now the AMCC eval boards Yosemite (440EP) and Yellowstone (440GR)
share one config file and all board specific files. This way we
don't have to maintain two different sets of files for nearly
identical boards.
Bartlomiej Sieka [Tue, 23 Jan 2007 13:21:14 +0000 (14:21 +0100)]
[iDMR] Flash driver on initialisation write-protects some sectors,
currently sectors 0-3. Sector 3 does not need to be protected, though
(U-boot occupies sectors 0-1 and the environment sector 2). This commit
fixes this, i.e., only sectors 0-2 are protected.
Bartlomiej Sieka [Tue, 23 Jan 2007 13:11:22 +0000 (14:11 +0100)]
[iDMR] Using MII-related commands on iDRM board doesn't work now (e.g.,
"mii device" results in "Unexpected exception"). Fixing this properly
requires some clean-up in the FEC drivers infrastructure for ColdFire, so
this commit disables MII commads for now.
projects / u-boot / log