]> git.sur5r.net Git - u-boot/log
u-boot
9 years agocolibri_t20: add lcd display support
Marcel Ziswiler [Wed, 5 Aug 2015 22:47:02 +0000 (00:47 +0200)]
colibri_t20: add lcd display support

Add LCD display support defaulting to VESA VGA resolution. Different
resolutions configurable via device tree.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agocolibri_t20: fix device-tree compatible node
Marcel Ziswiler [Wed, 5 Aug 2015 22:47:01 +0000 (00:47 +0200)]
colibri_t20: fix device-tree compatible node

Use toradex,colibri_t20 as the device-tree compatible node value rather
than toradex,t20 in accordance to our Apalis/Colibri T30 products.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agoapalis/colibri_t20/t30: integrate recovery mode detection
Marcel Ziswiler [Wed, 5 Aug 2015 22:47:00 +0000 (00:47 +0200)]
apalis/colibri_t20/t30: integrate recovery mode detection

Allow detecting whether or not U-Boot was launched through the
recovery mode of the resp. NVIDIA SoC.

Make use of a board specific arch_misc_init() and enable the same via
CONFIG_ARCH_MISC_INIT configuration option.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agoARM: tegra: allow reading recovery mode boot type
Marcel Ziswiler [Wed, 5 Aug 2015 22:46:59 +0000 (00:46 +0200)]
ARM: tegra: allow reading recovery mode boot type

Add defines to allow reading recovery mode (RCM) boot type from the boot
information table (BIT) written by the boot ROM (BR) to the IRAM.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agoARM: tegra: allow custom usb manufacturer/product/vendor ids/strings
Marcel Ziswiler [Wed, 5 Aug 2015 22:46:58 +0000 (00:46 +0200)]
ARM: tegra: allow custom usb manufacturer/product/vendor ids/strings

Allow for optional custom USB gadget manufacturer/product/vendor
IDs/strings to be specified.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-mmc
Tom Rini [Thu, 13 Aug 2015 11:20:44 +0000 (07:20 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc

9 years agonet: lpc32xx: eth buffers base config
Sylvain Lemieux [Mon, 27 Jul 2015 17:37:40 +0000 (13:37 -0400)]
net: lpc32xx: eth buffers base config

Add support to specify the Ethernet buffer base address;
if none are supply by the board, the default value is use (from existing code).

Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-net
Tom Rini [Wed, 12 Aug 2015 19:46:36 +0000 (15:46 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-net

9 years agologos: add Toradex logo
Stefan Agner [Wed, 5 Aug 2015 15:17:01 +0000 (17:17 +0200)]
logos: add Toradex logo

Use the boot loader splash screen from WinCE which matches our
wallpapers position wise. Although the logo is an 8-bit indexed BMP as
well colours looked odd at first in U-Boot. After converting to full
RGB palette and converting back to an indexed BMP using imagemagick
the Logo showed up properly.

$ convert tools/logos/toradex-rgb.bmp -type Palette -colors 256 \
-compress none -verbose BMP3:tools/logos/toradex.bmp

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
9 years agoimage-fdt.c: store returned error value
Max Krummenacher [Wed, 5 Aug 2015 15:17:03 +0000 (17:17 +0200)]
image-fdt.c: store returned error value

This fixes the following warning (and the runtime error reporting):
../common/image-fdt.c:491:4: warning: 'fdt_ret' may be used
uninitialized in this function [-Wmaybe-uninitialized]

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agocolibri_vf: remove spurious new line
Marcel Ziswiler [Wed, 5 Aug 2015 15:17:02 +0000 (17:17 +0200)]
colibri_vf: remove spurious new line

Remove spurious new line in configuration file.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
9 years agogeneric-board: allow showing custom board info
Marcel Ziswiler [Wed, 5 Aug 2015 15:17:00 +0000 (17:17 +0200)]
generic-board: allow showing custom board info

Allow showing custom board info from a checkboard() function being
implemented if CONFIG_CUSTOM_BOARDINFO is specified.  Previously the
device tree model was always displayed not taking any
CONFIG_CUSTOM_BOARDINFO into account.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 years agofs/fs.c: read up to EOF when len would read past EOF
Max Krummenacher [Wed, 5 Aug 2015 15:16:58 +0000 (17:16 +0200)]
fs/fs.c: read up to EOF when len would read past EOF

http://lists.denx.de/pipermail/u-boot/2012-September/134347.html
allows for reading files in chunks from the shell.

When this feature is used to read past the end of a file an error
was returned instead of returning the bytes read up to the end of
file. Thus the following fails in the shell:

offset = 0
len = chunksize
do
read file, offset, len
write data
until bytes_read < len

The patch changes the behaviour to printing an informational
message and returning the actual read number of bytes aka read(2)
behaviour for convenient use in U-Boot scripts.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
9 years agoconfigs: ti_armv7_keystone2: increase size reserved for initrd
Vitaly Andrianov [Tue, 4 Aug 2015 15:16:16 +0000 (11:16 -0400)]
configs: ti_armv7_keystone2: increase size reserved for initrd

9MB reserved for initrd is not enough for default ramfs used for keystone
devices, which is ~33MB. This patch increases the size up to 80MB.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
9 years agoconfigs: ti_armv7_keystone2: fix initrd address at args_ramfs
Vitaly Andrianov [Tue, 4 Aug 2015 15:16:15 +0000 (11:16 -0400)]
configs: ti_armv7_keystone2: fix initrd address at args_ramfs

This patch set the correct initrd address to much rdaddr, which used at
get_fs_ramfs commad.

Fixes: 3e97f0b63c8e ("configs: ti_armv7_keystone2: switch addresses
to generic addresses")

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
9 years agocommon/lcd_console: fix console/logo regression
Marcel Ziswiler [Tue, 4 Aug 2015 13:49:50 +0000 (15:49 +0200)]
common/lcd_console: fix console/logo regression

The following commit changed the order of the column vs. row parameter
to the lcd_init_console() function but missed actually changing it as
well the second time it is called from lcd_clear() which resulted in a
garbled text console which this patch fixes.

commit 604c7d4a5a3cf70949f6e6094bf0d52ee3b4804d
common/lcd_console: introduce display/framebuffer rotation

Tested on Colibri T20 with my latest assortment of tegra
fixes/enhancements patch set.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agokconfig: add config option for shell prompt
Nikita Kiryanov [Mon, 3 Aug 2015 09:36:58 +0000 (12:36 +0300)]
kconfig: add config option for shell prompt

Add option to set shell prompt string from menuconfig and migrate
boards globally.

The migration is done as follows:
- Boards that explicitly and unconditionally set CONFIG_SYS_PROMPT had the
  entry moved to their defconfig files.
- Boards that defined some kind of #ifdef logic which selects the
  CONFIG_SYS_PROMPT (for example qemu-mips) got an #undef CONFIG_SYS_PROMPT
  right before the #ifdef logic and were left alone.
- This change forces CONFIG_SYS_PROMPT to be a per board decision, and thus
  CONFIG_SYS_PROMPT was removed from all <soc>_common.h and <arch>_common.h
  files. This results in a streamlined default value across platforms, and
  includes the following files: spear-common, sunxi-common, mv-common,
  ti_armv7_common, tegra-common, at91-sama5_common, and zynq-common.
- Boards that relied on <arch/soc>_common.h values of CONFIG_SYS_PROMPT were
  not updated in their respective defconfig files under the assumption that
  since they did not explicitly define a value, they're fine with whatever
  the default is.
- On the other hand, boards that relied on a value defined in some
  <boards>_common.h file such as woodburn_common, rpi-common,
  bur_am335x_common, ls2085a_common, siemens_am33x_common, and
  omap3_evm_common, had their values moved to the respective defconfig files.
- The define V_PROMPT was removed, since it is not used anywhere except for
  assigning a value for CONFIG_SYS_PROMPT.

Cc: Tom Rini <trini@konsulko.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
[trini: Add spring, sniper, smartweb to conversion]
Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agommc_spi: Big-endian support
Yoshinori Sato [Mon, 1 Jun 2015 06:22:37 +0000 (15:22 +0900)]
mmc_spi: Big-endian support

Currently implement always swap for big-endian value.
So doesn't work big-endian environment.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
9 years agodw_mmc: Calculate dwmmc FIFO threshold size if not provided
Simon Glass [Fri, 7 Aug 2015 02:16:29 +0000 (20:16 -0600)]
dw_mmc: Calculate dwmmc FIFO threshold size if not provided

We can calculate this. Add code to do this if it is not provided.

panto: prefix changed to dw_mmc to make things easier to grep

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
9 years agoARM: drop "optional" from target select in favor of ARCH_VERSATILE
Masahiro Yamada [Sat, 1 Aug 2015 07:39:13 +0000 (16:39 +0900)]
ARM: drop "optional" from target select in favor of ARCH_VERSATILE

Since commit a26cd04920dc ("arch: Make board selection choices
optional"), Kconfig could create such an insane .config file that
no SoC/board is selected.

This is now a real problem for Buildroot, for example.
(http://lists.busybox.net/pipermail/buildroot/2015-July/135125.html)

This commit drops the "optional" from the ARM target select menu
in favor of "Versatile family".

Rationale:
 - Historically, Linux chose versatile_defconfig as the default
   of ARM defconfig. (arch/arm/Makefile of Linux describes:
   KBUILD_DEFCONFIG := versatile_defconfig)

 - It was published by ARM Ltd.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
9 years agodra7xx: Add dra72_evm_defconfig using CONFIG_DM
Tom Rini [Fri, 31 Jul 2015 23:55:12 +0000 (19:55 -0400)]
dra7xx: Add dra72_evm_defconfig using CONFIG_DM

- Import various DT files for DRA7 / DR72x / dra72-evm from Linux Kernel
  v4.1
- Add config file for this board, enable DM and DM_GPIO

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 years agodra7xx: Move CONS_INDEX to Kconfig and enable CONFIG_SPL_STACK_ADDR
Tom Rini [Fri, 31 Jul 2015 23:55:11 +0000 (19:55 -0400)]
dra7xx: Move CONS_INDEX to Kconfig and enable CONFIG_SPL_STACK_ADDR

- Move the CONS_INDEX selection out of CONFIG_SYS_EXTRA_OPTIONS and
  into Kconfig proper.
- While in here, enable CONFIG_SPL_STACK_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agoARM: SPL: Use CONFIG_SPL_DM not CONFIG_DM
Tom Rini [Fri, 31 Jul 2015 23:55:10 +0000 (19:55 -0400)]
ARM: SPL: Use CONFIG_SPL_DM not CONFIG_DM

We now have the CONFIG_SPL_DM for code within SPL to toggle caring about
DM or not.  Without this change platforms that do enable CONFIG_DM but
not CONFIG_SPL_DM may be broken (such as OMAP5).

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agogpio: omap: Drop 'method' parameter
Tom Rini [Fri, 31 Jul 2015 23:55:09 +0000 (19:55 -0400)]
gpio: omap: Drop 'method' parameter

The "method" parameter was part of the original port of the driver from
the kernel.  At some point this may have been added to allow for future
differentiation (as omap1 and omap2 have different GPIO IP blocks, so
this wasn't an unreasonable thing to do).  At this point however it's
just extra overhead, so drop.

Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agoam33xx: Update DT files, add am335x_gp_evm_config target
Tom Rini [Fri, 31 Jul 2015 23:55:08 +0000 (19:55 -0400)]
am33xx: Update DT files, add am335x_gp_evm_config target

- Re-sync DT files for am33xx with Linux Kernel v4.1
- Include DT file now for the "AM335x GP EVM" and build target for it,
  via device tree and DM.
- We only need to provide platform data for UART when OF_CONTROL isn't
  also enabled really.  We can just push GPIO to coming from DT

Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agoarm: am437x: Introduce new board cm-t43
Nikita Kiryanov [Thu, 30 Jul 2015 20:56:23 +0000 (23:56 +0300)]
arm: am437x: Introduce new board cm-t43

Add initial support for CM-T43, an AM437x based SoM.
This support includes: serial, MMC/eMMC, NAND, USB, ETH, I2C, GPIO, DRAM
detection.

Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
9 years agogpio: am43xx: expand gpio support
Nikita Kiryanov [Thu, 30 Jul 2015 20:56:22 +0000 (23:56 +0300)]
gpio: am43xx: expand gpio support

AM43XX SoCs support up to 192 GPIO signals.
Make this amount available to the driver.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
9 years agommc: omap_hsmmc: enable 8bit interface for eMMC for AM43xx
Nikita Kiryanov [Thu, 30 Jul 2015 20:56:21 +0000 (23:56 +0300)]
mmc: omap_hsmmc: enable 8bit interface for eMMC for AM43xx

Enable 8bit interface on HSMMC2 for am43xx to support 8bit eMMC chips.

Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
9 years agommc: omap_hsmmc: enable proper CMD(DAT) lines reset procedure for am43xx
Nikita Kiryanov [Thu, 30 Jul 2015 20:56:20 +0000 (23:56 +0300)]
mmc: omap_hsmmc: enable proper CMD(DAT) lines reset procedure for am43xx

The CMD(DAT) lines reset procedure described in the OMAP4(AM335x,
OMAP5, DRA7xx) TRMs is also necessary for AM43XX. Enable it in the
driver.

Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
9 years agoarm: am43xx: enable spi clock
Nikita Kiryanov [Thu, 30 Jul 2015 20:56:19 +0000 (23:56 +0300)]
arm: am43xx: enable spi clock

Add spi clock to the list of am43xx basic clocks to make the SPI
subsystem available on am43xx systems.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagan Teki <jteki@openedev.com>
9 years agospi: omap3_spi: add am43xx support to omap3_spi
Nikita Kiryanov [Thu, 30 Jul 2015 20:56:18 +0000 (23:56 +0300)]
spi: omap3_spi: add am43xx support to omap3_spi

Add support for AM43XX to the omap3_spi driver.

Cc: Jagan Teki <jteki@openedev.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagan Teki <jteki@openedev.com>
9 years agoARM64: hikey: Add a README for this board.
Peter Griffin [Thu, 30 Jul 2015 17:55:24 +0000 (18:55 +0100)]
ARM64: hikey: Add a README for this board.

To help others with compiling and flashing ATF and u-boot add
a README for this board.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
9 years agoARM64: hikey: hi6220: Add u-boot support for the 96boards CE HiKey board.
Peter Griffin [Thu, 30 Jul 2015 17:55:23 +0000 (18:55 +0100)]
ARM64: hikey: hi6220: Add u-boot support for the 96boards CE HiKey board.

HiKey is the first 96boards consumer edition compliant board. It features a hi6220
SoC which has eight ARM A53 cpu's.

This initial port adds support for: -
1) Serial
2) eMMC / SD card
3) USB
4) GPIO

It has been tested with Arm Trusted Firmware running u-boot as the BL33 executable.

Notes:

eMMC has been tested with basic reading of eMMC partition into DDR. I have not
tested writing / erasing. Due to lack of clock control it won't be
running in the most performant high speed mode.

SD card slot has been tested for reading and booting kernels into DDR.
It is also currently configured to save the u-boot environment to the
SD card.

USB has been tested with ASIX networking adapter to tftpboot kernels
into DDR. On v2015.07-rc2 dhcp now works, and also USB mass storage
are correctly enumerated.

GPIO has been tested using gpio toggle GPIO4_1-3 to flash the LEDs.

Basic SoC datasheet can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf

Board schematic can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
96Boards-Hikey-Rev-A1.pdf

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
9 years agommc: hi6220_dw_mmc: Add hi6220 glue code for dw_mmc controller.
Peter Griffin [Thu, 30 Jul 2015 17:55:22 +0000 (18:55 +0100)]
mmc: hi6220_dw_mmc: Add hi6220 glue code for dw_mmc controller.

This patch adds the glue code for hi6220 SoC which has 2x synopsis
dw_mmc controllers. This will be used by the hikey board support
in subsequent patches.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 years agopmic: pmic_hi6553: Add a driver for the hi6553 pmic found on hikey board.
Peter Griffin [Thu, 30 Jul 2015 17:55:21 +0000 (18:55 +0100)]
pmic: pmic_hi6553: Add a driver for the hi6553 pmic found on hikey board.

This adds a simple pmic driver for the hi6553 pmic which is used in
conjunction with the hi6220 SoC on the hikey board. Eventually this
driver will be updated to be a proper UCLASS PMIC driver which
can parse the voltages direct from device tree.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
9 years agohisilicon: hi6220: Add a hi6220 pinmux driver.
Peter Griffin [Thu, 30 Jul 2015 17:55:20 +0000 (18:55 +0100)]
hisilicon: hi6220: Add a hi6220 pinmux driver.

This patch adds basic pinmux support for the hi6220 SoC,
which is found on the hikey board.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
9 years agoARM: hi6220: Add register and bitfield definition header files.
Peter Griffin [Thu, 30 Jul 2015 17:55:19 +0000 (18:55 +0100)]
ARM: hi6220: Add register and bitfield definition header files.

This patch adds the header files which will be used in the subsquent
board / drivers to enable support for hi6220 hikey board.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
9 years agodm: gpio: hi6220: Add a hi6220 GPIO driver model driver.
Peter Griffin [Thu, 30 Jul 2015 17:55:18 +0000 (18:55 +0100)]
dm: gpio: hi6220: Add a hi6220 GPIO driver model driver.

This patch adds support for the GPIO perif found on hi6220
SoC.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
9 years agocommon/cmd_source.c: Fix the source command failure under 64-bit platform
Gong Qianyu [Thu, 30 Jul 2015 06:00:01 +0000 (14:00 +0800)]
common/cmd_source.c: Fix the source command failure under 64-bit platform

Modify the data pointer type from ulong* to u32*.

For arm64 type "ulong" could be 64-bit. Then in line 89 of common/cmd_source.c:
"while (*data++);" data will point to the next 64 bits each time. As the uImage
file generated by mkimage tool keeps the same data format in either 32-bit or 64-bit
platform, the difference would cause failure in 64-bit platform.

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
9 years agospl: Fix compile warning for arm64
Gong Qianyu [Thu, 30 Jul 2015 06:07:12 +0000 (14:07 +0800)]
spl: Fix compile warning for arm64

Make the cast explicit for "warning: cast to pointer from integer of different size".

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
9 years agoimx28: Fix issue with GCC 5.x
Måns Rullgård [Tue, 28 Jul 2015 13:39:49 +0000 (14:39 +0100)]
imx28: Fix issue with GCC 5.x

The semantics for non-static functions declared inline have changed in
gcc5, causing the empty functions not to be emitted as an external
symbol.

Since lowlevel_init() is only referenced from start.S, it should not be
declared inline at all.

Reported-by: Otavio Salvador <otavio@ossystems.com.br>
Tested-by: Otavio Salvador <otavio@ossystems.com.br>
[trini: Reword commit message]
Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agoARM: keystone2: Use common definition for clk_get_rate
Lokesh Vutla [Tue, 28 Jul 2015 08:46:48 +0000 (14:16 +0530)]
ARM: keystone2: Use common definition for clk_get_rate

Since all the clocks are defined common, and has the same logic to get
the frequencies, use a common definition for for clk_get_rate().

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
9 years agoARM: keystone2: Remove unsed external clocks
Lokesh Vutla [Tue, 28 Jul 2015 08:46:47 +0000 (14:16 +0530)]
ARM: keystone2: Remove unsed external clocks

Remove unused external clocks and make a common definition
for all keystone platforms.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
9 years agoARM: keystone2: Cleanup init_pll definition
Lokesh Vutla [Tue, 28 Jul 2015 08:46:46 +0000 (14:16 +0530)]
ARM: keystone2: Cleanup init_pll definition

This is just a cosmetic change that makes
the calling of pll init code looks much cleaner.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
9 years agoARM: keystone2: Use common structure for PLLs
Lokesh Vutla [Tue, 28 Jul 2015 08:46:45 +0000 (14:16 +0530)]
ARM: keystone2: Use common structure for PLLs

Register Base addresses are same for PLLs in all
keystone platforms. If a PLL is not available, the corresponding
register addresses are marked as reserved.
Hence use a common definition.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
9 years agoARM: keystone2: Fix dev and arm speed detection
Lokesh Vutla [Tue, 28 Jul 2015 08:46:44 +0000 (14:16 +0530)]
ARM: keystone2: Fix dev and arm speed detection

Use common devspeed and armspeed definitions.
Also fix reading efuse bootrom register.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
9 years agoARM: keystone2: Cleanup PLL init code
Lokesh Vutla [Tue, 28 Jul 2015 08:46:43 +0000 (14:16 +0530)]
ARM: keystone2: Cleanup PLL init code

There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
9 years agoARM: keystone2: Enable CONFIG_DISPLAY_CPUINFO
Lokesh Vutla [Tue, 28 Jul 2015 08:46:42 +0000 (14:16 +0530)]
ARM: keystone2: Enable CONFIG_DISPLAY_CPUINFO

Add print_cpuinfo() function and enable
CONFIG_DISPLAY_CPUINFO for keystone platforms,
so that cpu info can be displayed during boot.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
9 years agoARM: keystone2: Cleanup SoC detection
Lokesh Vutla [Tue, 28 Jul 2015 08:46:41 +0000 (14:16 +0530)]
ARM: keystone2: Cleanup SoC detection

Add proper register definition for JTAG ID and
cleanup cpu_is_* functions.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
9 years agoARM: DRA72: disable workaround for 801819
Nishanth Menon [Mon, 27 Jul 2015 21:26:07 +0000 (16:26 -0500)]
ARM: DRA72: disable workaround for 801819

DRA72x processor variants are single core and it does not export ACP[1].
Hence, we have no source for generating an external snoop requests which
appear to be key to the deadlock in DRA72x design.

Since we build the same image for DRA74x and DRA72x platforms, lets
runtime detect and disable the workaround (in favor of performance) on
DRA72x platforms.

[1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0438i/BABIAJAG.html

Suggested-by: Richard Woodruff <r-woodruff2@ti.com>
Suggested-by: Brad Griffis <bgriffis@ti.com>
Reviewed-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
9 years agoARM: DRA7/ OMAP5: implement Auxiliary Control Register configuration
Nishanth Menon [Mon, 27 Jul 2015 21:26:06 +0000 (16:26 -0500)]
ARM: DRA7/ OMAP5: implement Auxiliary Control Register configuration

Implement logic for ACR(Auxiliary Control Register) configuration using
ROM Code smc service.

Suggested-by: Richard Woodruff <r-woodruff2@ti.com>
Suggested-by: Brad Griffis <bgriffis@ti.com>
Reviewed-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
9 years agoARM: Introduce erratum workaround for 801819
Nishanth Menon [Mon, 27 Jul 2015 21:26:05 +0000 (16:26 -0500)]
ARM: Introduce erratum workaround for 801819

Add workaround for Cortex-A15 ARM erratum 801819 which says in summary
that "A livelock can occur in the L2 cache arbitration that might
prevent a snoop from completing. Under certain conditions this can
cause the system to deadlock. "

Recommended workaround is as follows:
Do both of the following:

1) Do not use the write-back no-allocate memory type.
2) Do not issue write-back cacheable stores at any time when the cache
is disabled (SCTLR.C=0) and the MMU is enabled (SCTLR.M=1). Because it
is implementation defined whether cacheable stores update the cache when
the cache is disabled it is not expected that any portable code will
execute cacheable stores when the cache is disabled.

For implementations of Cortex-A15 configured without the “L2 arbitration
register slice” option (typically one or two core systems), you must
also do the following:

3) Disable write-streaming in each CPU by setting ACTLR[28:25] = 0b1111

So, we provide an option to disable write streaming on OMAP5 and DRA7.
It is a rare condition to occur and may be enabled selectively based
on platform acceptance of risk.

Applies to: A15 revisions r2p0, r2p1, r2p2, r2p3 or r2p4 and REVIDR[3]
is set to 0.

Note: certain unicore SoCs *might* not have REVIDR[3] not set, but
might not meet the condition for the erratum to occur when they donot
have ACP (Accelerator Coherency Port) hooked to ACE (AXI Coherency
Extensions). Such SoCs will need the work around handled in the SoC
specific manner, since there is no ARM generic manner to detect such
configurations.

Based on ARM errata Document revision 18.0 (22 Nov 2013)

Suggested-by: Richard Woodruff <r-woodruff2@ti.com>
Suggested-by: Brad Griffis <bgriffis@ti.com>
Reviewed-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
9 years agointegrator: switch to DM serial port
Linus Walleij [Mon, 27 Jul 2015 09:22:48 +0000 (11:22 +0200)]
integrator: switch to DM serial port

This switches the Integrator boards over to using the device model
for its serial ports.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
9 years agousb: ohci: enable cache support
Wu, Josh [Mon, 27 Jul 2015 03:40:18 +0000 (11:40 +0800)]
usb: ohci: enable cache support

Remove the CONFIG_DM_USB limitation to enable cache support functions.
Tested on SAMA5D3x-EK board.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
9 years agoARM: cache: implement a default weak flush_cache() function
Wu, Josh [Mon, 27 Jul 2015 03:40:17 +0000 (11:40 +0800)]
ARM: cache: implement a default weak flush_cache() function

Current many cpu use the same flush_cache() function, which just call
the flush_dcache_range().
So implement a weak flush_cache() for all the cpus to use.

In original weak flush_cache() in arch/arm/lib/cache.c, there has some
code for ARM1136 & ARM926ejs. But in the arch/arm/cpu/arm1136/cpu.c and
arch/arm/cpu/arm926ejs/cache.c, there implements a real flush_cache()
function as well. That means the original code for ARM1136 & ARM926ejs
in weak flush_cache() of arch/arm/lib/cache.c is totally useless.

So in this patch remove such code in flush_cache() and only call
flush_dcache_range().

Signed-off-by: Josh Wu <josh.wu@atmel.com>
9 years agoARM: cache: add an empty stub function for invalidate/flush dcache
Wu, Josh [Mon, 27 Jul 2015 03:40:16 +0000 (11:40 +0800)]
ARM: cache: add an empty stub function for invalidate/flush dcache

Since some driver like ohci, lcd used dcache functions. But some ARM
cpu don't implement the invalidate_dcache_range()/flush_dcache_range()
functions.

To avoid compiling errors this patch adds an weak empty stub function
for all ARM cpu in arch/arm/lib/cache.c.
And ARM cpu still can implemnt its own cache functions on the cpu folder.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agom68k: cache: add an empty stub functions for invalidate/flush dcache
Wu, Josh [Mon, 27 Jul 2015 03:40:15 +0000 (11:40 +0800)]
m68k: cache: add an empty stub functions for invalidate/flush dcache

Since some driver like ohci, lcd used dcache functions. But m68k don't
implement the invalidate_dcache_range()/flush_dcache_range() functions.

To avoid compiling errors this patch adds an weak empty stub function
for all m68k cpu.

Also each cpu can implement its own implementation. If not implemented
then by default is using an empty function.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Angelo Dureghello <angelo@sysam.it>
9 years agoCorrect License and Copyright information on few files
Ruchika Gupta [Mon, 27 Jul 2015 03:37:39 +0000 (09:07 +0530)]
Correct License and Copyright information on few files

gpio.h - Added missing copyright in few files.
rsa-mod-exp.h - Corrected copyright in the file.
fsl_sec.h - Added missing license in files
drivers/crypto/fsl/Makefile - Removed the incomplete GPLv2 license and replaced it with GPLv2+ license

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
9 years agoti: drop value from CONFIG_SYS_NAND_BUSWIDTH_16BIT
Stefano Babic [Sun, 26 Jul 2015 13:18:15 +0000 (15:18 +0200)]
ti: drop value from CONFIG_SYS_NAND_BUSWIDTH_16BIT

Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
9 years agomcx: add Ethernet over USB
Stefano Babic [Sun, 26 Jul 2015 13:18:14 +0000 (15:18 +0200)]
mcx: add Ethernet over USB

Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
9 years agoomap3: fix NAND support for mcx board
Stefano Babic [Sun, 26 Jul 2015 13:18:13 +0000 (15:18 +0200)]
omap3: fix NAND support for mcx board

mcx was not updated according to changes in
NAND driver.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
9 years agodrivers: hierarchize drivers Kconfig menu
Masahiro Yamada [Sat, 25 Jul 2015 17:46:26 +0000 (02:46 +0900)]
drivers: hierarchize drivers Kconfig menu

The menuconfig for drivers are getting more and more cluttered
and unreadable because too many entries are displayed in a single
flat menu.  Use hierarchic menu for each category.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Update to apply again in a few places, drop USB hunk]
Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agoinclude/bitfield.h: Assure new bitfield value doesn't touch unwanted bits
Codrin Ciubotariu [Fri, 24 Jul 2015 13:52:19 +0000 (16:52 +0300)]
include/bitfield.h: Assure new bitfield value doesn't touch unwanted bits

The new bitfield value must not be higher than its mask.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agoarm/rpi: Enable dcache
Alexander Stein [Fri, 24 Jul 2015 07:22:15 +0000 (09:22 +0200)]
arm/rpi: Enable dcache

Now that mailbox driver supports cache flush and invalidation, we can
enable dcache.

Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
9 years agodwc2: Add dcache support
Alexander Stein [Fri, 24 Jul 2015 07:22:14 +0000 (09:22 +0200)]
dwc2: Add dcache support

This adds dcache support for dwc2. The DMA buffers must be DMA aligned and
is flushed for outgoing transactions before starting transfer. For
ingoing transactions it is invalidated after the transfer has finished.

Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
[trini: Update to apply again on top of DM patches]
Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agoarm/mach-bcm283x/mbox: Flush and invalidate dcache when using fw mailbox
Alexander Stein [Fri, 24 Jul 2015 07:22:13 +0000 (09:22 +0200)]
arm/mach-bcm283x/mbox: Flush and invalidate dcache when using fw mailbox

When using dcache the setup data for the mailbox must be actually written
into memory before calling into firmware. Thus flush and invalidate the
memory.

Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
9 years agoARM: bcm283x: Allocate all mailbox buffers cacheline aligned
Alexander Stein [Fri, 24 Jul 2015 07:22:12 +0000 (09:22 +0200)]
ARM: bcm283x: Allocate all mailbox buffers cacheline aligned

The mailbox buffer is required to be at least 16 bytes aligned, but for
cache invalidation and/or flush it needs to be cacheline aligned.
Use ALLOC_CACHE_ALIGN_BUFFER for all mailbox buffer allocations.

Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
9 years agoARM: bcm283x: Define CONFIG_SYS_CACHELINE_SIZE
Alexander Stein [Fri, 24 Jul 2015 07:22:11 +0000 (09:22 +0200)]
ARM: bcm283x: Define CONFIG_SYS_CACHELINE_SIZE

The cacheline is always 32 bytes for arm1176 CPUs, so define it at board
config level for cache handling code.
The ARM Cortex-A7 has a dcache line size of 64 bytes.

Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
9 years agoarm1136/arm1176: Merge cache handling code
Alexander Stein [Fri, 24 Jul 2015 07:22:10 +0000 (09:22 +0200)]
arm1136/arm1176: Merge cache handling code

As both cores are similar merge the cache handling code for both CPUs
to arm11 directory.

Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
[trini: Add hunk to arch/arm/cpu/arm1136/Makefile]
Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agoarm1136: Remove dead code
Alexander Stein [Fri, 24 Jul 2015 07:22:09 +0000 (09:22 +0200)]
arm1136: Remove dead code

Apparently lcd_panel_disable is not defined anywhere, so no config for
an arm1136 board would have set CONFIG_LCD. Remove the unused code.

Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
9 years agosniper: Keypad support, with recovery and fastboot key combinations
Paul Kocialkowski [Mon, 20 Jul 2015 13:17:18 +0000 (15:17 +0200)]
sniper: Keypad support, with recovery and fastboot key combinations

Using the twl4030 keypad allows booting directly into some special boot modes,
such as recovery or fastboot. the VOL+ key will trigger a boot to recovery while
the VOL- key will trigger a boot to fastboot.

The G (gesture) key remains unused at this point.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
9 years agosniper: Power off when the power on reason is not a valid one
Paul Kocialkowski [Mon, 20 Jul 2015 13:17:17 +0000 (15:17 +0200)]
sniper: Power off when the power on reason is not a valid one

In most cases, userspace will attempt to power off the device with HALT instead
of POWER_OFF, which triggers a reset instead of a proper power off from the
TWL4030. Hence, it is up to the bootloader to actually turn the device off when
there is no reason to turn it on.

A reboot identified with the OMAP reboot mode bits set is acceptable, as well as
a power on reason from either the power button, USB or charger plug.

Other cases should trigger a power off. Note that for the U-Boot reset command
to take effect, we have to fill-in the OMAP reboot bits.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
9 years agosniper: Power button reset support
Paul Kocialkowski [Mon, 20 Jul 2015 13:17:16 +0000 (15:17 +0200)]
sniper: Power button reset support

This adds support for resetting the device on a long press on the power button.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
9 years agosniper: Fastboot support
Paul Kocialkowski [Mon, 20 Jul 2015 13:17:15 +0000 (15:17 +0200)]
sniper: Fastboot support

This adds support for the fastboot USB gadget, including flashing to the
internal MMC and reboot to bootloader or not.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Update to use Kconfig for MUSB]
Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agosniper: Pass serial number through ATAG
Paul Kocialkowski [Mon, 20 Jul 2015 13:17:14 +0000 (15:17 +0200)]
sniper: Pass serial number through ATAG

Now that the serial number is correctly defined, we can pass it to the kernel
using the (legacy) ATAG method. It will be automatically passed via device-tree
when enabled.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
9 years agosniper: Serial number support, obtained from die ID
Paul Kocialkowski [Mon, 20 Jul 2015 13:17:13 +0000 (15:17 +0200)]
sniper: Serial number support, obtained from die ID

The OMAP3 has some die-specific ID bits that we can use to give the device a
(more or less) unique serial number. This is particularly useful for e.g. USB.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
9 years agosniper: OMAP3 reboot mode support
Paul Kocialkowski [Mon, 20 Jul 2015 13:17:12 +0000 (15:17 +0200)]
sniper: OMAP3 reboot mode support

This adds support for the omap3 reboot mode mechanism and exports the reboot
mode via an environment variable, that is used in the boot command to make it
possible to boot from the recovery partition.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
9 years agoLG Optimus Black (P970) codename sniper support
Paul Kocialkowski [Mon, 20 Jul 2015 13:17:11 +0000 (15:17 +0200)]
LG Optimus Black (P970) codename sniper support

The LG Optimus Black (P970) codename sniper is a smartphone that was designed
and manufactured by LG Electronics (LGE) and released back in 2011.

It is using an OMAP3630 SoC GP version, which allows running U-Boot and the
U-Boot SPL from the ground up. This port is aimed at running an Android version
such as Replicant, the fully free Android distribution. However, support for
upstream Linux with device-tree and common GNU/Linux distros boot commands
could be added in the future.

For more information about the journey to freeing this device, please read the
series of blog posts at:
http://code.paulk.fr/article20/a-hacker-s-journey-freeing-a-phone-from-the-ground-up-first-part

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Add CONFIG_OF_SUPPORT]
Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agoomap3: Reboot mode support
Paul Kocialkowski [Mon, 20 Jul 2015 13:17:10 +0000 (15:17 +0200)]
omap3: Reboot mode support

Reboot mode is written in scratchpad memory before reboot in the form of a
single char, that is the first letter of the reboot mode string as passed to the
reboot function.

This mechanism is supported on OMAP3 both my the upstream kernel and by various
TI kernels.

It is up to each board to make use of this mechanism or not.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
9 years agoinput: twl4030: Keypad scan and input
Paul Kocialkowski [Mon, 20 Jul 2015 13:17:09 +0000 (15:17 +0200)]
input: twl4030: Keypad scan and input

This allows scanning the twl4030 keypad, storing the result in a 64-byte long
matrix with the twl4030_keypad_scan function.

Detecting a key at a given column and row is made easier with the
twl4030_keypad_key function.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
9 years agoinput: TWL4030 input support for power button, USB and charger
Paul Kocialkowski [Mon, 20 Jul 2015 13:17:08 +0000 (15:17 +0200)]
input: TWL4030 input support for power button, USB and charger

This adds support for detecting a few inputs exported by the TWL4030.
Currently-supported inputs are the power button, USB and charger presence.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
9 years agopower: twl4030: Power off support
Paul Kocialkowski [Mon, 20 Jul 2015 13:17:07 +0000 (15:17 +0200)]
power: twl4030: Power off support

This adds support for powering off (the omap3 SoC) from the twl4030. This is
especially useful when the kernel does not actually power off the device using
this method but reboots and leaves it up to the bootloader to actually turn the
power off.
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
9 years agolpc32xx: devkit3250: add spl build support
Vladimir Zapolskiy [Fri, 17 Jul 2015 22:47:11 +0000 (01:47 +0300)]
lpc32xx: devkit3250: add spl build support

The change adds SPL build support to Timll DevKit3250 board, the
generated SPL image can be uploaded over UART5, JTAG or stored on
NAND. SPL is designed to load U-boot image from NAND.

All new NAND chip defines in board configuration are needed by
SPL NAND "simple" framework, the framework is used to reduce
potentially duplicated code from LPC32xx SLC NAND driver.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
9 years agolpc32xx: devkit3250: update of board configuration
Vladimir Zapolskiy [Fri, 17 Jul 2015 22:47:10 +0000 (01:47 +0300)]
lpc32xx: devkit3250: update of board configuration

This change adds more peripherals to Timll DevKit3250 board, namely
MAC and SMSC phy, SLC NAND, GPIO, SPI and I2C.

Also the default serial console is changed to UART5, added an option
to pass device tree blob by means of bootm, predefined environment
variables are slightly extended and reserved space on NAND to store
user defined U-boot environment.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
9 years agonand: lpc32xx: add SLC NAND controller support
Vladimir Zapolskiy [Sat, 18 Jul 2015 00:07:52 +0000 (03:07 +0300)]
nand: lpc32xx: add SLC NAND controller support

The change adds support of LPC32xx SLC NAND controller.

LPC32xx SoC has two different mutually exclusive NAND controllers to
communicate with single and multiple layer chips.

This simple driver allows to specify NAND chip timings and defines
custom read_buf()/write_buf() operations, because access to 8-bit data
register must be 32-bit aligned.

Support of hardware ECC calculation is not implemented (data
correction is always done by software), since it requires a working
DMA engine.

The driver can be included to an SPL image.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
9 years agospl: nand: simple: replace readb() with chip specific read_buf()
Vladimir Zapolskiy [Fri, 17 Jul 2015 22:47:08 +0000 (01:47 +0300)]
spl: nand: simple: replace readb() with chip specific read_buf()

Some NAND controllers define custom functions to read data out,
respect this in order to correctly support bad block handling in
simple SPL NAND framework.

NAND controller specific read_buf() is used even to read 1 byte in
case of connected 8-bit NAND device, it turns out that read_byte()
may become outdated.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tom Warren <twarren@nvidia.com>
Acked-by: Scott Wood <scottwood@freescale.com>
9 years agoimage: fix Android ramdisk support when dtb is specified
Rob Herring [Fri, 17 Jul 2015 15:57:17 +0000 (10:57 -0500)]
image: fix Android ramdisk support when dtb is specified

If a dtb is specified on the command-line, the Android boot image ramdisk
will not be found. Fix this so that we can specify the ramdisk address and
dtb address. The syntax is to enter the Android boot image address for
both the kernel and ramdisk.

Signed-off-by: Rob Herring <robh@kernel.org>
9 years agoJFFS2: Use merge sort when parsing filesystem
Mark Tomlinson [Wed, 1 Jul 2015 04:38:29 +0000 (16:38 +1200)]
JFFS2: Use merge sort when parsing filesystem

When building the file system the existing code does an insertion into
a linked list. It attempts to speed this up by keeping a pointer to
where the last entry was inserted but it's still slow.

Now the nodes are just inserted into the list without searching
through for the correct place. This unsorted list is then sorted once
using mergesort after all the entries have been added to the list.
This speeds up the scanning of the flash file system considerably.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
9 years agoJFFS2: Use CLEANMARKER to reduce scanning time
Mark Tomlinson [Wed, 1 Jul 2015 04:38:28 +0000 (16:38 +1200)]
JFFS2: Use CLEANMARKER to reduce scanning time

If a sector has a CLEANMARKER at the beginning, it indicates that the
entire sector has been erased. Therefore, if this is found, we can skip the
entire block. This was not being done before this patch.

The code now does the same as the kernel does when encountering a
CLEANMARKER. It still checks that the next few words are FFFFFFFF, and if
so, the block is assumed to be empty, and so is skipped.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
9 years agoJFFS2: Change scansize to match linux kernel
Mark Tomlinson [Wed, 1 Jul 2015 04:38:27 +0000 (16:38 +1200)]
JFFS2: Change scansize to match linux kernel

The scan code is similar to the linux kernel, but the kernel defines a much
smaller size to scan through before deciding a sector is blank. Assuming
that what is in the kernel is OK, make these two match.

On its own, this change makes no difference to scanning of any sectors
which have a clean marker at the beginning, since the entire sector is not
blank.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
9 years agoJFFS2: Optimize building lists during scan
Mark Tomlinson [Wed, 1 Jul 2015 04:38:26 +0000 (16:38 +1200)]
JFFS2: Optimize building lists during scan

If the flash is slow, reading less from the flash into buffers makes
the process faster.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
9 years agoJFFS2: Improve speed reading flash files
Mark Tomlinson [Wed, 1 Jul 2015 04:38:25 +0000 (16:38 +1200)]
JFFS2: Improve speed reading flash files

jffs2_1pass_read_inode() would read the entire data for each node
in the filesystem, regardless of whether it was part of the file
to be loaded or not. By only reading the header data for an inode,
and then reading the data only when it is found to be part of the
file to be loaded, much copying of data is saved.

jffs2_1pass_list_inodes() read each inode for every file in the
directory into a buffer. By using NULL as a buffer pointer, NOR
flash simply returns a pointer, and therefore avoids a memory copy.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
9 years agoJFFS2: Only list each directory entry once
Mark Tomlinson [Wed, 1 Jul 2015 04:38:24 +0000 (16:38 +1200)]
JFFS2: Only list each directory entry once

If multiple versions of a file exist, only the most recent version
should be used. The scheme to write 0 for the inode in older versions
did not work, since this would have required writing to flash.

The only time this caused an issue was listing a directory, where older
versions of the file would still be seen. Since the directory entries
are sorted, just look at the next entry in the list, and if it's the same
move to that entry instead.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
9 years agoJFFS2: Speed up and fix comparison functions
Mark Tomlinson [Wed, 1 Jul 2015 04:38:23 +0000 (16:38 +1200)]
JFFS2: Speed up and fix comparison functions

Copying complete nodes from flash can be slow if the flash is slow
to read. By only reading the data needed, the sorting operation can
be made much faster.

The directory entry comparison function also had a two bugs. First, it
did not ensure the name was copied, so the name comparison may have
been faulty (although it would have worked with NOR flash).  Second,
setting the ino to zero to ignore the entry did not work, since this
was either writing to a temporary buffer, or (for NOR flash) directly
to flash. Either way, the change was not remembered.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
9 years agoJFFS2: Return early when file read not necessary
Mark Tomlinson [Wed, 1 Jul 2015 04:38:22 +0000 (16:38 +1200)]
JFFS2: Return early when file read not necessary

If a destination is not provided, jffs2_1pass_read_inode() only
returns the length of the file. In this case, avoid reading all
the data nodes, and return as soon as the length of the file is
known.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
9 years agoarm: bcmcygnus: Enable Ethernet support
Jiandong Zheng [Wed, 15 Jul 2015 23:28:14 +0000 (16:28 -0700)]
arm: bcmcygnus: Enable Ethernet support

Enable BCM SF2 ethernet and PHY for BCM Cygnus SoC

Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agoarm, at91: support for sam9260 based smartweb board
Heiko Schocher [Mon, 29 Jun 2015 07:10:48 +0000 (09:10 +0200)]
arm, at91: support for sam9260 based smartweb board

add support for the at91sam9260 based board smartweb from
siemens. SPL is used without serial support, as this
SoC has only 4k sram for running SPL. Here a U-Boot
bootlog:

RomBOOT
>

U-Boot 2015.07-rc2-00109-g4ae828c (Jun 15 2015 - 09:31:16 +0200)

CPU: AT91SAM9260
Crystal frequency:   18.432 MHz
CPU clock        :  198.656 MHz
Master clock     :   99.328 MHz
       Watchdog enabled
DRAM:  64 MiB
WARNING: Caches not enabled
NAND:  256 MiB
In:    serial
Out:   serial
Err:   serial
Net:   macb0
Hit any key to stop autoboot:  0
U-Boot>

Signed-off-by: Heiko Schocher <hs@denx.de>
9 years agonand, atmel: remove udelay in spl_nand_erase_one()
Heiko Schocher [Mon, 29 Jun 2015 07:10:47 +0000 (09:10 +0200)]
nand, atmel: remove udelay in spl_nand_erase_one()

remove unneeded udelay() in this function, as we use
the dev_ready pin.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
9 years agospl, common, serial: build SPL without serial support
Heiko Schocher [Mon, 29 Jun 2015 07:10:46 +0000 (09:10 +0200)]
spl, common, serial: build SPL without serial support

This patch enables building SPL without
CONFIG_SPL_SERIAL_SUPPORT support.

Signed-off-by: Heiko Schocher <hs@denx.de>
[trini: Ensure we build arch/arm/imx-common on mx28]
Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agonet: e1000: Increase autoneg timeout to 8 seconds
Stefan Roese [Tue, 11 Aug 2015 15:12:44 +0000 (17:12 +0200)]
net: e1000: Increase autoneg timeout to 8 seconds

The current 4.5 timeout for the autonegotiation are not enough to
complete it on my platform. Using the Intel E1000 PCIe card in the
Marvell db-mv784mp-gp eval board. So lets increase the timeout to
8 seconds.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Simon Glass <sjg@chromium.org>