For JEDEC flash, we should issue word programming command relative to
base address rather than sector base address. Original source makes
SST Flash fails to program sectors which are not on the 0x10000 boundaries.
e.g.
SST39LF040 uses addr1=0x5555 and addr2=0x2AAA, however, each sector
is 0x1000 bytes.
Thus, if we issue command to "sector base (0x41000) + offset(0x5555)",
it sends to 0x46555 and the chip fails to recognize that address.
This patch is tested with SST39LF040.
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com> Signed-off-by: Stefan Roese <sr@denx.de>
This patch implements the is_pci_host() function in a similiar way
as it is used on 440 targets.
The former path with CONFIG_PCI_HOST == PCI_HOST_AUTO does not
build on 405EP targets because checking the PCI arbiter is different.
So putting the fixed code into a separate function makes the code
more readable.
Also using is_pci_host() on 405 brings 405 and 440 PCI code
a little bit closer.
In preparation for an upcoming 405EP based PMC module I made this
function weak so that it can be overwritten from board specific code.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Fixed PPC4xx debug compilation error in uic.c
This patch fixes a debug compilation error for PPC4xx platforms, all
other architectures are not affected by this change. The 'handler'
pointer was undefined. The fix is exercised and has effect only if
DEBUG is defined.
Signed-off-by: Alessio Centazzo acpatin@yahoo.com Signed-off-by: Stefan Roese <sr@denx.de>
Felix Radensky [Wed, 1 Jul 2009 08:37:46 +0000 (11:37 +0300)]
4xx: Fix compilation warnings and MQ registers dump in SPD DDR2 code
This patch fixes printf format string compilation warnings in several
debug statements. It also fixes the dump of DDR controller MQ registers
found on some 44x and 46x platforms. The current register dump code
uses incorrect DCRs to access these registers.
Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
Felix Radensky [Mon, 22 Jun 2009 12:30:42 +0000 (15:30 +0300)]
ppc4xx: Fix FDT EBC mappings on Canyonlands
This patch fixes 2 problems with FDT EBC mappings on Canyonlands.
First, NAND EBC mapping was missing, making Linux NAND driver
unusable on this board. Second, NOR remapping code assumed that
NOR is always on CS0, however when booting from NAND NOR is on CS3.
Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
HeungJun Kim [Tue, 30 Jun 2009 05:42:22 +0000 (14:42 +0900)]
env_onenand: change env_address type from unsigned long to loff_t
If use the onenand boot, the env_relocate_spec() calls mtd->read(),
and the type of the argument #2 of mtd->read() was changed to loff_t.
But, the "env_addr" type is still unsigned long, thus this patch change
the type from unsigned long to loff_t.
Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Mingkai Hu [Thu, 18 Jun 2009 10:23:27 +0000 (18:23 +0800)]
fsl_elbc_nand: redirect the pointer of bbt pattern to RAM
The bbt descriptors contains the pointer to the bbt pattern which
are statically initialized memory struct. When relocated to RAM,
these pointers will continue point to NOR flash(or L2 SRAM, or
other boot device). If the contents of NOR flash changed or L2
SRAM disabled, it'll hang the system.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Wed, 24 Jun 2009 22:23:49 +0000 (17:23 -0500)]
nand_spl: Fix cmd_ctrl usage in nand_boot.c.
When adding large page NAND support to this file, I had a misunderstanding
about the exact semantics of NAND_CTRL_CHANGE (which isn't documented
anywhere I can find) -- it is apparently just a hint to drivers,
which aren't required to preserve the old value for subsequent
non-"change" invocations.
This change makes nand_boot.c no longer assume this. Note that this
happened to work by chance with some NAND drivers, which don't preserve
the value, but treat 0 equivalently to NAND_CTRL_ALE.
I don't have hardware to test this, so any testing is appreciated.
Signed-off-by: Scott Wood <scottwood@freescale.com>
nand_spl: read environment early, when booting from NAND using nand_spl
Currently, when booting from NAND using nand_spl, in the beginning the default
environment is used until later in boot process the dynamic environment is read
out. This way environment variables that must be interpreted early, like the
baudrate or "silent", cannot be modified dynamically and remain at their
default values. Fix this problem by reading out main and redundand (if used)
copies of the environment in the nand_spl code.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
Wolfgang Denk [Sun, 24 May 2009 15:34:33 +0000 (17:34 +0200)]
nand/onenand: Fix missing argument checking for "markbad" command
The "nand markbad" and "onenand markbad" commands did not check if an
argument was passed; if this was forgotten, no error was raised but
block 0 was marked as bad.
While fixing this bug, clean up the code a bit and allow to pass more
than one block address, thus allowing to mark several blocks as bad
in a single command invocation.
Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
Mike Frysinger [Tue, 26 May 2009 02:42:28 +0000 (22:42 -0400)]
mtd: nand: new base driver for memory mapped nand devices
The BF537-STAMP Blackfin board had a driver for working with NAND devices
that are simply memory mapped. Since there is nothing Blackfin specific
about this, generalize the driver a bit so that everyone can leverage it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
David Brownell [Sun, 10 May 2009 22:43:01 +0000 (15:43 -0700)]
davinci_nand chipselect/init cleanup
Update chipselect handling in davinci_nand.c so that it can
handle 2 GByte chips the same way Linux does: as one device,
even though it has two halves with independent chip selects.
For such chips the "nand info" command reports:
Device 0: 2x nand0, sector size 128 KiB
Switch to use the default chipselect function unless the board
really needs its own. The logic for the Sonata board moves out
of the driver into board-specific code. (Which doesn't affect
current build breakage if its NAND support is enabled...)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
Sandeep Paulraj [Sat, 9 May 2009 16:35:20 +0000 (12:35 -0400)]
NAND DaVinci: Update to ALE/CLE Mask values
All DaVinci SOC's use a CLE mask of 0x10 and an ALE mask of 0x8
except the DM646x. This was decided by the design team driving the design.
This patch updates the CLE and ALE values for DM646x.
Updated patches for DM646x will be sent shortly.
This applies to u-boot-nand-flash git
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
David Brownell [Tue, 28 Apr 2009 20:19:53 +0000 (13:19 -0700)]
davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC)
Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option. It's not just nasty;
it's also unused by any current boards, and doesn't even match the
main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC
on newer chips that support it).
DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30,
match non-BROKEN code paths for 1-bit HW ECC. The BROKEN code paths
do seem to partially match what MontaVista/TI kernels (4.0/2.6.10,
and 5.0/2.6.18) do ... but only for small pages. Large page support
is really broken (and it's unclear just what software it was trying
to match!), and the ECC layout was making three more bytes available
for use by filesystem (or whatever) code.
Since this option itself seems broken, remove it. Add a comment
about the MV/TI compat issue, and the most straightforward way to
address it (should someone really need to solve it).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
David Brownell [Tue, 28 Apr 2009 20:19:50 +0000 (13:19 -0700)]
davinci_nand: cleanup I (minor)
Minor cleanup for DaVinci NAND code:
- Use I/O addresses from nand_chip; CONFIG_SYS_NAND_BASE won't
be defined when there are multiple chipselect lines in use
(as with common 2 GByte chips).
- Cleanup handling of EMIF control registers
* Only need one pointer pointing to them
* Remove incorrect and unused struct supersetting them
- Use the standard waitfunc; we don't need a custom version
- Partial legacy cleanup:
* Don't initialize every board like it's a DM6446 EVM
* #ifdef a bit more code for BROKEN_ECC
Sanity checked with small page NAND on dm355 and dm6446 EVMs;
and large page on dm355 EVM (packaged as two devices, not one).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
Stefan Roese [Mon, 29 Jun 2009 11:30:50 +0000 (13:30 +0200)]
UBI: Fix build problem noticed on Apollon (arm/testing repo)
This patch fixes a build problem noticed on Apollon by using
mtd_dev_by_eb() instead of "/" as done in the Linux UBI version.
So this brings the U-Boot UBI version more in sync with the Linux
version again.
Mike Frysinger [Fri, 19 Jun 2009 07:20:06 +0000 (03:20 -0400)]
sf: sst: fix sector size
Looks like when I was encoding the sector sizes, I forgot to divide by 8
(due to the stupid marketing driven process that declares all sizes in
useless megabits and not megabytes).
arm nomadik: use 1000 as HZ value and rewrite timer code
This sets CONFIG_SYS_HZ to 1000 as required, and completely rewrites
timer code, which is now both correct and much smaller. Unused
functions like udelay_masked() have been removed as no driver uses
them, even the ones that are not currently active for this board.
mtu.h is copied literally from the kernel sources.
The evaluation kit has both Nand and OneNand, both drivers are there
and the two configurations only select a different default for the
jffs partition. This adds the OneNand driver and cleans up storage.
Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Thomas Lange [Sat, 20 Jun 2009 09:02:17 +0000 (11:02 +0200)]
ARM DaVinci: EMIF settings
NAND module should not modify EMIF registers unrelated to CS2
that is used for NAND, i.e. do not modify EWAIT config register
or registers for other Chip Selects.
Without this patch, EMIF configurations made in board_init()
will be invalidated.
Sedji Gaouaou [Wed, 24 Jun 2009 06:32:09 +0000 (08:32 +0200)]
at91sam9260/9263: add back up for the rst(reset controller).
On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register was
set to 0 after being set to 500 ms for the PHY reset.
Do backup the old reset length and restore it after the MACB initialisation.
Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com> Signed-off-by: Stelian Pop <stelian@popies.net>
Kumar Gala [Fri, 3 Jul 2009 17:45:44 +0000 (12:45 -0500)]
fsl: Fix compiler warnings from gcc-4.4 in sys_eeprom code
sys_eeprom.c: In function 'do_mac':
sys_eeprom.c:323: warning: dereferencing type-punned pointer will break strict-aliasing rules
sys_eeprom.c: In function 'mac_read_from_eeprom':
sys_eeprom.c:395: warning: dereferencing type-punned pointer will break strict-aliasing rules
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Peter Tyser [Tue, 30 Jun 2009 22:15:51 +0000 (17:15 -0500)]
83xx: Add support for fsl_dma driver
Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Reviewed-by: Ira W. Snyder <iws@ovro.caltech.edu> Tested-by: Ira W. Snyder <iws@ovro.caltech.edu> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Peter Tyser [Tue, 30 Jun 2009 22:15:50 +0000 (17:15 -0500)]
83xx: Replace CONFIG_ECC_INIT_VIA_DDRC references
Update 83xx architecture's CONFIG_ECC_INIT_VIA_DDRC references to
CONFIG_ECC_INIT_VIA_DDRCONTROLLER, which other Freescale architectures
use
Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
8xxx: Second UART port added for MPC85xx, MPC83xx, MPC86xx processors
Defining the next two configs allows to switch the serial port from the
console using the setenv stdin and stdout
1. #define CONFIG_SERIAL_MULTI 1 /* Enable both serial ports */
2. #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Wed, 1 Jul 2009 21:51:59 +0000 (16:51 -0500)]
fsl_ddr: Fix DDR3 calculation of rank density with 8GB or more
The calculate for rank density in compute_ranksize() for DDR3 used all
integers for the expression, so the result was also a 32-bit integer, even
though the 'bsize' variable is a u64. Fix the expression to calculate a
true 64-bit value.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Peter Tyser [Tue, 30 Jun 2009 22:15:49 +0000 (17:15 -0500)]
fsl_dma: Make DMA transactions snoopable
Make DMA transactions snoopable so that CPUs can keep caches up-to-date.
This allows dma transactions to be used for operations such as memory
copies without any additional cache control operations.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Peter Tyser [Tue, 30 Jun 2009 22:15:44 +0000 (17:15 -0500)]
fsl_dma: Fix Channel Start bug in dma_check()
The Channel Start (CS) bit in the Mode Register (MR) should actually be
cleared as the comment in the code suggests. Previously, CS was being
set, not cleared.
Assuming normal operation of the DMA engine, this change shouldn't have
any real affect.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 18 Jun 2009 13:39:42 +0000 (08:39 -0500)]
8xxx: Fix PCI bus address setup for 36-bit configs
We want the outbound PCI memory map to end at the 4G boundary so we
can maximize the amount of space available for inbound mappings if
we have large amounts of memory.
This matches the device tree setup in the kernel for the 36-bit physical
configs for the platforms that have one (MPC8641 HPCN & MPC8572 DS).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 18 Jun 2009 13:23:01 +0000 (08:23 -0500)]
86xx: Add CPU_TYPE_ENTRY support
Unify with 83xx and 85xx and use CPU_TYPE_ENTRY. We are going to use
this to convey the # of cores and DDR width in the near future so its
good to keep in sync.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Peter Meerwald [Mon, 29 Jun 2009 19:48:33 +0000 (15:48 -0400)]
Blackfin: TWI/I2C: fix pure writes
If doing a pure write with register address and data (not a read/write
combo transfer), we don't set the initial transfer length properly which
ends up causing only the register address to be transferred.
While we're here, fix the i2c_write() parameter description of the buffer.
Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Minkyu Kang [Thu, 25 Jun 2009 10:21:33 +0000 (19:21 +0900)]
s3c64xx: move the reset_cpu function
Because of the reset_cpu is soc specific, should be move to soc
And read reset value from SYS_ID register instead of hard code
this patch also supports s3c6410
Magnus Lilja [Sat, 13 Jun 2009 18:50:01 +0000 (20:50 +0200)]
MX31: Add NAND SPL for i.MX31.
This patch adds the NAND SPL framework needed to boot i.MX31 boards
from NAND.
It has been tested on a i.MX31 PDK board with large page NAND. Small
page NANDs should work as well, but this has not been tested.
Note: The i.MX31 NFC uses a non-standard layout for large page NANDs,
whether this is compatible with a particular setup depends on how
the NAND device is programmed by the flash programmer (e.g. JTAG
debugger).
The patch is based on the work by Maxim Artamonov.
Signed-off-by: Maxim Artamonov <scn1874@yandex.ru> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Magnus Lilja [Sat, 13 Jun 2009 18:50:00 +0000 (20:50 +0200)]
ARM1136: Introduce CONFIG_PRELOADER macro.
Currently CONFIG_ONENAND_IPL is used in a number of #ifdef's
in start.S. In preparation for adding support for NAND SPL
the macro CONFIG_PRELOADER is introducted and replaces the
CONFIG_ONENAND_IPL in start.S.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
projects / u-boot / log