Marek Vasut [Fri, 21 Oct 2011 14:17:06 +0000 (14:17 +0000)]
GCC4.6: Squash warnings in denali_data_eye.c
denali_data_eye.c: In function
'denali_core_search_data_eye':denali_spd_ddr2.c:646: warning: format '%d'
expects type 'int', but argument 2 has type 'long unsigned int'
denali_data_eye.c:320: warning: format '%08lx' expects type 'long unsigned int',
but argument 2 has type 'u32'
denali_data_eye.c:330: warning: format '%08lx' expects type 'long unsigned int',
but argument 2 has type 'u32'
denali_spd_ddr2.c:676: warning: format '%d' expects type 'int', but argument 2
has type 'long unsigned int'
denali_data_eye.c:340: warning: format '%08lx' expects type 'long unsigned int',
but argument 2 has type 'u32'
denali_data_eye.c:350: warning: format '%08lx' expects type 'long unsigned int',
but argument 2 has type 'u32'
denali_data_eye.c:360: warning: format '%08lx' expects type 'long unsigned int',
but argument 2 has type 'u32'
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org>
Marek Vasut [Fri, 21 Oct 2011 14:17:02 +0000 (14:17 +0000)]
PowerPC: Squash warning in mpc512x serial.c
serial.c: In function 'serial_setbrg_dev':
serial.c:143: warning: format '%d' expects type 'int', but argument 4 has type
'long unsigned int'
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org>
Doug Anderson [Wed, 19 Oct 2011 09:47:31 +0000 (09:47 +0000)]
disk: part_efi: fix **pgpt_pte == NULL
Code was setting **pgpt_pte == NULL, which meant that the pointer
to the gpt_pte would be stored at RAM address 00000000. This 'worked'
on T20 (SDRAM starts @ 0x00000000), but hung gpt/EFI access on T30
(SDRAM starts @ 0x80000000).
Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Doug Anderson <dianders@chromium.org>
Simon Glass [Wed, 26 Oct 2011 14:18:38 +0000 (14:18 +0000)]
net: Hide more code behind CONFIG_CMD_TFTPPUT
This commit reduces code size a little by making the ICMP handler only
available to tftpput. This is reasonable since it is the only user at
present (ping just uses the normal handler).
J. Vijayanand [Wed, 19 Oct 2011 07:43:08 +0000 (07:43 +0000)]
fat: correct ATTR_VFAT check
ATTR_VFAT condition requires multiple bits to be set but the present
condition checking in do_fat_read() & get_dentfromdir() ends up
passing on even a single bit being set.
Signed-off-by: J. Vijayanand <vijayanand.jayaraman@in.bosch.com> Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Donggeun Kim [Mon, 24 Oct 2011 21:15:28 +0000 (21:15 +0000)]
FAT: Add FAT write feature
In some cases, saving data in RAM as a file with FAT format is required.
This patch allows the file to be written in FAT formatted partition.
The usage is similar with reading a file.
First, fat_register_device function is called before file_fat_write function
in order to set target partition.
Then, file_fat_write function is invoked with desired file name,
start ram address for writing data, and file size.
Signed-off-by: Donggeun Kim <dg77.kim@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Simon Glass [Mon, 24 Oct 2011 19:15:34 +0000 (19:15 +0000)]
fdt: ARM: Add fdtcontroladdr to set device tree address in environment
This adds support for a new environment variable called 'fdtcontroladdr'. If
defined, the hex address is used as the address of the control fdt for U-Boot.
Note: I have not changed CONFIG_PRAM section as I already have an
outstanding patch on that.
Simon Glass [Mon, 24 Oct 2011 19:15:32 +0000 (19:15 +0000)]
fdt: add decode helper library
This library provides useful functions to drivers which want to use
the fdt to control their operation. Functions are provided to:
- look up and enumerate a device type (for example assigning i2c bus 0,
i2c bus 1, etc.)
- decode basic types from the fdt, like addresses and integers
While this library is not strictly necessary, it helps to minimise the
changes to a driver, in order to make it work under fdt control. Less
code is required, and so the barrier to switch drivers over is lower.
Additional functions to read arrays and GPIOs could be made available
here also.
Simon Glass [Mon, 24 Oct 2011 19:15:31 +0000 (19:15 +0000)]
fdt: Add support for a separate device tree (CONFIG_OF_SEPARATE)
This adds support for an FDT to be build as a separate binary file called
u-boot.dtb. This can be concatenated with the U-Boot binary to provide a
device tree located at run-time by U-Boot. The Makefile is modified to
provide this file in u-boot-dtb.bin.
Simon Glass [Sat, 15 Oct 2011 05:48:21 +0000 (05:48 +0000)]
fdt: Add support for embedded device tree (CONFIG_OF_EMBED)
This new option allows U-Boot to embed a binary device tree into its image
to allow run-time control of peripherals. This device tree is for U-Boot's
own use and is not necessarily the same one as is passed to the kernel.
The device tree compiler output should be placed in the $(obj)
rooted tree. Since $(OBJCOPY) insists on adding the path to the
generated symbol names, to ensure consistency it should be
invoked from the directory where the .dtb file is located and
given the input file name without the path.
This commit contains my entry for the ugliest Makefile / shell interaction
competition.
Simon Glass [Sat, 15 Oct 2011 05:48:20 +0000 (05:48 +0000)]
fdt: ARM: Add device tree control of U-Boot (CONFIG_OF_CONTROL)
This adds a device tree pointer to the global data. It can be set by
board code. A later commit will add support for making a device
tree binary blob available to U-Boot for run-time configuration.
Simon Glass [Mon, 24 Oct 2011 18:00:02 +0000 (18:00 +0000)]
net: tftpput: Rename TFTP to TFTPGET
This is a better name for this protocol. Also remove the typedef to keep
checkpatch happy, and move zeroing of NetBootFileXferSize a little
earlier since TFTPPUT will need to change this.
Simon Glass [Mon, 24 Oct 2011 18:00:01 +0000 (18:00 +0000)]
net: tftpput: Add support for receiving ICMP packets
ICMP packets can tell you when there is no server at the other end. It
is useful for tftp to figure this out, so that a quick error can be
displayed, rather than pointlessly retrying.
This adds an ICMP packet handler to the net interface.
Note: This is kind of guess work. The current code is preserved for
all RGMII related modes. It is different for flags=0 (GMII) and flags=5
(SGMII). The last case, SGMII, is successfully tested on
Altera's Terasic DE4.
Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
Currently part_efi.c allocates buffers for the gpt_header, the
legacy_mbr, and the pte (partition table entry) that may be
incorrectly aligned for DMA operations.
This patch uses ALLOC_CACHE_ALIGN_BUFFER for the stack allocated
buffers and memalign to replace the malloc of the pte.
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Mike Frysinger <vapier@gentoo.org>
Anton staaf [Tue, 4 Oct 2011 11:24:50 +0000 (11:24 +0000)]
mmc: dcache: allocate cache aligned buffers for ext_csd
Currently the mmc_change_freq and mmc_startup functions allocates
buffers on the stack that are passed down to the MMC device driver.
These buffers could be unaligned to the L1 dcache line size. This
causes problems when using DMA and with caches enabled.
This patch correctly cache alignes the buffers used for reading the
ext_csd data from an MMC device.
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Anton staaf [Mon, 3 Oct 2011 13:55:00 +0000 (13:55 +0000)]
ext2: Cache line aligned partial sector bounce buffer
Currently, if a device read request is done that does not begin or end
on a sector boundary a stack allocated bounce buffer is used to perform
the read, and then just the part of the sector that is needed is copied
into the users buffer. This stack allocation can mean that the bounce
buffer will not be aligned to the dcache line size. This is a problem
when caches are enabled because unaligned cache invalidates are not
safe.
This patch uses ALLOC_CACHE_ALIGN_BUFFER to create a stack allocated
cache line size aligned bounce buffer.
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Dave Liu <r63238@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Change-Id: I32e1594d90ef039137bb219b0f7ced55768744ff Acked-by: Mike Frysinger <vapier@gentoo.org>
Anton staaf [Mon, 3 Oct 2011 13:54:59 +0000 (13:54 +0000)]
mmc: dcache: allocate cache aligned buffer for scr and switch_status
Currently the sd_change_freq function allocates two buffers on the
stack that it passes down to the MMC device driver. These buffers
could be unaligned to the L1 dcache line size. This causes problems
when using DMA and with caches enabled.
This patch correctly cache alignes the buffers used for reading the
scr register and switch status values from an MMC device.
Change-Id: Ifa8414f572ef907681bd2d5ff3950285a215357d Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Mike Frysinger <vapier@gentoo.org>
Anton staaf [Mon, 3 Oct 2011 13:54:58 +0000 (13:54 +0000)]
tegra: define CONFIG_SYS_CACHELINE_SIZE for tegra
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Tom Warren <twarren.nvidia@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Change-Id: I5c4bcfc0bfe59158ff249fe3be6640eec6d3cc76 Acked-by: Mike Frysinger <vapier@gentoo.org>
Anton staaf [Wed, 12 Oct 2011 13:55:59 +0000 (13:55 +0000)]
cache: add ALLOC_CACHE_ALIGN_BUFFER macro
This macro is used to allocate cache line size aligned stack
buffers for use with DMA hardware.
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Aneesh V <aneesh@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Mon, 24 Oct 2011 19:14:42 +0000 (21:14 +0200)]
Revert "km_arm: enable POST for these boards"
This reverts commit a2da616311151ecfab8b8fcc510686fc3c0c9a21.
THis was applied by accident - a more recent version of this change
was already present, see commit 9400f8f 2011-10-05 22:03:11 +0200 km_arm: enable POST for these boards
Simon Glass [Sun, 23 Oct 2011 17:44:35 +0000 (17:44 +0000)]
arm: Correct build error introduced by getenv_ulong() patch
Commit dc8bbea removed a local variable that is used in most ARM boards.
Since we want to avoid an 'unused variable' warning with later compilers,
and the #ifdef logic of whether this variable is required is bit painful,
this declares the variable local to the block of code that needs it.
Stefano Babic [Mon, 17 Oct 2011 00:07:43 +0000 (00:07 +0000)]
mkimage: adding support for Davinci AIS image
Some Davinci processors supports the Application
Image Script (AIS) boot process. The patch adds the generation
of the AIS image inside the mkimage tool to make possible
to generate a bootable U-boot without external tools
(TI Davinci AIS Generator).
Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Wolfgang Denk <wd@denx.de>
Mike Frysinger [Sun, 16 Oct 2011 10:04:10 +0000 (10:04 +0000)]
net: ns9750: drop !NET_MULTI driver
Only one board uses this driver (ns9750dev), but the board doesn't seem
to have an entry to actually build it in the Makefile/boards.cfg, so just
delete net support from its board config.
Bernhard Kaindl [Sun, 16 Oct 2011 00:07:08 +0000 (00:07 +0000)]
powerpc/lib/board.c: Call run_post(POST_ROM) before relocating
The call to run_post(POST_ROM) which can run the POST memory test
is currently called too late when gd has already been copied to DRAM.
This results in failure to boot Linux after a POST_ROM memory test
tested all RAM while gd was already relocated to DRAM due to gd being
overwritten by the POST_ROM memory test.
Support this by moving the call to run_post(POST_ROM) to run earlier,
before U-Boot has started to move data to DRAM (from late board_init_f
to early board_init_f) where DRAM is initialized, but not used yet.
This allows that an POST memory test can test the whole DRAM,
including the area where the board info struct is located.
Signed-off-by: Bernhard Kaindl <bernhard.kaindl@thalesgroup.com> Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
Bernhard Kaindl [Sat, 15 Oct 2011 23:59:22 +0000 (23:59 +0000)]
net/dns.c: Fix endian conversion for big-endian in dns command
net/dns.c used endian conversion macros wrongly (shorts in reply
were put swapped into CPU, and then ntohs() was used to swap it
back, which broke on big-endian).
Fix this by using the correct linux conversion macro for reading
a unaligned short in network byte order: get_unaligned_be16()
Thanks to Mike Frysinger pointing at the best macro to use.
Tested on big and little endian qemu boards (mips and versatile)
Signed-off-by: Bernhard Kaindl <bernhard.kaindl@thalesgroup.com> Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl> Cc: Robin Getz <rgetz@blackfin.uclinux.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
Anton Staaf [Mon, 17 Oct 2011 23:46:13 +0000 (16:46 -0700)]
cache: include asm/cache.h for ARCH_DMA_MINALIGN definition
ARCH_DMA_MINALIGN will be used to allocate DMA buffers that are
aligned correctly. In all current cases this means that the DMA
buffer will be aligned to at least the L1 data cache line size of
the configured architecture. If the board configuration file
does not specify the architecture L1 data cache line size then the
maximum line size of the architecture is used to align DMA buffers.
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Laurence Withers <lwithers@guralp.com>
Anton Staaf [Mon, 17 Oct 2011 23:46:06 +0000 (16:46 -0700)]
powerpc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
Signed-off-by: Anton Staaf <robotboy@chromium.org> Acked-by: Stefan Roese <sr@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de>
Anton Staaf [Mon, 17 Oct 2011 23:46:04 +0000 (16:46 -0700)]
m68k: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Jason Jin <jason.jin@freescale.com>
Wolfgang Denk [Sun, 23 Oct 2011 15:00:47 +0000 (17:00 +0200)]
MPC85xx: remove broken "mpq101" board
The board stopped building some time ago, and the board maintainer
agrtees to drop it - see
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/112674
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Alex Dubov <oakad@yahoo.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Kumar Gala <galak@kernel.crashing.org>
Michal Simek [Tue, 18 Oct 2011 00:22:10 +0000 (00:22 +0000)]
serial: uartlite: Fix compilation warnings
Do not setup userial_ports array as const because
in uartlite_serial_putc is out_be32 which can't write
to tx_fifo if is const.
Warning log:
serial_xuartlite.c: In function 'uartlite_serial_putc':
serial_xuartlite.c:60: warning: initialization discards qualifiers from pointer target type
serial_xuartlite.c: In function 'uartlite_serial_getc':
serial_xuartlite.c:78: warning: initialization discards qualifiers from pointer target type
serial_xuartlite.c: In function 'uartlite_serial_tstc':
serial_xuartlite.c:87: warning: initialization discards qualifiers from pointer target type
Remove MK_STR from places that consume CONFIG_BOOTFILE to force all definitions to be string literals.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
Remove MK_STR from places that consume CONFIG_ROOTPATH to force all definitions to be string literals.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 12 Oct 2011 19:48:00 +0000 (19:48 +0000)]
autoconf.mk.dep: use target cflags, not host
The current autoconf.mk.dep rule uses the host cflags when executing the
target compiler (which includes target header files). We don't want to
mix the target compiler and host compiler flags, so change it to CFLAGS.
Otherwise we get things like -pedantic which the U-Boot source code does
not build with.
Seems people fixed their files to use libfoo.o, but didn't actually
update the creation targets to use $(cmd_link_o_target). Update the
rest of the Makefile's found with grep.
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Tested-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Tue, 18 Oct 2011 11:11:49 +0000 (11:11 +0000)]
checkpatch whitespace cleanups
This avoids the following checkpatch warning in later patches:
ERROR: "(foo*)" should be "(foo *)"
ERROR: space required before the open brace '{'
ERROR: space prohibited before that close parenthesis ')'
ERROR: spaces required around that '||' (ctx:WxV)
WARNING: space prohibited between function name and open parenthesis '('
WARNING: line over 80 characters
This fixes all the white-space warnings/errors in my subsequent patch,
and within this current patch. A number of other checkpatch warnings
and errors are still present in this patch itself, but are beyond simple
whitespace fixes, so are not solved by this patch.
v2: New patch
Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Tang Yuantian [Fri, 7 Oct 2011 19:26:58 +0000 (19:26 +0000)]
drivers: add the support for Silicon Image SATA controller
Add the Silicon Image series PCI Express to
Serial ATA controller support, including Sil3132,
Sil3131 and Sil3124.
The SATA controller can be used to load kernel.
The features list:
- Supports 1-lane 2.5 Gbit/s PCI Express
- Supports one/two/four independent Serial ATA channels
- Supports Serial ATA Generation 2 transfer rate of 3.0 Gbit/s
- Supports LBA28 and LBA48
Signed-off-by: Tang Yuantian <b29983@freescale.com> Signed-off-by: Aaron Williams <Aaron.Williams@cavium.com> Tested-by: Lan Chunhe <b25806@freescale.com>
Macpaul Lin [Tue, 11 Oct 2011 22:33:18 +0000 (22:33 +0000)]
nds32/ag101: cpu and init funcs of SoC ag101
SoC ag101 is the first chip using NDS32 N1213 cpu core.
Add header file of device offset support for SoC ag101.
Add main function of SoC ag101 based on NDS32 n1213 core.
Add lowlevel_init.S and other periphal related code.
This version of lowlevel_init.S also replace hardcode value
by MARCO defines from the GPL version andesboot for better
code quality.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>