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6 years agodm: pcie: designware: add correct ATU handling
Igal Liberman [Wed, 14 Feb 2018 17:25:23 +0000 (19:25 +0200)]
dm: pcie: designware: add correct ATU handling

Currently, ATU (address translation unit) implementation doesn't
support translate addresses > 32 bits.

This patch allows to configure ATU correctly for different
memory accesses (memory, configuration and IO).
The same approach is used in Linux Kernel.

Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoMerge git://git.denx.de/u-boot-ubi
Tom Rini [Sun, 25 Mar 2018 16:02:13 +0000 (12:02 -0400)]
Merge git://git.denx.de/u-boot-ubi

6 years agoMerge git://git.denx.de/u-boot-spi
Tom Rini [Sun, 25 Mar 2018 16:01:44 +0000 (12:01 -0400)]
Merge git://git.denx.de/u-boot-spi

6 years agoMerge git://git.denx.de/u-boot-i2c
Tom Rini [Sun, 25 Mar 2018 16:00:48 +0000 (12:00 -0400)]
Merge git://git.denx.de/u-boot-i2c

6 years agoMerge tag 'xilinx-for-v2018.05' of git://git.denx.de/u-boot-microblaze
Tom Rini [Sun, 25 Mar 2018 16:00:00 +0000 (12:00 -0400)]
Merge tag 'xilinx-for-v2018.05' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.05

- Fix mkimage recognition
- Update all my fragments

ZynqMP:
- Use clk driver
- Support loading elfs in el1
- Various DTS and defconfig changes
- Enable newer pmufw versions
- Support more clocks
- Remove ep108
- Secure image support
- Fix memtest setup

Zynq:
- Enabling watchdog driver
- Support more clocks
- defconfig changes

fpga:
- Simplify error path

net:
- GMII case update

6 years agoConvert CONFIG_UBI_SILENCE_MSG to Kconfig
Petr Vorel [Sat, 24 Mar 2018 00:49:24 +0000 (01:49 +0100)]
Convert CONFIG_UBI_SILENCE_MSG to Kconfig

Signed-off-by: Petr Vorel <petr.vorel@gmail.com>
6 years agoConvert CONFIG_UBIFS_SILENCE_MSG to Kconfig
Petr Vorel [Sat, 24 Mar 2018 00:49:23 +0000 (01:49 +0100)]
Convert CONFIG_UBIFS_SILENCE_MSG to Kconfig

Introduce another difference from upstream (kernel) source in
fs/ubifs/super.c: adding preprocessor condition as y variable in
mount_ubifs() depends on CONFIG_UBIFS_SILENCE_MSG:
fs/ubifs/super.c:1337:15: error: variable ?y? set but not used [-Werror=unused-but-set-variable]
  long long x, y;

Not setting CONFIG_UBIFS_SILENCE_MSG in am335x_igep003x_defconfig and
igep0032_defconfig. Although it was defined in their config headers, it
depends on CMD_UBIFS which is not set for them.

Signed-off-by: Petr Vorel <petr.vorel@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Heiko Schocher <hs@denx.de>
6 years agoubifs: Reintroduce using CONFIG_UBIFS_SILENCE_MSG
Petr Vorel [Sat, 24 Mar 2018 00:49:22 +0000 (01:49 +0100)]
ubifs: Reintroduce using CONFIG_UBIFS_SILENCE_MSG

Use of CONFIG_UBIFS_SILENCE_MSG was added in
147162dac6 ("ubi: ubifs: Turn off verbose prints")

Then it was removed in
ff94bc40af ("mtd, ubi, ubifs: resync with Linux-3.14")

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Petr Vorel <petr.vorel@gmail.com>
6 years agoomap3: spi: Correct ti, pindir-d0-out-d1-in parsing
Sjoerd Simons [Thu, 22 Mar 2018 21:55:02 +0000 (22:55 +0100)]
omap3: spi: Correct ti, pindir-d0-out-d1-in parsing

The ti,pindir-d0-out-d1-in property is not expected to have a value
according to the device-tree binding, so treat it as a boolean not a
uint property.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoMerge git://git.denx.de/u-boot-arc
Tom Rini [Fri, 23 Mar 2018 13:31:24 +0000 (09:31 -0400)]
Merge git://git.denx.de/u-boot-arc

Alexey:
 1. Significantly rework cache-related functionality.
    In particular that fixes coherency problems in some corner-cases,
    allows us to enable and disable caches in run-time and still
    have properly running system, finally support execution from
    real flash (before we used to run from DDR from the very beginning).

 2. Remove string routines implemented in assembly.
    That allows us to build and run U-Boot on wide range of ARC cores
    with different configurations. I.e. whatever tuning is used on GCC's
    command-line we'll get code for desired flavor of ARC.
    Otherwise for each and every corner-case we would need to add ifdefs
    in assembly code to accommodate missing instructions etc.

 3. Get use of GCC's garbage collector which helps to slim-down resulting image
    quite a bit.

 4. Also now we may disable U-Boot self-relocation for ARC if needed either
    by platform or for debugging purposes.

6 years agoARC: bootm: Refactor GO and PREP subcommands implementation
Eugeniy Paltsev [Fri, 23 Mar 2018 12:35:03 +0000 (15:35 +0300)]
ARC: bootm: Refactor GO and PREP subcommands implementation

Refactor GO and PREP subcommands implementation for a simpler
override in the boards platform code.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoMAINTAINERS: Fix Zynq/ZynqMP and Microblaze fragments
Michal Simek [Tue, 13 Mar 2018 10:07:25 +0000 (11:07 +0100)]
MAINTAINERS: Fix Zynq/ZynqMP and Microblaze fragments

Fix my fragments to list all files in the repo.

Also fix path to for Xilinx Zynq SoC (mach-zynq)
It should be the part of
"ARM: zynq: move SoC sources to mach-zynq"
(sha1: 0107f2403669f764ab726d0d404e35bb9447bbcc)

And cover dts files in board MAINTAINERS files.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agotools: xilinx: Fix zynq/zynqmp image recognition
Michal Simek [Wed, 14 Mar 2018 10:02:24 +0000 (11:02 +0100)]
tools: xilinx: Fix zynq/zynqmp image recognition

There is an issue to recognize zynq or zynqmp image because header
checking is just the same. That's why zynqmp images are recognized as
zynq one.
Check unused fields which are initialized to zero in zynq format
(__reserved1 0x38 and __reserved2 0x44) which are initialized for
zynqmp. This should ensure that images are properly recognized by:
./tools/mkimage -l spl/boot.bin

Also show image type as ZynqMP instead of Zynq which is confusing.

Reported-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Alexander Graf <agraf@suse.de>
6 years agoarm64: zynqmp: Add support for verifying secure images
Siva Durga Prasad Paladugu [Wed, 28 Feb 2018 07:56:53 +0000 (13:26 +0530)]
arm64: zynqmp: Add support for verifying secure images

This patch adds new command "zynqmp" to handle zynqmp
specific commands like "zynqmp secure". This secure command is
used for verifying zynqmp specific secure images. The secure
image can either be authenticated or encrypted or both encrypted
and authenticated. The secure image is prepared using bootgen
and will be in xilinx specific BOOT.BIN format. The optional
key can be used for decryption of encrypted image if user
key was specified while creation BOOT.BIN.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Remove ep108 board
Michal Simek [Fri, 2 Mar 2018 07:11:43 +0000 (08:11 +0100)]
arm64: zynqmp: Remove ep108 board

ZynqMP Emulation board is no longer tested and there is no reason to
keep maintaining it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Correct EG/EV part detection logic
Siva Durga Prasad Paladugu [Fri, 2 Mar 2018 10:50:10 +0000 (16:20 +0530)]
arm64: zynqmp: Correct EG/EV part detection logic

The vcu disable bit in efuse ipdisable register is valid only
if PL powered up so, consider PL powerup status for determing
EG/EV part. If PL is not powered up, ignore EG/EV part of string.
The PL powerup status will be filled by pmufw based on PL PROGB
status in the 9th bit of version field.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Print the value of pl clocks and wdt clock using clk dump
Vipul Kumar [Wed, 7 Mar 2018 09:22:44 +0000 (14:52 +0530)]
arm64: zynqmp: Print the value of pl clocks and wdt clock using clk dump

This patch print pl clocks (pl0...pl3) and watchdog
clock using clk dump.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: nand: Fixed NAND erase issue for size 1GiB or more
Vipul Kumar [Mon, 5 Mar 2018 09:54:59 +0000 (15:24 +0530)]
arm64: zynqmp: nand: Fixed NAND erase issue for size 1GiB or more

NAND erase was not happening for size 1GiB or more. Erase
command was executing successfully but in actual, it was not
erasing.
This patch fixed erase issue for 1 GiB or more size nand.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm: zynq: Remove OF_EMBED configuration for zc770 xm011 x16
Michal Simek [Mon, 26 Feb 2018 14:19:36 +0000 (15:19 +0100)]
arm: zynq: Remove OF_EMBED configuration for zc770 xm011 x16

Use appended dtb which is default option for zynq boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm: zynq: Setup the same bootcommand as for zc770 xm011 x8
Michal Simek [Mon, 26 Feb 2018 14:16:53 +0000 (15:16 +0100)]
arm: zynq: Setup the same bootcommand as for zc770 xm011 x8

The same command should be used for x16 configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Changed scratch address used by the alternate memory test
Vipul Kumar [Thu, 15 Feb 2018 05:54:41 +0000 (11:24 +0530)]
arm64: zynqmp: Changed scratch address used by the alternate memory test

This patch changed CONFIG_SYS_MEMTEST_SCRATCH address to the
accessible DDR address used by alternate memory test.
Before this, 0xfffc0000 address was used, which is the OCM
address and not enabled in MMU table. So, whenever trying
to access 0xfffc0000 address, got Synchronous Abort exception.

After changing CONFIG_SYS_MEMTEST_SCRATCH address, alternate
memory test is working fine.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm: zynq: Enable cadence driver on zc706
Michal Simek [Wed, 21 Feb 2018 16:03:55 +0000 (17:03 +0100)]
arm: zynq: Enable cadence driver on zc706

Enable watchdog with reset-on-timeout feature.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm: zynq: Wire watchdog internals
Michal Simek [Wed, 21 Feb 2018 16:04:28 +0000 (17:04 +0100)]
arm: zynq: Wire watchdog internals

Watchdog is only enabled in full u-boot. Adoption for SPL should be also
done because that's the right place where watchdog should be enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agowatchdog: Add Cadence watchdog driver
Shreenidhi Shedi [Wed, 21 Feb 2018 15:50:20 +0000 (16:50 +0100)]
watchdog: Add Cadence watchdog driver

This IP can be found on Zynq and ZynqMP devices.
The driver was tested with reset-on-timeout; feature.

Also adding WATCHDOG symbol to Kconfig because it is required.

Signed-off-by: Shreenidhi Shedi <imshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoclk: zynq: Show watchdog clock rate properly
Michal Simek [Wed, 21 Feb 2018 14:06:20 +0000 (15:06 +0100)]
clk: zynq: Show watchdog clock rate properly

watchdog clock is also connected to cpu 1X clocksource.

Zynq> clk dump
...

Before:
      swdt          4294967290
After:
      swdt           111111110

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Enable newer pmufw versions
Michal Simek [Thu, 8 Feb 2018 07:51:36 +0000 (08:51 +0100)]
arm64: zynqmp: Enable newer pmufw versions

As of now newer pmufw is keeping old interfaces. That's why permit
u-boot to run on newer version. Recommended version will be setup later.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: zynq_gem: Dont run any phy detection logic for GMII case
Siva Durga Prasad Paladugu [Tue, 20 Feb 2018 06:26:19 +0000 (11:56 +0530)]
net: zynq_gem: Dont run any phy detection logic for GMII case

This patch bypasses phy detection logic for GMII interface
and just depend on phy address received from DT. This patch
is required as phy detection logic is different for some phys
like xilinx phy which can be connected over SGMII and GMII
interface.
This fixes the issue of ethernet failures when xilinx phy is
connected over GMII interface.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoarm64: zynqmp: Add support to load an app at EL1
Nitin Jain [Fri, 16 Feb 2018 07:26:17 +0000 (12:56 +0530)]
arm64: zynqmp: Add support to load an app at EL1

This patch is adding support to switch to EL1 while loading an EL1
application with u-boot running at EL above EL1 in aarch64 mode.

Signed-off-by: Nitin Jain <nitinj@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm: zynq: Enable debug uart on Zedboard
Siva Durga Prasad Paladugu [Wed, 24 Jan 2018 11:50:32 +0000 (17:20 +0530)]
arm: zynq: Enable debug uart on Zedboard

It helps with debugging.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Enable ethernet driver for zc1751-dc5
Michal Simek [Wed, 31 Jan 2018 08:18:33 +0000 (09:18 +0100)]
arm64: zynqmp: Enable ethernet driver for zc1751-dc5

Enable missing driver on this board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agofpga: Simplify error path in fpga_add
Michal Simek [Fri, 26 Jan 2018 12:17:04 +0000 (13:17 +0100)]
fpga: Simplify error path in fpga_add

Check !desc earlier to simplify code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
6 years agoxilinx: Sync defconfigs with latest Kconfig updates
Michal Simek [Fri, 23 Mar 2018 08:34:00 +0000 (09:34 +0100)]
xilinx: Sync defconfigs with latest Kconfig updates

Make defconfigs up2date with current location.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Convert board to use zynqmp-clk driver
Michal Simek [Fri, 8 Dec 2017 13:50:42 +0000 (14:50 +0100)]
arm64: zynqmp: Convert board to use zynqmp-clk driver

Use zynqmp clock driver instead of fixed clocks.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoi2c: lpi2c: remove superfluous assignments
Heinrich Schuchardt [Sun, 18 Mar 2018 10:14:56 +0000 (11:14 +0100)]
i2c: lpi2c: remove superfluous assignments

In

lpi2c_status_t result = A;
result = B;

the first assignment has no effect. Let's remove it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agoMerge git://git.denx.de/u-boot-net
Tom Rini [Thu, 22 Mar 2018 20:35:43 +0000 (16:35 -0400)]
Merge git://git.denx.de/u-boot-net

6 years agoconfigs: omapl138: Enable DM and DT
Lokesh Vutla [Fri, 16 Mar 2018 13:22:21 +0000 (18:52 +0530)]
configs: omapl138: Enable DM and DT

Enable Driver Model and Device-tree support for omapl138 board
in U-Boot. Also enable DM_SERIAL and DM_I2C.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agoARM: dts: da850-lcdk: Sync from Linux 4.16
Lokesh Vutla [Fri, 16 Mar 2018 13:22:20 +0000 (18:52 +0530)]
ARM: dts: da850-lcdk: Sync from Linux 4.16

Sync dts from Linux 4.16 and also add u-boot specific
dtsi for OMAPl138 board.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agodavinci: Enable DDR_INIT for DA8XX
Lokesh Vutla [Fri, 16 Mar 2018 08:52:12 +0000 (14:22 +0530)]
davinci: Enable DDR_INIT for DA8XX

Commit 6aa4ad8e3820 ("Convert CONFIG_SOC_DA8XX et al to Kconfig")
converted SOC_DA8XX to Kconfig but missed enabling DDR_INIT for
SOC_DA8XX, which broke OMAPL138 to boot.

Commit 2e87980580d0 ("davinci: Fix omapl138_lcdk builds") disabled
DDR_INIT for all DA850 SoCs. This failed all DA850 boards to boot
as ddr is not being initialized.

Enable SYS_DA850_DDR_INIT for DA8XX so that all DA850 and OMAPL138
will have ddr initialized

Fixes: 2e87980580d0 ("davinci: Fix omapl138_lcdk builds")
Fixes: 6aa4ad8e3820 ("Convert CONFIG_SOC_DA8XX et al to Kconfig")
Reported-by: Sekhar Nori <nsekhar@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: David Lechner <david@lechnology.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agoconfigs: am335x_evm: Increase SPL_SYS_MALLOC_F_LEN to accomodate gpio_devices
Faiz Abbas [Thu, 15 Mar 2018 15:41:35 +0000 (21:11 +0530)]
configs: am335x_evm: Increase SPL_SYS_MALLOC_F_LEN to accomodate gpio_devices

With gpio devices getting created in SPL, the size of the heap is
no longer sufficient. Therefore, increase SPL_SYS_MALLOC_F_LEN
to 0x1000.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agogpio: omap_gpio: Add DM_FLAG_PRE_RELOC flag
Faiz Abbas [Thu, 15 Mar 2018 15:41:34 +0000 (21:11 +0530)]
gpio: omap_gpio: Add DM_FLAG_PRE_RELOC flag

With DM enabled in SPL, DM_FLAG_PRE_RELOC is required for
the omap_gpio driver to be bound to the gpio devices.

Therefore, add DM_FLAG_PRE_RELOC flag to the omap_gpio driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agoscripts/check-config.sh: fix "command not found" error handling
Luca Ceresoli [Thu, 15 Mar 2018 10:08:56 +0000 (11:08 +0100)]
scripts/check-config.sh: fix "command not found" error handling

scripts/check-config.sh exits successfully and silently without doing
any checks when the 'comm' command is not found.

The problem triggers from the command around line 39:

  comm -23 ${suspects} ${ok} >${new_adhoc}

This statement fails when 'comm' is not in $PATH, creating an empty
${new_adhoc} file. But the script continues and the following line,
which is supposed to detect an error:

  if [ -s ${new_adhoc} ]; then

will always be false since the file is empty, and the script will exit
successfully as if everything were OK.

The case where 'comm' in not in $PATH is not theoretical. It used to
happen on yocto until a recent fix [0], and still happens on the
current stable branch (rocko).

Fix by setting the errexit flag to exit with error when a statement
fails, so that at least the problem is noticed.

For additional safety also set the nounset flag to detect expansion
errors.

[0] http://git.yoctoproject.org/cgit/cgit.cgi/poky/commit/?id=fe0b4cb5b48580d4a3f3c0eb82bfa6f1b13801e4

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodavinci: omapl138_lcdk: fix PLL0 frequency
David Lechner [Thu, 15 Mar 2018 01:36:30 +0000 (20:36 -0500)]
davinci: omapl138_lcdk: fix PLL0 frequency

commit 1601dd97edc6 ("davinci: omapl138_lcdk: increase PLL0 frequency")
changed the PLL0 frequency to 456MHz, which is needed for the LCDC IP
block. However, in doing so, it caused the PLLOUT clock to be outside
of the allowable specifications given in the OMAP-L138 data sheet. (It
says PLLOUT must be 600MHz max). It also uses a PLLM value outside of
the range given in the TRM (it says PLLM must in the range 0 to 0x1f).

So here is what we have currently:

PLLOUT = 24 / (0 + 1) * (37 + 1) = 912MHz (out of spec)
         ^     ^         ^
       CLKIN PREDIV    PLLM (out of spec)

input to PLLDIVn = 912 / (1 + 1) = 456MHz (desired result)
                    ^     ^
                 PLLOUT POSTDIV

This changes the PLLM value to 18 and the POSTDIV value to 0 so that
PLLOUT is now within specification but we still get the desired
result.

PLLOUT = 24 / (0 + 1) * (18 + 1) = 456MHz (within spec)
         ^     ^         ^
       CLKIN PREDIV     PLLM

input to PLLDIVn = 456 / (0 + 1) = 456MHz (desired result)
                    ^     ^
                 PLLOUT POSTDIV

Fixes: 1601dd97edc6 ("davinci: omapl138_lcdk: increase PLL0 frequency")
Signed-off-by: David Lechner <david@lechnology.com>
Reported-by: Sekhar Nori <nsekhar@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
6 years agotest/py: add spi_flash tests
Liam Beguin [Wed, 14 Mar 2018 23:15:16 +0000 (19:15 -0400)]
test/py: add spi_flash tests

Add basic tests for the spi_flash subsystem.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
6 years agonet: Drop CONFIG_ENC28J60
Tuomas Tynkkynen [Tue, 20 Mar 2018 00:02:28 +0000 (02:02 +0200)]
net: Drop CONFIG_ENC28J60

Last user of this driver went away in October 2014 in
commit d58a9451e7339ed4 ("ppc/arm: zap EMK boards").

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: macb: remove superfluous logical constraint
Heinrich Schuchardt [Sun, 18 Mar 2018 10:32:53 +0000 (11:32 +0100)]
net: macb: remove superfluous logical constraint

In

if (a > =0) {...}
else (a < 0) {...}

the second logical constraint is superfluous.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agodrivers: net: cpsw: remove superfluous assignment.
Heinrich Schuchardt [Sun, 18 Mar 2018 10:24:38 +0000 (11:24 +0100)]
drivers: net: cpsw: remove superfluous assignment.

In

int ret = A;
ret = B;

the first assignment has not effect.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agolan7xxx: Require phylib
Alexander Graf [Thu, 15 Mar 2018 14:10:20 +0000 (15:10 +0100)]
lan7xxx: Require phylib

The lan75xx and lan78xx drivers need to drive their phy via the generic
phylib framework. Let's reflect that dependency in Kconfig, so that we
don't get build errors when phylib does not get selected.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: Only access network devices after init
Alexander Graf [Thu, 15 Mar 2018 14:07:09 +0000 (15:07 +0100)]
net: Only access network devices after init

In the efi_loader main loop we call eth_rx() occasionally. This rx function
might end up calling into devices that haven't been initialized yet,
potentially resulting in a lot of transfer timeouts.

Instead, let's make sure the ethernet device is actually initialized before
reading from or writing to it.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: Fix netretry condition
Leonid Iziumtsev [Fri, 9 Mar 2018 14:29:06 +0000 (15:29 +0100)]
net: Fix netretry condition

The "net_try_count" counter starts from "1".
And the "retrycnt" contains requested amount of retries.

With current logic, that means that the actual retry amount
will be one time less then what we set in "netretry" env.
For example setting "netretry" to "once" will make "retrycnt"
equal "1", so no retries will be triggered at all.

Fix the logic by changing the statement of "if" condition.

Signed-off-by: Leonid Iziumtsev <leonid.iziumtsev@se.atlascopco.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet/phy/cortina: Add No firmware upload option
Priyanka Jain [Tue, 30 Jan 2018 06:41:08 +0000 (12:11 +0530)]
net/phy/cortina: Add No firmware upload option

Current Cortina phy driver assumes that firmware upload
is required during initialization and is dependent
on presence of corresponding macros like CONFIG_CORTINA_FW_ADDR
for compilation.

But Cortina phy has provision to store phy firmware in
attached dedicated EEPROM. And boards designed with such
EEPROM does not require firmware upload.

Add CORTINA_NO_FW_UPLOAD option in cortina.c to support
such boards.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet/phy/cortina.c: Update get_phy_id implementation
Priyanka Jain [Tue, 30 Jan 2018 06:08:38 +0000 (11:38 +0530)]
net/phy/cortina.c: Update get_phy_id implementation

Update get_phy_id() implementation in cortina.c to check
for Cortina_phy by comparing device phy_id with cortina phy_id
instead of relying on presence of CORTINA macros.

This will allow get_phy_id to work with non-cortina phy devices
which might have same phy address as Cortina device but on
different  bus.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoconfigs: ls1012a: add pfe configuration for LS1012A
Calvin Johnson [Thu, 8 Mar 2018 10:00:35 +0000 (15:30 +0530)]
configs: ls1012a: add pfe configuration for LS1012A

Add configurations for PFE.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoarmv8: layerscape: csu: enable ns access to PFE registers
Calvin Johnson [Thu, 8 Mar 2018 10:00:34 +0000 (15:30 +0530)]
armv8: layerscape: csu: enable ns access to PFE registers

Enable all types of non-secure access to PFE block registers.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoarmv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECC
Calvin Johnson [Thu, 8 Mar 2018 10:00:33 +0000 (15:30 +0530)]
armv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECC

1. Set AWCACHE0 attribute of PFE DDR and HDBUS master interfaces
to bufferable.
2. Set RD/WR QoS for PFE DDR and HDBUS AXI master interfaces.
3. Disable ECC detection for PFE.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoarmv8: fsl-lsch2: add pfe macros and update ccsr_scfg structure
Calvin Johnson [Thu, 8 Mar 2018 10:00:32 +0000 (15:30 +0530)]
armv8: fsl-lsch2: add pfe macros and update ccsr_scfg structure

SoC specific PFE macros are defined and structure ccsr_scfg
is updated with members defined for PFE.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoboard: freescale: ls1012a2g5rdb: enable network support on ls1012a2g5rdb
Calvin Johnson [Thu, 8 Mar 2018 10:00:31 +0000 (15:30 +0530)]
board: freescale: ls1012a2g5rdb: enable network support on ls1012a2g5rdb

This patch enables ethernet support for ls1012a2g5rdb.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoboard: freescale: ls1012ardb: enable network support on ls1012ardb
Calvin Johnson [Thu, 8 Mar 2018 10:00:30 +0000 (15:30 +0530)]
board: freescale: ls1012ardb: enable network support on ls1012ardb

This patch enables ethernet support for ls1012ardb.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoboard: freescale: ls1012afrdm: enable network support on ls1012afrdm
Calvin Johnson [Thu, 8 Mar 2018 10:00:29 +0000 (15:30 +0530)]
board: freescale: ls1012afrdm: enable network support on ls1012afrdm

This patch enables ethernet support for ls1012afrdm.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoboard: freescale: ls1012aqds: enable network support on ls1012aqds
Calvin Johnson [Thu, 8 Mar 2018 10:00:28 +0000 (15:30 +0530)]
board: freescale: ls1012aqds: enable network support on ls1012aqds

This patch enables ethernet support for ls1012aqds.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agodrivers: net: pfe_eth: LS1012A PFE headers
Calvin Johnson [Thu, 8 Mar 2018 10:00:27 +0000 (15:30 +0530)]
drivers: net: pfe_eth: LS1012A PFE headers

Contains all the pfe header files.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agodrivers: net: pfe_eth: provide pfe commands
Calvin Johnson [Thu, 8 Mar 2018 10:00:26 +0000 (15:30 +0530)]
drivers: net: pfe_eth: provide pfe commands

pfe_command provides command line support for several features that
support pfe, like starting or stopping the pfe, checking the health
of the processor engines and checking status of different units inside
pfe.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agodrivers: net: pfe_eth: LS1012A PFE driver introduction
Calvin Johnson [Thu, 8 Mar 2018 10:00:25 +0000 (15:30 +0530)]
drivers: net: pfe_eth: LS1012A PFE driver introduction

This patch adds PFE driver to U-Boot

Following are the main driver files:-
pfe_hw.c: provides low level helper functions to initialize PFE
internal processor engines and other hardware blocks
pfe_driver.c: provides initialization functions
and packet send and receive functions
pfe_eth.c: provides high level gemac initialization functions
pfe_firmware.c: provides functions to load firmware into PFE
internal processor engines.
pfe_mdio.c: provides functions to initialize phy and mdio.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoarmv8: fsl-layerscape: Add support of GPIO structure
Prabhakar Kushwaha [Thu, 8 Mar 2018 10:00:24 +0000 (15:30 +0530)]
armv8: fsl-layerscape: Add support of GPIO structure

Layerscape Gen2 SoC supports GPIO registers to control GPIO
signals. Adding support of GPIO structure to access GPIO
registers.

Signed-off-by: Pratiyush Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agodrivers: net: phy: Fix aquantia compilation with DM
Calvin Johnson [Thu, 8 Mar 2018 10:00:23 +0000 (15:30 +0530)]
drivers: net: phy: Fix aquantia compilation with DM

With CONFIG_DM_ETH enabled, aquantia driver compilation fails with
below error. This patch fixes the issue by including dm.h.

drivers/net/phy/aquantia.c: In function ‘aquantia_startup’:
drivers/net/phy/aquantia.c:73:21: error: dereferencing pointer to
incomplete
type ‘struct udevice’
          phydev->dev->name);
     ^~

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: mvpp2x: add check after calloc
Heinrich Schuchardt [Wed, 7 Mar 2018 02:39:04 +0000 (03:39 +0100)]
net: mvpp2x: add check after calloc

After allocating plat the pointer is checked.
Afterwards name is allocated and not checked.

Add the missing check to avoid a possible NULL dereference.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoConfigs: Use the newly added PHY_RTL8211E_PINE64_GIGABIT_FIX
kevans@FreeBSD.org [Wed, 14 Feb 2018 23:02:16 +0000 (17:02 -0600)]
Configs: Use the newly added PHY_RTL8211E_PINE64_GIGABIT_FIX

The Pine64+ uses a generic PHY driver, so flip it over to using the
Realtek PHY driver to actually apply the RTL8211e fix.

Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: phy: Add PHY_RTL8211E_PINE64_GIGABIT_FIX for realtek phys
kevans@FreeBSD.org [Wed, 14 Feb 2018 23:02:15 +0000 (17:02 -0600)]
net: phy: Add PHY_RTL8211E_PINE64_GIGABIT_FIX for realtek phys

Setting PHY_RTL8211E_PINE64_GIGABIT_FIX forces internal rx/tx delays off
on the PHY, as well as flipping some magical undocumented bits. The
magic number comes from the Pine64 engineering team, presumably as a
proxy from Realtek. This configuration fixes the throughput on some
Pine64 models. Packet loss of up to 60-70% has been observed without
this.

Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoDW SPI: use 32 bit access instead of 16 and 32 bit mix
Eugeniy Paltsev [Thu, 22 Mar 2018 10:50:47 +0000 (13:50 +0300)]
DW SPI: use 32 bit access instead of 16 and 32 bit mix

Current DW SPI driver uses 32 bit access for some registers and
16 bit access for others. So if DW SPI IP is connected via bus
which doesn't support 16 bit access we will get bus error.

Fix that by switching to 32 bit access only instead of 16 and 32 bit mix

Additional Documentation to Support this Change:
The DW_apb_ssi databook states:
"All registers in the DW_apb_ssi are addressed at 32-bit boundaries
to remain consistent with the AHB bus. Where the physical size of
any register is less than 32-bits wide, the upper unused bits of
the 32-bit boundary are reserved. Writing to these bits has no
effect; reading from these bits returns 0." [1]

[1] Section 6.1 of dw_apb_ssi.pdf (version 3.22a)

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoDW SPI: add option to use external gpio for chip select
Eugeniy Paltsev [Thu, 22 Mar 2018 10:50:46 +0000 (13:50 +0300)]
DW SPI: add option to use external gpio for chip select

DW SPI internal chip select management has limitation:
it hold CS line in active state only when the FIFO is not
empty. If the FIFO freed before we add new data the SPI transaction will
be broken.

So add option to use external gpio for chip select. Gpio can be added
via device tree using standard gpio bindings.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoDW SPI: refactor poll_transfer functions
Eugeniy Paltsev [Thu, 22 Mar 2018 10:50:45 +0000 (13:50 +0300)]
DW SPI: refactor poll_transfer functions

There is no sense in waiting for RX data in dw_reader function:
there is no chance that RX data will appear in RX FIFO if
RX FIFO is empty after previous TX write in dw_writer function.
So get rid of this waiting. After that we can get rid of dw_reader
return value and make it returning void. After that we can get rid
of dw_reader return value check in poll_transfer function.

With these changes we're getting closer to Linux DW SPI driver.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoDW SPI: fix transmit only mode
Eugeniy Paltsev [Thu, 22 Mar 2018 10:50:44 +0000 (13:50 +0300)]
DW SPI: fix transmit only mode

In current implementation we get -ETIMEDOUT error when we try to use
transmit only mode (SPI_TMOD_TO)
This happens because in transmit only mode input FIFO never gets any data
which breaks our logic in dw_reader(): we are waiting until RX data will be
ready in dw_reader, but this newer happens, so we return with error.

Fix that by using SPI_TMOD_TR instead of SPI_TMOD_TO which allows to use
RX FIFO.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoDW SPI: fix tx data loss on FIFO flush
Eugeniy Paltsev [Thu, 22 Mar 2018 10:50:43 +0000 (13:50 +0300)]
DW SPI: fix tx data loss on FIFO flush

In current implementation if some data still exists in Tx FIFO it
can be silently flushed, i.e. dropped on disabling of the controller,
which happens when writing 0 to DW_SPI_SSIENR (it happens in the
beginning of new transfer)

So add wait for current transmit operation to complete to be sure
that current transmit operation is finished before new one.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agotest/py: add generic CRC32 function
Liam Beguin [Wed, 14 Mar 2018 23:15:15 +0000 (19:15 -0400)]
test/py: add generic CRC32 function

Add a generic function which can be used to compute the CRC32 value of
a region of RAM.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
6 years agotest/py: do not import pytest multiple times
Liam Beguin [Wed, 14 Mar 2018 23:15:14 +0000 (19:15 -0400)]
test/py: do not import pytest multiple times

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
6 years agotest/py: README: add HOSTNAME to PYTHONPATH
Liam Beguin [Wed, 14 Mar 2018 23:15:13 +0000 (19:15 -0400)]
test/py: README: add HOSTNAME to PYTHONPATH

As opposed to PATH, HOSTNAME is not appended to PYTHONPATH
automatically. Lets add it to the examples to make it more
obvious to new users.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
6 years agotest/py: README: fix typo
Liam Beguin [Wed, 14 Mar 2018 23:15:12 +0000 (19:15 -0400)]
test/py: README: fix typo

Fix a minor typo causing vim (and possibly other) to get confused with
coloring.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
6 years agocmd: sf: fix map_physmem check
Liam Beguin [Wed, 14 Mar 2018 23:15:11 +0000 (19:15 -0400)]
cmd: sf: fix map_physmem check

Make sure 0x00 is a valid address to read to. If `addr` is 0x00 then
map_physmem() will return 0 which should be a valid address.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
6 years agospi: spi_flash: do not fail silently on bad user input
Liam Beguin [Wed, 14 Mar 2018 23:15:10 +0000 (19:15 -0400)]
spi: spi_flash: do not fail silently on bad user input

Make sure the user is notified instead of silently returning an error.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
6 years agotools: Make kwboot build if HOST_TOOLS_ALL=y
Tuomas Tynkkynen [Tue, 13 Mar 2018 13:23:04 +0000 (15:23 +0200)]
tools: Make kwboot build if HOST_TOOLS_ALL=y

The kwboot tool for Marvell devices isn't currently being built even if
HOST_TOOLS_ALL is set. It doesn't appear to depend on any CONFIG_
options, so it seems appropriate to enable building it here.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
6 years agoMerge git://git.denx.de/u-boot-mips
Tom Rini [Wed, 21 Mar 2018 22:58:03 +0000 (18:58 -0400)]
Merge git://git.denx.de/u-boot-mips

6 years agomips: bmips: add ar-5315 usb support
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:11:17 +0000 (21:11 +0100)]
mips: bmips: add ar-5315 usb support

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agomips: bmips: add support for bcm6318 usb
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:11:16 +0000 (21:11 +0100)]
mips: bmips: add support for bcm6318 usb

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agophy: add support for bcm6318 usbh phy
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:11:15 +0000 (21:11 +0100)]
phy: add support for bcm6318 usbh phy

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
6 years agomips: bmips: add vr-3032u usb support
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:21 +0000 (21:10 +0100)]
mips: bmips: add vr-3032u usb support

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agomips: bmips: add support for bcm63268 usb
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:20 +0000 (21:10 +0100)]
mips: bmips: add support for bcm63268 usb

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agomips: bmips: add dgnd3700v2 usb support
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:19 +0000 (21:10 +0100)]
mips: bmips: add dgnd3700v2 usb support

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agomips: bmips: add support for bcm6362 usb
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:18 +0000 (21:10 +0100)]
mips: bmips: add support for bcm6362 usb

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agomips: bmips: add ar-5387un usb support
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:17 +0000 (21:10 +0100)]
mips: bmips: add ar-5387un usb support

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agomips: bmips: add support for bcm6328 usb
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:16 +0000 (21:10 +0100)]
mips: bmips: add support for bcm6328 usb

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agomips: bmips: add wap-5813n usb support
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:15 +0000 (21:10 +0100)]
mips: bmips: add wap-5813n usb support

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agomips: bmips: add support for bcm6368 usb
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:14 +0000 (21:10 +0100)]
mips: bmips: add support for bcm6368 usb

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agophy: add support for bcm6368 usbh phy
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:13 +0000 (21:10 +0100)]
phy: add support for bcm6368 usbh phy

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
6 years agomips: bmips: add nb4-ser usb support
Álvaro Fernández Rojas [Sun, 4 Feb 2018 10:19:14 +0000 (11:19 +0100)]
mips: bmips: add nb4-ser usb support

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agomips: bmips: add hg556a usb support
Álvaro Fernández Rojas [Sun, 4 Feb 2018 10:19:13 +0000 (11:19 +0100)]
mips: bmips: add hg556a usb support

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agomips: bmips: add support for bcm6358 usb
Álvaro Fernández Rojas [Sun, 4 Feb 2018 10:19:12 +0000 (11:19 +0100)]
mips: bmips: add support for bcm6358 usb

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agophy: add support for bcm6358 usbh phy
Álvaro Fernández Rojas [Sun, 4 Feb 2018 10:19:11 +0000 (11:19 +0100)]
phy: add support for bcm6358 usbh phy

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
6 years agomips: bmips: add ct-5361 usb support
Álvaro Fernández Rojas [Sun, 4 Feb 2018 10:18:26 +0000 (11:18 +0100)]
mips: bmips: add ct-5361 usb support

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agomips: bmips: add support for bcm6348 usb
Álvaro Fernández Rojas [Sun, 4 Feb 2018 10:18:25 +0000 (11:18 +0100)]
mips: bmips: add support for bcm6348 usb

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
6 years agophy: add support for bcm6348 usbh phy
Álvaro Fernández Rojas [Sun, 4 Feb 2018 10:18:24 +0000 (11:18 +0100)]
phy: add support for bcm6348 usbh phy

Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
6 years agomips: micronas/vct: check array bounds before access
Heinrich Schuchardt [Sun, 18 Mar 2018 22:43:43 +0000 (23:43 +0100)]
mips: micronas/vct: check array bounds before access

If we check an index against array bounds, we should do so before
accessing the array and not afterwards.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>