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u-boot
8 years agotools: env: update usage strings
Andreas Fenkart [Wed, 9 Dec 2015 12:13:27 +0000 (13:13 +0100)]
tools: env: update usage strings

Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
8 years agotools: env: factor out parse_common_args
Andreas Fenkart [Wed, 9 Dec 2015 12:13:26 +0000 (13:13 +0100)]
tools: env: factor out parse_common_args

Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
8 years agotools: env: shift optind arguments and fix argument indices
Andreas Fenkart [Wed, 9 Dec 2015 12:13:25 +0000 (13:13 +0100)]
tools: env: shift optind arguments and fix argument indices

Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
8 years agotools: env: parse aes key / suppress flag into argument struct
Andreas Fenkart [Wed, 9 Dec 2015 12:13:24 +0000 (13:13 +0100)]
tools: env: parse aes key / suppress flag into argument struct

disabled original parsing, but not yet removed since the
argument indexing needs to be fixed

Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
8 years agotools: env: introduce setenv/printenv argument structs
Andreas Fenkart [Wed, 9 Dec 2015 12:13:23 +0000 (13:13 +0100)]
tools: env: introduce setenv/printenv argument structs

goal is to use getopt for all argument parsing instead of adhoc
parsing in fw_getenv/fw_setenv functions

Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
8 years agotools: env: make parse_aes_key stateless
Andreas Fenkart [Wed, 9 Dec 2015 12:13:22 +0000 (13:13 +0100)]
tools: env: make parse_aes_key stateless

Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
8 years agotools: env validate: pass values as 0-based array
Andreas Fenkart [Wed, 9 Dec 2015 12:13:21 +0000 (13:13 +0100)]
tools: env validate: pass values as 0-based array

passing argv/argc can produce off-by-one errors

Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
8 years agoMerge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
Tom Rini [Mon, 8 Feb 2016 14:48:04 +0000 (09:48 -0500)]
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-nios
Tom Rini [Mon, 8 Feb 2016 14:39:54 +0000 (09:39 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-nios

8 years agonet: davinci_emac: fix NULL check after pointer dereference
Vishwas Srivastava [Tue, 26 Jan 2016 07:16:42 +0000 (12:46 +0530)]
net: davinci_emac: fix NULL check after pointer dereference

NULL check is made after the pointer dereference. This patch
fixes this issue.

Signed-off-by: Vishwas Srivastava <vishu.kernel@gmail.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
8 years agoppc: xilinx-ppc405-generic
Ricardo Ribalda [Thu, 4 Feb 2016 13:45:00 +0000 (14:45 +0100)]
ppc: xilinx-ppc405-generic

Fix device tree name:

+(xilinx-ppc405-generic) Device Tree Source is not correctly specified.
+(xilinx-ppc405-generic) Please define 'CONFIG_DEFAULT_DEVICE_TREE'
+(xilinx-ppc405-generic) or build with 'DEVICE_TREE=<device_tree>'
argument
+(xilinx-ppc405-generic) make[2]: ***
[arch/powerpc/dts/xilinx-ppc440-generic.dtb] Error 1
+(xilinx-ppc405-generic) make[1]: *** [dts] Error 2

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agonet: fix wrong initialization in davinci-emac driver
Vishwas Srivastava [Mon, 25 Jan 2016 15:58:17 +0000 (21:28 +0530)]
net: fix wrong initialization in davinci-emac driver

emac module of the davinci platform supports only 8 tx and 8
rx channels (total 16). emac driver for davinci platform,
however, while doing initialization of the dma descriptor
head pointers, wrongly initializes the 16 head pointers
(instead of  8) for tx dma and 16 head pointers (insted of 8)
for rx dma, which is wrong. The result is, that this register
initilization spills over the other registers which was not
intended and is undesirable. This patch fixes this problem.

Signed-off-by: Vishwas Srivastava <vishu.kernel@gmail.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
8 years agofdt: introduce fdtdec_get_child_count
Peng Fan [Mon, 1 Feb 2016 05:31:15 +0000 (13:31 +0800)]
fdt: introduce fdtdec_get_child_count

Introduce fdtdec_get_child_count for get the number of subnodes
of one parent node.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: Drop old CONFIG_VIDEO_ROTATION option
Simon Glass [Sat, 30 Jan 2016 22:45:19 +0000 (15:45 -0700)]
rockchip: Drop old CONFIG_VIDEO_ROTATION option

The option was renamed to CONFIG_CONSOLE_ROTATION and Rockchip boards
were not updated. However this option is is not needed by default for
Rockchip since we don't need a rotated console for current boards. So just
remove the old option.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agobzlib: Try another way to fix an unused variable
Simon Glass [Sat, 30 Jan 2016 22:45:18 +0000 (15:45 -0700)]
bzlib: Try another way to fix an unused variable

Use __maybe_unused which should avoid the Coverity error.

Reported-by: Coverity (CID: 134900)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agovideo: test: Adjust order of file closure
Simon Glass [Sat, 30 Jan 2016 22:45:17 +0000 (15:45 -0700)]
video: test: Adjust order of file closure

Close the file earlier to hopefully fix a Coverity error.

Reported-by: Coverity (CID: 134901)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agovideo: Use 'int' for loop variables instead of short
Simon Glass [Sat, 30 Jan 2016 22:45:16 +0000 (15:45 -0700)]
video: Use 'int' for loop variables instead of short

Using short doesn't save anything and is confusing when the width and height
variables are ulong.

This may fix Coverity CID134902 but I doubt it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agocmd: Fix control bmp_display()
Simon Glass [Sat, 30 Jan 2016 22:45:15 +0000 (15:45 -0700)]
cmd: Fix control bmp_display()

All paths should share the same return.

Reported-by: Coverity (CID:134903)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agomicroblaze: Correct build error in eth-uclass.c
Simon Glass [Sat, 30 Jan 2016 22:45:14 +0000 (15:45 -0700)]
microblaze: Correct build error in eth-uclass.c

This fixes the following error when building microblaze-generic:

net/eth-uclass.c: In function 'eth_post_probe':
net/eth-uclass.c:466:18: error: 'gd' undeclared (first use in this function)
    ops->start += gd->reloc_off;

Fixes: db9391e1 ("net: Move driver-model code into its own file")
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agoUse correct spelling of "U-Boot"
Bin Meng [Sat, 6 Feb 2016 03:30:11 +0000 (19:30 -0800)]
Use correct spelling of "U-Boot"

Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agonios2: set up the debug UART early
Thomas Chou [Wed, 30 Dec 2015 12:29:18 +0000 (20:29 +0800)]
nios2: set up the debug UART early

Set up the debug UART early if enabled, so that it is ready to use.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Chin Liang See <clsee@altera.com>
8 years agox86: Drop pci_type1.c and DEFINE_PCI_DEVICE_TABLE
Bin Meng [Tue, 2 Feb 2016 13:58:09 +0000 (05:58 -0800)]
x86: Drop pci_type1.c and DEFINE_PCI_DEVICE_TABLE

Now that we have converted all x86 codes to DM PCI, drop pci_type1.c
which is only built for legacy PCI. Also per checkpatch.pl warning,
DEFINE_PCI_DEVICE_TABLE is now deprecated so drop that too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Disable DM_PCI_COMPAT
Bin Meng [Tue, 2 Feb 2016 13:58:08 +0000 (05:58 -0800)]
x86: Disable DM_PCI_COMPAT

Now that all x86 codes have been converted to use proper DM PCI APIs,
it's time to disable the legacy compatible layer.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: pci: Add missing forward declarations
Bin Meng [Tue, 2 Feb 2016 13:58:07 +0000 (05:58 -0800)]
dm: pci: Add missing forward declarations

When CONFIG_DM_PCI_COMPAT is not on, there is only a forward declaration
for pci_write_config32(). Add other missing ones.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: chromebox_panther: Convert to use driver model ethernet
Bin Meng [Tue, 2 Feb 2016 13:58:06 +0000 (05:58 -0800)]
x86: chromebox_panther: Convert to use driver model ethernet

This board uses RTL8169 which is a driver model ethernet driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: chromebox_panther: Drop the cache line size hack
Bin Meng [Tue, 2 Feb 2016 13:58:05 +0000 (05:58 -0800)]
x86: chromebox_panther: Drop the cache line size hack

Now that the RTL8169 driver warning is fixed we can drop this.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoefi: app: Disable CONFIG_USB_EHCI_PCI
Bin Meng [Tue, 2 Feb 2016 13:58:04 +0000 (05:58 -0800)]
efi: app: Disable CONFIG_USB_EHCI_PCI

It does not build if without CONFIG_DM_PCI_COMPAT. For now we just
disable it, until some day we add USB support to EFI application.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoefi: app: Clean up defconfig
Bin Meng [Tue, 2 Feb 2016 13:58:03 +0000 (05:58 -0800)]
efi: app: Clean up defconfig

Move some #undef from efi-x86.h to efi-x86_defconfig as these are
already Kconfig options.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: quark: Use Quark's own PCI config APIs
Bin Meng [Tue, 2 Feb 2016 13:58:02 +0000 (05:58 -0800)]
x86: quark: Use Quark's own PCI config APIs

There are still two places in Quark's MRC codes that use the generic
legacy PCI APIs, but as we are phasing out these legacy APIs, switch
to use Quark's own PCI config routines.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agonet: e1000: Convert to use DM PCI API
Bin Meng [Tue, 2 Feb 2016 13:58:01 +0000 (05:58 -0800)]
net: e1000: Convert to use DM PCI API

Update this driver to use proper DM PCI APIs.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agonet: designware: Use dm_pci_mem_to_phys() in the probe routine
Bin Meng [Tue, 2 Feb 2016 13:58:00 +0000 (05:58 -0800)]
net: designware: Use dm_pci_mem_to_phys() in the probe routine

Convert to use native DM PCI API dm_pci_mem_to_phys().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agonet: pch_gbe: Convert to use DM PCI API
Bin Meng [Tue, 2 Feb 2016 13:57:59 +0000 (05:57 -0800)]
net: pch_gbe: Convert to use DM PCI API

Use native DM PCI APIs instead of legacy compatible ones.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: pci: Drop legacy PCI APIs
Bin Meng [Mon, 1 Feb 2016 09:40:58 +0000 (01:40 -0800)]
x86: pci: Drop legacy PCI APIs

Now that we have converted all x86 codes to use DM PCI APIs,
drop those legacy ones.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: pci: Use DM PCI APIs in pci_assign_irqs()
Bin Meng [Mon, 1 Feb 2016 09:40:57 +0000 (01:40 -0800)]
x86: pci: Use DM PCI APIs in pci_assign_irqs()

Drop legacy PCI APIs usage in pci_assign_irqs() as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: qemu: Convert to use DM PCI API
Bin Meng [Mon, 1 Feb 2016 09:40:56 +0000 (01:40 -0800)]
x86: qemu: Convert to use DM PCI API

Use pci_[read|write]_config intead of x86_pci_[read|write]_config.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: tnc: Remove IGD and SDVO devices from driver model
Bin Meng [Mon, 1 Feb 2016 09:40:55 +0000 (01:40 -0800)]
x86: tnc: Remove IGD and SDVO devices from driver model

With recent DM PCI changes to vesa_fb driver, external graphics
card does not work any more. This is because: after setting the
function disable bit, IGD and SDVO devices will disappear in the
PCI configuration space. This however creates an inconsistent state
from a driver model PCI controller point of view, as these two PCI
devices are still attached to its parent's child device list as
maintained by the driver model. Some driver model PCI APIs like
dm_pci_find_class() used in the vesa_fb driver, are referring to
the list to speed up the finding process instead of re-enumerating
the whole PCI bus, so it gets the stale cached data which is wrong.

To fix this, manually remove these two devices.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: tnc: Use DM PCI API in disable_igd()
Bin Meng [Mon, 1 Feb 2016 09:40:54 +0000 (01:40 -0800)]
x86: tnc: Use DM PCI API in disable_igd()

Once we get udevice of IGD and SDVO, we can use its udevice to
access PCI configuration space with dm_pci_write_config32().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: tnc: Change disable_igd() to have a return value
Bin Meng [Mon, 1 Feb 2016 09:40:53 +0000 (01:40 -0800)]
x86: tnc: Change disable_igd() to have a return value

So far disable_igd() does not have any return value, but we may need
that in the future.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: irq: Convert to use DM PCI API
Bin Meng [Mon, 1 Feb 2016 09:40:52 +0000 (01:40 -0800)]
x86: irq: Convert to use DM PCI API

Now that we have irq router's udevice passed as a parameter, it's
time to start using the DM PCI API instead of those legacy ones.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: irq: Move irq_router to a per driver priv
Bin Meng [Mon, 1 Feb 2016 09:40:51 +0000 (01:40 -0800)]
x86: irq: Move irq_router to a per driver priv

At present irq_router is declared as a static struct irq_router in
arch/x86/cpu/irq.c. Since it's a driver control block, it makes sense
to move it to a per driver priv. Adjust existing APIs to accept an
additional parameter of irq_router's udevice.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: irq: Get irq_router's bdf via dm_pci_get_bdf()
Bin Meng [Mon, 1 Feb 2016 09:40:50 +0000 (01:40 -0800)]
x86: irq: Get irq_router's bdf via dm_pci_get_bdf()

There is no need to parse PCH's <reg> property as we have already
a DM PCI API dm_pci_get_bdf() that can handle this.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: minnowmax: Drop io-base property in the pch_pinctrl node
Bin Meng [Mon, 1 Feb 2016 09:40:49 +0000 (01:40 -0800)]
x86: minnowmax: Drop io-base property in the pch_pinctrl node

IOBASE is now obtained from PCH driver, drop this <io-base> property.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: Drop asm/arch/gpio.h
Bin Meng [Mon, 1 Feb 2016 09:40:48 +0000 (01:40 -0800)]
x86: Drop asm/arch/gpio.h

asm/arch/gpio.h is not needed anymore as we get the GPIO base from
PCH driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: ich6_gpio: Convert to use proper DM API
Bin Meng [Mon, 1 Feb 2016 09:40:47 +0000 (01:40 -0800)]
x86: ich6_gpio: Convert to use proper DM API

At present this GPIO driver still uses the legacy PCI API. Now that
we have proper PCH drivers we can use those to obtain the information
we need. While the device tree has nodes for the GPIO peripheral it is
not in the right place. It should be on the PCI bus as a sub-peripheral
of the PCH device.

Update the device tree files to show the GPIO controller within the PCH,
so that PCI access works as expected. This also adds '#address-cells'
and '#size-cells' to the PCH node.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: pch9: Implement get_io_base op
Bin Meng [Mon, 1 Feb 2016 09:40:46 +0000 (01:40 -0800)]
x86: pch9: Implement get_io_base op

IO_BASE is only seen on PCH9 device, implement the get_io_base op.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agodm: pch: Add get_io_base op
Bin Meng [Mon, 1 Feb 2016 09:40:45 +0000 (01:40 -0800)]
dm: pch: Add get_io_base op

On some newer chipset (eg: BayTrail), there is an IO base address
register on the PCH device which configures the base address of a
memory-mapped I/O controller.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: pch: Implement get_gpio_base op
Bin Meng [Mon, 1 Feb 2016 09:40:44 +0000 (01:40 -0800)]
x86: pch: Implement get_gpio_base op

Implement get_gpio_base op for bd82x6x, pch7 and pch9 drivers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agodm: pch: Add get_gpio_base op
Bin Meng [Mon, 1 Feb 2016 09:40:43 +0000 (01:40 -0800)]
dm: pch: Add get_gpio_base op

x86 GPIO registers are accessed via I/O port whose base address is
configured in a PCI configuration register on the PCH device. Add
an op get_gpio_base to get the GPIO base address from PCH.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agodm: pch: Rename get_sbase op to get_spi_base
Bin Meng [Mon, 1 Feb 2016 09:40:42 +0000 (01:40 -0800)]
dm: pch: Rename get_sbase op to get_spi_base

Spell out 'sbase' to 'spi_base' so that it looks clearer.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agodm: pch: Remove pch_get_version op
Bin Meng [Mon, 1 Feb 2016 09:40:41 +0000 (01:40 -0800)]
dm: pch: Remove pch_get_version op

pch_get_version op was only used by the ich spi controller driver,
and does not really provide a good identification of pch controller
so far, since we see plenty of Intel PCH chipsets and one differs
from another a lot, which is not simply either a PCHV_7 or PCHV_9.
Now that ich spi controller driver was updated to not get such info
from pch, the pch_get_version op is useless now.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: quark: Drop unprotect_spi_flash()
Bin Meng [Mon, 1 Feb 2016 09:40:40 +0000 (01:40 -0800)]
x86: quark: Drop unprotect_spi_flash()

Unprotecting SPI flash is now handled in the SPI controller driver,
via a call to the PCH driver. Drop the ad-hoc version.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: tnc: Drop unprotect_spi_flash()
Bin Meng [Mon, 1 Feb 2016 09:40:39 +0000 (01:40 -0800)]
x86: tnc: Drop unprotect_spi_flash()

Unprotecting SPI flash is now handled in the SPI controller driver,
via a call to the PCH driver. Drop the ad-hoc version.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agospi: ich: Change PCHV_ to ICHV_
Bin Meng [Mon, 1 Feb 2016 09:40:38 +0000 (01:40 -0800)]
spi: ich: Change PCHV_ to ICHV_

The ICH SPI controller supports two variants, one of which is ICH7
compatible and the other is ICH9 compatible. Change 'pch_version'
to 'ich_version' to better match its original name.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agospi: ich: Use compatible strings to distinguish controller version
Bin Meng [Mon, 1 Feb 2016 09:40:37 +0000 (01:40 -0800)]
spi: ich: Use compatible strings to distinguish controller version

At present ich spi driver gets the controller version information via
pch, but this can be simply retrieved via spi node's compatible string.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agospi: ich: Some clean up
Bin Meng [Mon, 1 Feb 2016 09:40:36 +0000 (01:40 -0800)]
spi: ich: Some clean up

This cleans up the ich spi driver a little bit:
- Remove struct ich_spi_slave that is not referenced anywhere
- Remove ending period in some comments
- Move struct ich_spi_platdata and struct ich_spi_priv to ich.h
- Add #ifndef _ICH_H_ .. in ich.h

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agox86: x86-common.h: Add CONFIG_BOOTDELAY
Stefan Roese [Mon, 18 Jan 2016 13:49:56 +0000 (14:49 +0100)]
x86: x86-common.h: Add CONFIG_BOOTDELAY

Without this CONFIG_BOOTDELAY, autobooting does not work at all. As
autoboot_command() from common/* will not get called. So lets define
CONFIG_BOOTDELAY, so that auto-booting works on x86.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Miao Yan <yanmiaobest@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-by: Miao Yan <yanmiaobest@gmail.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoautoboot.c: Fill env vars in process_fdt_options() only if TEXT_BASE is set
Stefan Roese [Thu, 28 Jan 2016 16:34:40 +0000 (17:34 +0100)]
autoboot.c: Fill env vars in process_fdt_options() only if TEXT_BASE is set

The x86 build target "efi-x86" has no TEXT_BASE configured. And with the
introduction of CONFIG_BOOTDELAY for x86, this function is now called
for this board as well. Resulting in compile errors for this target.

Without TEXT_BASE it makes no sense to fill these values. So lets only
configure the env variable if TEXT_BASE is defined.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Thu, 4 Feb 2016 11:56:23 +0000 (06:56 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Thu, 4 Feb 2016 11:56:20 +0000 (06:56 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

8 years agoRevert "arm: socfpga: set the fpga global bit to disable HPS to FPGA signals"
Dinh Nguyen [Tue, 19 Jan 2016 15:16:21 +0000 (09:16 -0600)]
Revert "arm: socfpga: set the fpga global bit to disable HPS to FPGA signals"

Apparently, the logic for the FPGA global bit is not universal between Gen5
and Gen10 devices is not the same. Disabling this bit, while applicable to
Gen10 devices, will break FPGA programming on Gen5 devices.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
8 years agousb: gadget: dwc2_udc_otg: modified the check condition for max packet size of ep_in...
Frank Wang [Wed, 27 Jan 2016 20:39:40 +0000 (12:39 -0800)]
usb: gadget: dwc2_udc_otg: modified the check condition for max packet size of ep_in in high speed

In current high speed fastboot, fs_ep_in.wMaxPacketSize is configured 64 bytes
as default, as a result, it failed to match the size at initialization stage in
usb controller.
Actually, hardware can support less than or equal to 512 bytes in high speed mode,
so I changed the condition from  '!=' to '>' to fix this issue.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Tested-by: Steve Rae <srae@broadcom.com>
8 years agoimx: mx6: implement board_mmc_get_env_dev
Peng Fan [Thu, 28 Jan 2016 08:51:27 +0000 (16:51 +0800)]
imx: mx6: implement board_mmc_get_env_dev

Implement board_mmc_get_env_dev for the boards.

Following is examples:
SD1/SD2/SD3: return devno;
SD2/SD3: return devno - 1;
SD2/SD4: if (devno == 2), return dev - 2; return dev - 1;

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
8 years agoimx: mx6: implement mmc_get_env_dev
Peng Fan [Thu, 28 Jan 2016 08:51:26 +0000 (16:51 +0800)]
imx: mx6: implement mmc_get_env_dev

Implement mmc_get_env_dev, devno can be got from smbr1 of SRC.
Introduce a weak function board_mmc_get_env_dev, different
boards can implement it according to different sdhc controllers
that used by the board.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
8 years agoimx: mx7dsabresd: move mmc_get_env_devno to soc code
Peng Fan [Thu, 28 Jan 2016 08:51:25 +0000 (16:51 +0800)]
imx: mx7dsabresd: move mmc_get_env_devno to soc code

Move mmc_get_env_devno to soc.c and rename to mmc_get_env_dev to
match the one in common/env_mmc.c.
Introduce a weak function board_mmc_get_env_dev. Different
boards can implement this according to sdhc controller which
is used by the board.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
8 years agodm: vybrid_gpio: Drop legacy code
Bhuvanchandra DV [Wed, 27 Jan 2016 05:01:53 +0000 (10:31 +0530)]
dm: vybrid_gpio: Drop legacy code

All boards using this driver are with device tree support,
hence drop the legacy code in driver to have a pure DT solution.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: lpuart: Drop the legacy code
Bhuvanchandra DV [Wed, 27 Jan 2016 05:01:52 +0000 (10:31 +0530)]
dm: lpuart: Drop the legacy code

All boards using this driver are with device tree support,
hence drop the legacy code in driver to have a pure DT solution.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoarm: vybrid: Drop enabling GPIO, SPI and UART in legacy mode
Bhuvanchandra DV [Wed, 27 Jan 2016 05:01:51 +0000 (10:31 +0530)]
arm: vybrid: Drop enabling GPIO, SPI and UART in legacy mode

Remove the legacy way of enabling GPIO, SPI and UART on Vybrid
based boards since these driver's now only supports DT mode.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoarm: vybrid: Update defconfig's
Bhuvanchandra DV [Wed, 27 Jan 2016 05:01:50 +0000 (10:31 +0530)]
arm: vybrid: Update defconfig's

Let's go with pure DT solution for board's
based on NXP/Freescale Vybrid platform.

- Merge the DT defconfig with non-DT defconfig for Toradex
  Colibri VF50/VF61 and drop the non-DT defconfig.
- Update the legacy defconfigs for NXP/Freescale VF610 Tower
  Board with DT.
- Update the legacy defconfigs for Phytec phyCORE-vybrid
  Board with DT.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoarm: pcm052: Add device tree file's
Bhuvanchandra DV [Wed, 27 Jan 2016 05:01:49 +0000 (10:31 +0530)]
arm: pcm052: Add device tree file's

- Add device tree files for Phytec phyCORE-Vybrid Board.
- Enable lpuart support for Phytec phyCORE-Vybrid Board.
- Use UART1 for stdout.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoarm: vf610-twr: Add device tree file's
Bhuvanchandra DV [Wed, 27 Jan 2016 05:01:48 +0000 (10:31 +0530)]
arm: vf610-twr: Add device tree file's

- Add device tree files for NXP/Freescale VF610 Tower Board.
- Enable lpuart support on NXP/Freescale VF610 Tower Board.
- Use UART1 as stdout.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoarm: colibri-vf: Enable serial support
Bhuvanchandra DV [Wed, 27 Jan 2016 05:01:47 +0000 (10:31 +0530)]
arm: colibri-vf: Enable serial support

- Enable lpuart support on Toradex Colibri VF50/VF61
- Use UART0 for stdout.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoarm: vybrid: Update the license string
Bhuvanchandra DV [Wed, 27 Jan 2016 05:01:46 +0000 (10:31 +0530)]
arm: vybrid: Update the license string

Since SPDX license is already there, drop the full one.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoarm: vybrid: Enable lpuart support
Bhuvanchandra DV [Wed, 27 Jan 2016 05:01:45 +0000 (10:31 +0530)]
arm: vybrid: Enable lpuart support

Add device tree node's for lpuart on Vybrid platform

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoimx: mx6sxsabresd: Add MCIMX28LCD display support
Ye Li [Tue, 26 Jan 2016 14:09:40 +0000 (22:09 +0800)]
imx: mx6sxsabresd: Add MCIMX28LCD display support

The i.MX6SX SABRESD board supports MCIMX28LCD (800x480x24) at LCDIF1
port, enable this display feature by adding relevant BSP codes
and configurations.

Signed-off-by: Ye Li <ye.li@nxp.com>
8 years agoimx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation
Ye Li [Tue, 26 Jan 2016 14:01:58 +0000 (22:01 +0800)]
imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation

The checking with max frequency supported is not correct, because the temp
is calculated by max pre and post dividers. We can decrease any divider to
meet the max frequency limitation. Actually, the calculation below the codes
is doing this way to find best pre and post dividers.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
8 years agoimx: mx6sx: Fix issue in LCDIF clock enablement
Ye Li [Tue, 26 Jan 2016 14:01:57 +0000 (22:01 +0800)]
imx: mx6sx: Fix issue in LCDIF clock enablement

Wrong checking for the base_addr paramter with LCDIF1 and LCDIF2. Always
enter the -EINVAL return.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
8 years agomx6slevk: Remove CONFIG_ETHPRIME option
Fabio Estevam [Mon, 1 Feb 2016 16:24:56 +0000 (14:24 -0200)]
mx6slevk: Remove CONFIG_ETHPRIME option

As mx6slevk has only one Ethernet port, we don't need
to declare CONFIG_ETHPRIME, so just remove it.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
8 years agoimx: MX6DQ{P}/DL:SABRESD Fix bmode eMMC failure
Ye Li [Sat, 30 Jan 2016 03:53:42 +0000 (11:53 +0800)]
imx: MX6DQ{P}/DL:SABRESD Fix bmode eMMC failure

The BOOTCFG value used by bmode for SABRESD eMMC boot are actually for SD card.
Fixed the value to correct one.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
8 years agotqma6_wru4: Fix the reset delay for the the LAN8720 PHY
Fabio Estevam [Mon, 1 Feb 2016 13:19:59 +0000 (11:19 -0200)]
tqma6_wru4: Fix the reset delay for the the LAN8720 PHY

According to the LAN8720 datasheet tpurstd (time that reset line should
stay asserted) is 25ms.

So do as suggested by the LAN8720 datasheet.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
8 years agomx6slevk: Fix the reset delay for the the LAN8720 PHY
Fabio Estevam [Mon, 1 Feb 2016 13:15:10 +0000 (11:15 -0200)]
mx6slevk: Fix the reset delay for the the LAN8720 PHY

Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is
registered") Ethernet is no longer functional.

This commit does not have an issue in itself, but it revelead a problem
with the Ethernet initialization.

According to the LAN8720 datasheet tpurstd (time that reset line should
stay asserted) is 25ms.

So do as suggested in order to have Ethernet working again.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
8 years agoimx: mx6sxsabreauto: Add support for mx6sx SABREAUTO board
Ye Li [Mon, 1 Feb 2016 02:41:32 +0000 (10:41 +0800)]
imx: mx6sxsabreauto: Add support for mx6sx SABREAUTO board

Initial version for mx6sx SABREAUTO board support with features:
PMIC, QSPI, NAND flash, SD/MMC, USB, Ethernet, I2C, IO Expander.

Signed-off-by: Ye Li <ye.li@nxp.com>
8 years agomx6: soc: Add ENET2 mac address support
Ye Li [Mon, 1 Feb 2016 02:41:31 +0000 (10:41 +0800)]
mx6: soc: Add ENET2 mac address support

The i.MX6SX and i.MX6UL has two ENET controllers, add support for reading
MAC address from fuse for ENET2.

Signed-off-by: Ye Li <ye.li@nxp.com>
8 years agotools: mxsboot: Use more portable cpu_to_le32()
Bin Meng [Mon, 25 Jan 2016 03:38:32 +0000 (19:38 -0800)]
tools: mxsboot: Use more portable cpu_to_le32()

Currently when building mxsboot on certain machines it reports:

  HOSTCC  tools/mxsboot
  tools/mxsboot.c: In function 'mx28_create_sd_image':
  tools/mxsboot.c:560: warning: implicit declaration of function 'htole32'
  /tmp/cchLIV6q.o: In function 'main':
  mxsboot.c:(.text+0x6d8): undefined reference to 'htole32'
  mxsboot.c:(.text+0x6e7): undefined reference to 'htole32'
  mxsboot.c:(.text+0x6f6): undefined reference to 'htole32'
  mxsboot.c:(.text+0x705): undefined reference to 'htole32'
  mxsboot.c:(.text+0x711): undefined reference to 'htole32'
  /tmp/cchLIV6q.o:mxsboot.c:(.text+0x71d): more undefined references to
  'htole32' follow
  collect2: ld returned 1 exit status
  make[1]: *** [tools/mxsboot] Error 1
  make: *** [tools] Error 2

The solution is to use cpu_to_le32() instead which is more portable,
just like other U-Boot tools [1] do.

[1] http://lists.denx.de/pipermail/u-boot/2014-October/192919.html

Suggested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
8 years agowandboard: fix variable name so PXE boot works
Peter Robinson [Wed, 20 Jan 2016 10:00:16 +0000 (10:00 +0000)]
wandboard: fix variable name so PXE boot works

All boards that support PXE booting use the pxefile_addr_r variable. Standardise
wandboard with this variable as pxe_addr_r isn't used anywhere else so it's a
typo.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
8 years agoarm: imx6: Enable DDR calibration on Novena
Marek Vasut [Wed, 16 Dec 2015 14:40:07 +0000 (15:40 +0100)]
arm: imx6: Enable DDR calibration on Novena

Enable the DDR calibration functionality on Novena to deal with the
memory SoDIMM on this board. Moreover, tweak the initial DDR DRAM
parameters so the calibration works properly.

Signed-off-by: Marek Vasut <marex@denx.de>
8 years agoarm: imx6: Add DDR3 calibration code for MX6 Q/D/DL
Marek Vasut [Wed, 16 Dec 2015 14:40:06 +0000 (15:40 +0100)]
arm: imx6: Add DDR3 calibration code for MX6 Q/D/DL

Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code
fine-tunes the behavior of the MMDC controller in order to improve
the signal integrity and memory stability.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
8 years agoPrepare v2016.03-rc1 v2016.03-rc1
Tom Rini [Tue, 2 Feb 2016 16:29:50 +0000 (11:29 -0500)]
Prepare v2016.03-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-atmel
Tom Rini [Tue, 2 Feb 2016 12:24:52 +0000 (07:24 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-atmel

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Tue, 2 Feb 2016 11:51:05 +0000 (06:51 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

8 years agoboard: atmel: sama5d2_xplained: add SPL support
Wenyou Yang [Mon, 1 Feb 2016 10:18:21 +0000 (18:18 +0800)]
board: atmel: sama5d2_xplained: add SPL support

The sama5d2 Xplained SPL supports the boot medias: spi flash
and SD Card.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoarm: at91/spl: mpddrc: use IP version to check configuration
Wenyou Yang [Mon, 1 Feb 2016 10:12:17 +0000 (18:12 +0800)]
arm: at91/spl: mpddrc: use IP version to check configuration

To remove the unnecessary #ifdef-endif, use the mpddrc IP version
to check whether or not the interleaved decoding type is supported.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoarm: at91/spl: mpddrc: add mpddrc DDR3-SDRAM initialization
Wenyou Yang [Mon, 1 Feb 2016 10:12:16 +0000 (18:12 +0800)]
arm: at91/spl: mpddrc: add mpddrc DDR3-SDRAM initialization

The DDR3-SDRAM initialization sequence is implemented in
accordance with the DDR3-SRAM/DDR3L-SDRAM initialization section
described in the SAMA5D2 datasheet.

Add registers and definitions of mpddrc controller, which is used
to support DDR3 devices.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoarm: at91/spl: mpddrc: add struct atmel_mpddrc_config
Wenyou Yang [Mon, 1 Feb 2016 10:12:15 +0000 (18:12 +0800)]
arm: at91/spl: mpddrc: add struct atmel_mpddrc_config

Add struct atmel_mpddrc_config to accommodate the mpddrc register
configurations, not using the mpddrc register map structure,
struct atmel_mpddrc, in order to increase readability and reduce
run-time memory use.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoatmel_nand: Add 32 bit ecc support for sama5d2 chip
Josh Wu [Tue, 24 Nov 2015 08:34:01 +0000 (16:34 +0800)]
atmel_nand: Add 32 bit ecc support for sama5d2 chip

Also if minimum ecc requirment is bigger then what we support, then just
use our maxium pmecc support.
But it is not safe, so we'll output a warning about this.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoatmel_nand_ecc: update pmecc registers according to sama5d2 chip
Josh Wu [Tue, 24 Nov 2015 08:34:00 +0000 (16:34 +0800)]
atmel_nand_ecc: update pmecc registers according to sama5d2 chip

1. add the pmecc register mapping for sama5d2.
2. add the pmecc error location register mapping for sama5d2.
3. add some new field that is different from old ip.
4. add sama5d2 pmecc ip version number.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoMakefile: Drop unnecessary -dtb suffixes
Simon Glass [Mon, 1 Feb 2016 01:10:55 +0000 (18:10 -0700)]
Makefile: Drop unnecessary -dtb suffixes

When OF_CONTROL is enabled, u-boot-dtb.* files are the same as u-boot.*
files. So we can use the latter for simplicity.

Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agoMakefile: Make u-boot.img the same as u-boot-dtb.img
Simon Glass [Mon, 1 Feb 2016 01:10:54 +0000 (18:10 -0700)]
Makefile: Make u-boot.img the same as u-boot-dtb.img

Create u-boot.img even when OF_CONTROL is enabled, so that this file can be
used in both cases.

Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agosocfpga: Simplify Makefile filenames
Simon Glass [Mon, 1 Feb 2016 01:10:53 +0000 (18:10 -0700)]
socfpga: Simplify Makefile filenames

We don't need the -dtb suffix anymore, so drop it.

Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agotegra: Always build a boot image with the same filename
Simon Glass [Mon, 1 Feb 2016 01:10:52 +0000 (18:10 -0700)]
tegra: Always build a boot image with the same filename

Adjust the Makefile to build u-boot-tegra.bin which contains a device tree
if OF_SEPARATE is enabled, and does not if not. This mirrors U-Boot's new
approach of using u-boot.bin to handle both cases.

Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agofdt: Build an SPL binary without device tree
Simon Glass [Mon, 1 Feb 2016 01:10:51 +0000 (18:10 -0700)]
fdt: Build an SPL binary without device tree

At present u-boot-spl.bin holds the plain SPL binary without the device
tree. This is somewhat annoying since you need either u-boot-spl.bin or
u-boot-spl-dtb.bin depending on whether device tree is used.

Adjust the build such that u-boot-spl.bin includes a device tree
(if enabled), and the plain binary is in u-boot-spl-nodtb.bin. For now
u-boot-spl-dtb.bin remains the same.

Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>