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6 years agogdb_server: run control fixes for vCont
Tomas Vanek [Fri, 23 Feb 2018 18:27:28 +0000 (19:27 +0100)]
gdb_server: run control fixes for vCont

this patch contains several changes to run control and state
handling together with gdb:
- graceful handling of target/gdb desync on resume, step and halt
- a default gdb-attach event executing the "halt" command, to meet gdb
  expectation of target state when it attaches
- call target_poll() after Ctrl-C command from gdb
- call target_poll() after resume and step through a vCont packet
- fix log message forwarding on vCont stepping, also move an aarch64
  log message from INFO to DEBUG level to prevent messing up the gdb
  console during source-line stepping
- fix oversight in vCont support that messes up breakpoint handling
  during stepping

Change-Id: Ic79db7c2b798a35283ff752e9b12475486a1f31a
Fixes: d301d8b42f0bfe67d76d6f340db6570cc71c876e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4432
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
6 years agoFix incorrect comment
Christopher Head [Mon, 26 Feb 2018 22:51:35 +0000 (14:51 -0800)]
Fix incorrect comment

target_start_algorithm does not download the algorithm. It only starts
it. It expects someone else to have already written the algorithm code
into the proper location before calling it.

Change-Id: I5e04406eed0ebb1c23e550dbf8d9f1204c432603
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4435
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agoExpand target_run_flash_async_algorithm() doc comment.
Girts Folkmanis [Mon, 8 May 2017 22:31:31 +0000 (15:31 -0700)]
Expand target_run_flash_async_algorithm() doc comment.

Change-Id: I5d1e8401cbcf0e116a233a2839a06d2c9dbc85ce
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Reviewed-on: http://openocd.zylin.com/4127
Tested-by: jenkins
Reviewed-by: Christopher Head <headch@gmail.com>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agoefm32: Add JTAG definitions to EFM32 target file
Jonas Norling [Tue, 17 Oct 2017 09:38:16 +0000 (11:38 +0200)]
efm32: Add JTAG definitions to EFM32 target file

This makes it possible to program newer EFM32 and EFR32 chips with
JTAG, as opposed to SWD.

Change-Id: Ia3e8c1bbc66fc1f33e8cf2087ccf0d1b4dfd74e1
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4262
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agostm8: fix compilation warning
Ake Rehnman [Tue, 23 Jan 2018 10:10:19 +0000 (11:10 +0100)]
stm8: fix compilation warning

Change-Id: Iedad040384316356442ec87769855fa2960893c5
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/4377
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
6 years agoflash/nor/core: fix Segmentation fault during flash write of bad formed img
Tomas Vanek [Thu, 8 Feb 2018 13:44:10 +0000 (14:44 +0100)]
flash/nor/core: fix Segmentation fault during flash write of bad formed img

flash_write_unlock() sorts sections by base address but does not check
if they overlap. In case of overlapped sections an item of padding[]
array can get negative and padding loop writes out of allocated buffer.

How to replicate: cat two copies of an ihex file to one file and try
to flash it.

Check for overlapped sections and abort write in such case.

Change-Id: I43eee7dc290a8d18faa59567b2118b88ad4bedca
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4397
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
6 years agotarget: fix target.working_area type
Peter Mamonov [Wed, 15 Feb 2017 10:03:15 +0000 (13:03 +0300)]
target: fix target.working_area type

Change-Id: I15cfbe6984656fb0b48d2af5a7e1afa10d47b6ab
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Reviewed-on: http://openocd.zylin.com/3977
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
6 years agogdb_server: update rtos threads on new connection
Matthias Welwarsky [Fri, 17 Feb 2017 15:18:09 +0000 (16:18 +0100)]
gdb_server: update rtos threads on new connection

make sure the RTOS thread database is updated early on a new
gdb connection.

Change-Id: I4da9ef30f8634263d697116cefc47976cd1970ad
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4000
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
6 years agortos: run rtos create hook only once on autodetect
Matthias Welwarsky [Fri, 17 Feb 2017 15:12:07 +0000 (16:12 +0100)]
rtos: run rtos create hook only once on autodetect

Whenever a "qSymbol" from gdb is received, the rtos "create"
function was called. Make sure this happens only once and only
if rtos autodetection is used.

Change-Id: Ie5f8632cfce2d64a38dbdb63468302c4e8a784f4
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3998
Tested-by: jenkins
Reviewed-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
6 years agortos: facilitate RTOS SMP handling
Matthias Welwarsky [Fri, 17 Feb 2017 13:45:00 +0000 (14:45 +0100)]
rtos: facilitate RTOS SMP handling

The RTOS handlers present OS threads to gdb but the openocd
target layer only knows about CPU cores (hardware threads).
This patch allows closing this gap inside the RTOS handler.

The default implementation just returns the current core, but
a RTOS handler can provide its own function that associates a
an OS thread with a core.

Change-Id: I12cafe50b38a38b28057bc5d3a708aa20bf60515
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3997
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
6 years agogdb_server: add support for vCont
Matthias Welwarsky [Wed, 20 Sep 2017 10:02:08 +0000 (12:02 +0200)]
gdb_server: add support for vCont

Make gdb use target support for single-stepping if available.

Change-Id: Ie72345a1e749aefba7cd175ccbf5cf51d4f1a632
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3833
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agocortex_a: fix handling of Thumb-2 32bit breakpoints
Matthias Welwarsky [Thu, 5 Oct 2017 12:50:16 +0000 (14:50 +0200)]
cortex_a: fix handling of Thumb-2 32bit breakpoints

When debugging Thumb-2 code, Gdb will at times send a
breakpoint packet 'Z0,<addr>,3', the number 3 denoting that
the instruction to break on is 32 bits long. Handle this by
replacing it with two consecutive 16bit Thumb BKPTs and make
sure to save and restore the full, original 32bit
instruction.

Note that this fix is only applicable if you debug a bare-metal program
(like the linux kernel) with the 'wrong' gdb, e.g. use an
"arm-linux" gdb instead of an "arm-eabi" gdb. But since most people
may not know about the subtle differences between gdb configurations
regarding thumb2 breakpoints it's still valid.

Change-Id: Ib93025faf35b11f0dba747a8c1fc36fd09a4c0f8
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4241
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
6 years agoicepick-d: extend access to core control register
Matthias Welwarsky [Sun, 26 Mar 2017 08:24:59 +0000 (10:24 +0200)]
icepick-d: extend access to core control register

The ICEPick-D jtag router has core control registers
that provide the same (or similar) functionality as
the tap control register, for individual cores
accessible through the same tap (e.g. through a DAP).

Core control registers are located at address "0x60 +
core-id" of the ROUTER address space (IR=ROUTER).

It is sometimes helpful or even necessary to modify the
core control register. This patch renames the
"icepick_d_coreid" function to the more appropriate
"icepick_d_core_control" and adds a "value" argument
that allows writing of arbitrary value.
"icepick_d_tapenable" is extended by an optional value
argument so that core control can be written as the tap
is enabled.

Change-Id: I0e7f91b596cb5075364c6c233348508f58e0a901
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4141
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
6 years agoarmv7a: forward error value in armv7a_cache_auto_flush_all_data
Oleksij Rempel [Tue, 30 Jan 2018 09:37:51 +0000 (10:37 +0100)]
armv7a: forward error value in armv7a_cache_auto_flush_all_data

if armv7a_l1_d_cache_clean_inval_all will fail, error value is never
forwarded. So make sure we do it from now.

Change-Id: I02acfaa938ec09f58df77191d13d8f4bb3308720
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4384
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
6 years agoefm32: Refactor EFM32 chip family data, add more chips
Jonas Norling [Tue, 17 Oct 2017 06:57:06 +0000 (08:57 +0200)]
efm32: Refactor EFM32 chip family data, add more chips

Add support for more EFM32/EFR32 Series 1 families. The family IDs
come from the DEVICE_FAMILY list in the EFM32GG11 reference manual,
which is the most up to date source I could find. Register locations
have been checked against SiLab's header files.

No datasheets or headers were available for EFR32MG2, EFR32xG14 and
EFM32TG11B, so they are just assumed to follow the pattern. EFM32GG11B
has the MSC registers on a different address compared to other chips.

This commit attempts not to change current behavior when detecting
chips. One detail that has changed is that PAGE_SIZE is read before
applying the workaround for old Giant and Leopard Gecko revisions, but
this is believed to be OK because the register exists but just has an
invalid value in it.

The manuals disagree on which of 120 and 121 is WG, so this commit
leaves it as is.

Change-Id: Ia152b0b9e323defc5158cb02d9a6b04a27008f2a
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4263
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
6 years agoAdd support for Cypress PSoC6 family of devices
Bohdan Tymkiv [Mon, 25 Sep 2017 11:25:22 +0000 (14:25 +0300)]
Add support for Cypress PSoC6 family of devices

* Tested on CY8CKIT-001 kit with PSoC6 daughter board.
* Tested with several J-Link adapters (Ultra+, Basic)

Change-Id: I0a818c231e5f0b270c7774037b38d23221d59417
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4233
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agoHandle improperly build image files gracefully
Andreas Bolsch [Sat, 28 Oct 2017 17:39:35 +0000 (19:39 +0200)]
Handle improperly build image files gracefully

Images build improperly (by simply concatenating separate images) were accepted,
but anything after the first end-of-file record *silently* ignored. Now emit warning
for intel and motorola images upon non-whitespace after first end-of-file record but
continue reading anyway.
ST ships some images broken that way in their CubeMX packages ...

Change-Id: I0c5d08fa90070fed11fb805c5f0dc39817048176
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4281
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agopsoc4: update for 4x00BLE, L, M, S and PRoC BLE devices
Tomas Vanek [Fri, 26 Aug 2016 19:03:27 +0000 (21:03 +0200)]
psoc4: update for 4x00BLE, L, M, S and PRoC BLE devices

Flash ROM API command PSOC4_CMD_SET_IMO48 is now optional on new devices.
Also code tidy up:
- improved system ROM call error detection
- probe does not require the target to be halted
- default_padded_value and erased_value set to 0
- fixed endianess problem in flash write and protection setting
- removed fancy chip detection table as it would be updated too often
- psoc4 flash_autoerase is now on by default to ease programming

psoc4.cfg distinguishes chip family and uses either proprietary acquire
function of a KitProg adapter or TEST_MODE workaround to "reset halt"

Change-Id: I2c75ec46ed0a95e09274fad70b62d6eed7b9ecdf
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3807
Tested-by: jenkins
Reviewed-by: David Girault <david.f.girault@gmail.com>
6 years agoflash/nor/at91samd: add SAM R30 family
Tomas Vanek [Mon, 30 Oct 2017 16:59:06 +0000 (17:59 +0100)]
flash/nor/at91samd: add SAM R30 family

Microchip SAM R30 consist of a MCU SAM L21 and a radio.
Similarly SAM R21 = SAM D21 + radio. Therefore SAM R devices
was incorporated into SAM D21 and L21 device groups.

Change-Id: I3448d784cae888070b57c2f504583760ddffc97f
Suggested-by: Martin Deicke <martin.deicke@an-solutions.de>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4282
Tested-by: jenkins
6 years agocortex_a: faster debug init
Matthias Welwarsky [Thu, 6 Apr 2017 06:47:03 +0000 (08:47 +0200)]
cortex_a: faster debug init

Don't use atomic dap operations when not necessary

Change-Id: Idc6dcd2bda95f7994852df4ae2a588976f4c9010
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4142
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
6 years agoflash/nor/kinetis_ke: fix warning retval set but not used
Tomas Vanek [Sun, 21 Jan 2018 09:47:32 +0000 (10:47 +0100)]
flash/nor/kinetis_ke: fix warning retval set but not used

I see no reason for not returning error from target_run_algorithm()
to higher level.

Reported by Clang static analyzer.

Change-Id: Iaaa8b66e487ecae88c0cf4ae2addba63341c032c
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4391
Tested-by: jenkins
Reviewed-by: Ivan Meleca <ivan@artekit.eu>
6 years agojtag: drivers: stlink: ignore write verify error
Paul Fertser [Sat, 20 Jan 2018 18:05:46 +0000 (21:05 +0300)]
jtag: drivers: stlink: ignore write verify error

This looks like some inappropriate stlink (mis-)feature and it messes
operations for writing to certain memory-mapped registers.

Discussed at https://forum.sparkfun.com/viewtopic.php?f=18&t=44949 .
Also known to be problematic for working with Kinetis parts.

Reported by robertfoss_ on IRC.

Change-Id: I8633aed13346c596000ba6c377758e1bb96db73f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4368
Tested-by: jenkins
Reviewed-by: Robert Foss <robert.foss@memcpy.io>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
6 years agoKinetis_ke: add KEAx family to texi and cfg comment
Tomas Vanek [Fri, 22 Sep 2017 22:24:19 +0000 (00:24 +0200)]
Kinetis_ke: add KEAx family to texi and cfg comment

Change-Id: Id8f676b027f57fc540473c1a3a01bdd2ec49a200
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4232
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
6 years agotcl: interface: harmonise RPi configs
Paul Fertser [Sat, 31 Dec 2016 13:05:55 +0000 (16:05 +0300)]
tcl: interface: harmonise RPi configs

Make all configs specify same JTAG and SWD GPIO numbers.

Change-Id: I65b09c1671c97f253f0aab88e511de7409d91e0a
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3932
Tested-by: jenkins
6 years agoflash: nor: jtagspi: fix jtagspi_read_status() warning
Paul Fertser [Sun, 14 Jan 2018 16:28:20 +0000 (19:28 +0300)]
flash: nor: jtagspi: fix jtagspi_read_status() warning

Clang static analyzer says that in certain cases "Assigned value is
garbage or undefined" there.

Change-Id: Ib35a4cf7a553ba9461270a0dc4c4b9b205091e73
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4338
Tested-by: jenkins
6 years agodoxygen: fix issues with recent Doxygen versions
Paul Fertser [Tue, 16 Jan 2018 12:08:34 +0000 (15:08 +0300)]
doxygen: fix issues with recent Doxygen versions

This fixes parsing of several documentation files which do not have
dot in the filename.

style.txt change fixes doxygen warnings and ensures proper display of
comment begin/end instructions in HTML.

Tested with Doxygen 1.8.13.

Change-Id: I9fd9ac3b51b47076b8fdbd3e93b90c3eba9b9631
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4342
Tested-by: jenkins
6 years agox86_32_common: fix some warnings
Paul Fertser [Wed, 17 Jan 2018 19:00:42 +0000 (22:00 +0300)]
x86_32_common: fix some warnings

Mostly "Dead assignment" reported by Clang static analyzer.

Change-Id: Ibf81d2ba2462570ee3a40e57a60c55a1d1fa0c00
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4351
Tested-by: jenkins
6 years agoarm_adi_v5: fix return value of mem_ap_read/write for size 0
Tomas Vanek [Thu, 18 Jan 2018 08:58:55 +0000 (09:58 +0100)]
arm_adi_v5: fix return value of mem_ap_read/write for size 0

Unhandled marginal case produced a warning in Clang static analyzer.

Change-Id: I3e2fc4182fa4f863acfb972b1e7a512fce5bf33a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Suggested-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/4357
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
6 years agoaarch64: clean up scan-build errors
Matthias Welwarsky [Tue, 16 Jan 2018 12:05:04 +0000 (13:05 +0100)]
aarch64: clean up scan-build errors

scan-build reported a couple of problems with code in aarch64.c,
this patch cleans them up. No functional changes.

Change-Id: Ie210237ddc840a8bbcd535f86a3a5faf473132f2
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4346
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agojtag: drivers: usb_blaster: clarify lowlevel driver selection code
Paul Fertser [Fri, 30 Dec 2016 21:04:48 +0000 (00:04 +0300)]
jtag: drivers: usb_blaster: clarify lowlevel driver selection code

This patch should make the code logic more transparent and user
notifications more useful.

It also fixes a warning "array subscript is below array bounds" that
leads to FTBFS on Raspbian GNU/Linux 8 (jessie).

Change-Id: I626b6a5bc013dfee7d36cf196f0abab981d30675
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3931
Tested-by: jenkins
6 years agonor/nrf5: added nrf51822 QFAAH2
Daniel Kucera [Sat, 13 Jan 2018 15:37:19 +0000 (16:37 +0100)]
nor/nrf5: added nrf51822 QFAAH2

Change-Id: I59725e098371c63ec3e6aa1d91bfed36b824a182
Signed-off-by: Daniel Kucera <daniel.kucera@gmail.com>
Reviewed-on: http://openocd.zylin.com/4334
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agoaarch64: implement mmu on/off for aarch32
Matthias Welwarsky [Mon, 22 Jan 2018 11:28:37 +0000 (12:28 +0100)]
aarch64: implement mmu on/off for aarch32

add decoding of aarch32 core modes (register layout is compatible)

Change-Id: I34c3146a7b1f836d3006be2b76b036da055b3d3e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4374
Tested-by: jenkins
Reviewed-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
6 years agoAdd read buffer to bitbang, improving performance.
Tim Newsome [Wed, 13 Dec 2017 21:13:22 +0000 (13:13 -0800)]
Add read buffer to bitbang, improving performance.

Previously for every bit scanned OpenOCD would write the bit, wait for
that bit to be scanned, and then read the result. This involves at least
2 context switches. Most of the time the next bit scanned does not
depend on the last bit we read, so with a buffer we now write a bunch of
bits to be scanned all at once, and then we wait for them all to be
scanned and have a result.

This reduces the time for one testcase where OpenOCD connects to a
simulator from 12.30s to 5.35s!

Running all our tests went from 13m13s to 3m55s.

Change-Id: Ie9fcea043ac1d7877a521125334ed47d4b3e1615
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4312
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
6 years agoUse timeval helpers
Christopher Head [Wed, 24 Jan 2018 22:35:40 +0000 (14:35 -0800)]
Use timeval helpers

Some of these changes actually fix broken comparisons which could
occasionally fail. Others just clean up the code and make it more clear.

Change-Id: I6c398bdc45fa0d2716f48a74822457d1351f81a5
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4380
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agoAdd timeval_compare helper function
Christopher Head [Wed, 24 Jan 2018 22:22:37 +0000 (14:22 -0800)]
Add timeval_compare helper function

Change-Id: Id75727a150912ff778a4fa32ad56467da33a6324
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4379
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agotcl: target: klx: use 1KiB for working area
Paul Fertser [Sat, 20 Jan 2018 18:10:39 +0000 (21:10 +0300)]
tcl: target: klx: use 1KiB for working area

Some parts have only that much. Reported by robertfoos_ on IRC.

Change-Id: I684fdccfa62cf726466ddc467543a990fd88c4dc
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4369
Reviewed-by: Robert Foss <robert.foss@memcpy.io>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agoflash Kinetis: add K27 and K28 devices
Tomas Vanek [Sun, 15 Oct 2017 08:34:27 +0000 (10:34 +0200)]
flash Kinetis: add K27 and K28 devices

Tested on FRDM-K28F. Thanks to Thomas Varghese for donating the kit.

Change-Id: Idcdd8bcf992acebd19e5335f7f833356500c45dd
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4255
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
6 years agoflash Kinetis: make FCF protection more user friendly
Tomas Vanek [Wed, 6 Sep 2017 20:34:14 +0000 (22:34 +0200)]
flash Kinetis: make FCF protection more user friendly

The Flash Configuration Field on Kinetis devices requires protection
because it is located in program flash space (at 0x400) and writing
an improper data to it may permanently lock the device. Even an erased
flash sector containing FCF engages security lock (not permanent one)
on the next reset or power cycle.

'kinetis fcf_source protection' mode was introduced in the change #3562.
Flash driver in this mode sets FCF immediately after sector erase to
prevent unintentional security lock. To do so the driver needs to know
FCF values before flash image data is actually processed. Flash
protection bits are available in bank structure, FOPT can be set by
'kinetis fopt' command and securing device by FSEC is not supported.

Nevertheless an inexperienced user flashed the device using an image
with FCF values different from those set in OpenOCD config and
concluded programming did not work as some verify errors showed.

This change tries to write maximum possible from image data
retaining FCF protection.

Check FCF in programmed data and report if some field differs from
values set by OpenOCD flash block protection and 'kinetis fopt' command.
Warn user about verify errors caused by FCF protection.

On devices with ECC flash (K26, K66 and KV5x) it is impossible to change
already programmed FCF - it would result in an ECC error. As FCF was
written just after erase in 'kinetis fcf_source protection' mode
the warning issued during flash write is the only possible action.

On non-ECC flash devices use cumulative flash programming to
set FCF values requested in programmed image data.
Use FSEC from programmed data only if it does not request a secure
mode. Device can be secured only in 'kinetis fcf_source write' mode.
Use FOPT from programmed data if its value was not configured
in OpenOCD config by 'kinetis fopt' command.

Change-Id: If65fbbd7700069f57e4ae32234dce371bff93674
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4228
Tested-by: jenkins
Reviewed-by: Robert Foss <robert.foss@memcpy.io>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agoflash: nor: stm32l4x: fix warning in probe
Paul Fertser [Wed, 17 Jan 2018 21:07:29 +0000 (00:07 +0300)]
flash: nor: stm32l4x: fix warning in probe

Reading options word can fail, so this needs to be handled.

Reported by Clang static analyzer.

Change-Id: I9754cab9c4446fa2b20d4b44b0e20724d1bc1beb
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4352
Tested-by: jenkins
Reviewed-by: Tim "mithro" Ansell <mithro@mithis.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agoserver: add safeguards against printing bogus port number
Paul Fertser [Wed, 17 Jan 2018 14:31:58 +0000 (17:31 +0300)]
server: add safeguards against printing bogus port number

Clang static checker emits "Assigned value is garbage or undefined"
warning there as it can't prove that when the socket descriptor is
AF_INET/SOCK_STREAM and getsockname doesn't return an error, sin_port
is guaranteed to be filled in.

Pacify it by obvious means.

Change-Id: I43b5e5ceb41c07d523a81b34a25490c4c5f49a70
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4350
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agotarget, arm_adi_v5: catch two allocation errors
Tomas Vanek [Sun, 14 Jan 2018 22:33:44 +0000 (23:33 +0100)]
target, arm_adi_v5: catch two allocation errors

Command
mdw 0 0x40000000
triggers Segmentation fault on an arm.
Size parameter is a nonsence that may happen e.g. if you
mistype mdw instead of mww.

Add checking for calloc() NULL return in mdb/h/w.

Use calloc() instead of malloc() as multiplication
count * sizeof(uint32_t) overflows for size >= 0x40000000.

Change-Id: I968c944d863d1173ef932a7077d526fccb9381ae
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4349
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
6 years agoFix Jim interpreter memory leak
Marc Schink [Wed, 10 Jan 2018 11:45:52 +0000 (12:45 +0100)]
Fix Jim interpreter memory leak

Change-Id: I71d7d97e7dc315c42fc43b65cb5fcecd7bdfb581
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2959
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agotarget: add initial imx7.cfg
Oleksij Rempel [Wed, 14 Jun 2017 08:06:38 +0000 (10:06 +0200)]
target: add initial imx7.cfg

Change-Id: I899a215049ff0bc8840463c71018867ef71b5b90
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4190
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
6 years agoaarch64: speed up first examination
Matthias Welwarsky [Thu, 6 Apr 2017 07:49:37 +0000 (09:49 +0200)]
aarch64: speed up first examination

Don't use atomic dap operations when not necessary. Also remove
loop trying to set core power request, didn't find a platform
where it actually worked and it's slowing examination down.

Change-Id: I44e5c2f289f951b8f4579f08a841172404a52053
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4143
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
6 years agoaarch64: simplify mode and state handling
Matthias Welwarsky [Thu, 6 Apr 2017 09:06:20 +0000 (11:06 +0200)]
aarch64: simplify mode and state handling

Aarch32 and Aarch64 modes don't conflict in CPSR, no need to deconflict
ARMv7-M profile modes either.

Change-Id: I4c437dfa657f9e8a1da3687bc9f21435384b7881
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4144
Tested-by: jenkins
Reviewed-by: Yao Qi <qiyaoltc@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
6 years agoaarch64: add 'maskisr' command
Matthias Welwarsky [Mon, 27 Feb 2017 16:10:19 +0000 (17:10 +0100)]
aarch64: add 'maskisr' command

Allow to configure ISR masking during single-step and add
handling for stepping over WFI with ISR masked.

Change-Id: I7918be7bcda6a1d9badac44fc36c59b52f662fef
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4023
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
6 years agoarm_adi_v5: added some partnumbers found in tegra 186 and tegra 210
Jiri Kastner [Mon, 12 Jun 2017 13:26:02 +0000 (15:26 +0200)]
arm_adi_v5: added some partnumbers found in tegra 186 and tegra 210

Change-Id: Icd4137f3e266364d9728672bd2359fbd9a6c8ce9
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/4160
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agojtagspi: new protocol that includes transfer length
Robert Jordens [Tue, 8 Aug 2017 16:16:35 +0000 (18:16 +0200)]
jtagspi: new protocol that includes transfer length

This commit contains a rewrite of the jtagspi protocol and covers both
changes in the jtagspi.c openocd driver and the bscan_spi
(xilinx_bscan_spi) proxy bitstreams. The changes are as follows:

1. Always perform IR scan to ensure proper clearing of BYPASSed DRs.
2. Insert alignment cycles for all BYPASSed TAPs:

  The previous logic was erroneous. The delay in clock cyles from a bit
  written to the jtag interface to a bit read by the jtag interface is:

  * The number of BYPASSed TAPs before this (jtagspi) tap
  * The length of the jtagspi data register (1)
  * The number of BYPASSed TAPs before this one.

  I.e. it is just the number of enabled TAPs. This also gets rid of the
  configuration parameter DR_LENGTH.

3. Use marker bit to start spi transfer

  If there are TAPs ahead of this one on the JTAG chain, and we are in
  DR-SHIFT, there will be old bits toggled through first before the first
  valid bit destined for the flash.
  This delays the begin of the JTAGSPI transaction until the first high bit.

4. New jtagspi protocol

  A JTAGSPI transfer now consists of:

  * an arbitrary number of 0 bits (from BYPASS registers in front of the
    JTAG2SPI DR)
  * a marker bit (1) indicating the start of the JTAG2SPI transaction
  * 32 bits (big endian) describing the length of the SPI transaction
  * a number of SPI clock cycles (corresponding to 3.) with CS_N asserted
  * an arbitrary number of cycles (to shift MISO/TDO data through
    subsequent BYPASS registers)

5. xilinx_bscan_spi: clean up, add ultrascale

This is tested on the following configurations:

* KC705: XC7K325T
* Sayma AMC: XCKU040
* Sayma AMC + RTM): XCKU040 + XC7A15T, a board with integrated FTDI JTAG
  adapter, SCANSTA JTAG router, a Xilinx Ultrascale XCKU040 and a Xilinx
  Artix 7 15T. https://github.com/m-labs/sinara/wiki/Sayma
* Custom board with Lattice FPGA + XC7A35T
* CUstom board with 3x XCKU115-2FLVA1517E

Change-Id: I7361e9fb284ebb916302941735eebef3612aa103
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4236
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agoserver/telnet: Use proper data types
Marc Schink [Wed, 13 Apr 2016 09:00:19 +0000 (11:00 +0200)]
server/telnet: Use proper data types

Change-Id: Ie7588e311fa5155d5ee73148dee3d0d931bfc7f5
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3413
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agoftdi swd: disable SWD output pin during input
Patrick Stewart [Wed, 27 Aug 2014 16:17:27 +0000 (17:17 +0100)]
ftdi swd: disable SWD output pin during input

 * Disables the data output pin while SWD is reading, so that a simple FTDI
   SWD interface can be made by connecting TCK to SWD_CLK and TDI+TDO directly
   to SWDIO. Enabled by setting SWDIO_OE to 0.

Change-Id: I7d3b71cf3f4eea163cb320aff69ed95d219190bd
Signed-off-by: Patrick Stewart <patstew@gmail.com>
Signed-off-by: Roger Lendenmann <roger.lendenmann@intel.com>
Reviewed-on: http://openocd.zylin.com/2274
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
6 years agocheckpatch: fix more "unescaped left brace" warnings
Paul Fertser [Tue, 4 Oct 2016 11:33:38 +0000 (14:33 +0300)]
checkpatch: fix more "unescaped left brace" warnings

Unescaped left brace in string literals is deprecated since perl
v5.21.1.

Not a Perl programmer here so please review!

Change-Id: I724d8fa616d603e032e07afb9b8933e0ec95045b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3801
Tested-by: jenkins
6 years agoAccept 64-bit addresses in CRC requests.
Tim Newsome [Tue, 26 Dec 2017 22:03:42 +0000 (14:03 -0800)]
Accept 64-bit addresses in CRC requests.

Change-Id: I6a3e97ae8ffb4dc2ca1197a8102cb9ba34de0a1e
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4317
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
6 years agoSupport listening on port 0.
Tim Newsome [Tue, 26 Dec 2017 21:44:26 +0000 (13:44 -0800)]
Support listening on port 0.

When listening on port 0, the system will assign a random open port. We
use this to run multiple OpenOCD instances against multiple simulators
as part of regression testing. This mechanism means the various test
instances don't have to coordinate to ensure they don't reuse any ports.

The required changes are minimal:
1. Don't increment the port number when it's 0.
2. Print out which port was assigned by the system.

Change-Id: I404c801fc405e9d8eb8420562c02e78d4db6242f
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4316
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
6 years agoejtag: added missing instructions.
Jiri Kastner [Mon, 16 Jan 2017 15:57:58 +0000 (16:57 +0100)]
ejtag: added missing instructions.

added missing instructions from latest available ejtag specification
(MD00047 v6.1 at time of writting) for trace control, fast data channel
and pcsample.

Change-Id: I30293951611265ffc2bd896f9d3ca6b310e5cac6
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/3950
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agoserver/telnet: Handle Ctrl+A and Ctrl+E
Marc Schink [Sun, 4 Oct 2015 18:21:00 +0000 (20:21 +0200)]
server/telnet: Handle Ctrl+A and Ctrl+E

Handle the Ctrl+A and Ctrl+E shortcuts which move the cursor to the
beginning and end of the command line, respectively.

Change-Id: I89fa5fd3c5edeb08a3f9320fda766f72ce9d7f64
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3415
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agoprofiling: write "correct" sample rate to gmon output
Karl Palsson [Fri, 8 Sep 2017 15:44:52 +0000 (15:44 +0000)]
profiling: write "correct" sample rate to gmon output

This duration vs sample count is _significantly_ closer to the truth
than simply declaring the value to be 100Hz.

Change-Id: Ie8d8bdf1959e1aa7cead0631cd2c86afe77d1efc
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/4221
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agohla_target: allow non-intrusive profiling on cortex-m
Karl Palsson [Fri, 8 Sep 2017 10:49:30 +0000 (10:49 +0000)]
hla_target: allow non-intrusive profiling on cortex-m

Leverages the existing work that added profiling via DWT_PCSR.

hla_target doesn't have direct access to the mem_ap for doing a bulk
repeated read, but simply reading the DWT_PCSR register repeatedly is
still ~2 order of magnitude faster than halt/resume.

Change-Id: Ibe451aa95143694398370fdad6939cfb6191d56f
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/4220
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agocortex_m: add profiling function
Simon Schubert [Fri, 1 Sep 2017 18:34:09 +0000 (20:34 +0200)]
cortex_m: add profiling function

Use DWT_PCSR if present (reads nonzero); otherwise do halt-and-sample pc.

Signed-off-by: Simon Schubert <2@0x2c.org>
Change-Id: Id2dc4665e5008cc497a2e6e6493522d038d5af42
Reviewed-on: http://openocd.zylin.com/4211
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agotarget: lakemon: implement assert_reset and deassert_reset
Felipe Balbi [Fri, 24 Feb 2017 13:26:39 +0000 (15:26 +0200)]
target: lakemon: implement assert_reset and deassert_reset

We're using an I/O port reset by default. The only board currently
supported (Galileo) doesn't have SRST routed on the JTAG connector.

When using 'reset halt', we must rely on Reset Break because our
adapters don't have support for PREQ#/PRDY# signals.

Tested with Intel Galileo GEN2.

Change-Id: Ia406e31c156f8001717d5b6a08bd03f71de790d3
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4016
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agotarget: quark_x10xx: miscellaneous cleanups
Felipe Balbi [Fri, 24 Feb 2017 13:25:32 +0000 (15:25 +0200)]
target: quark_x10xx: miscellaneous cleanups

Just some misc cleanups without any functional changes. It's just
easier to read.

Change-Id: I66bee31f297bcbdb8cc4446b774d7714fbaa7c83
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4015
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agotarget: type: fix indentation
Felipe Balbi [Fri, 24 Feb 2017 13:23:53 +0000 (15:23 +0200)]
target: type: fix indentation

No functional changes, cleanup only

Change-Id: I53c422be16d0a4ff157745d31362f6483093e5eb
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4014
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agotarget: lakemon: probemode entry isn't instantaneous
Felipe Balbi [Fri, 24 Feb 2017 13:21:37 +0000 (15:21 +0200)]
target: lakemon: probemode entry isn't instantaneous

When testing with Intel Galileo GEN2 I have noticed a few iterations
where probemode entry took a little longer. At most I had to read
tapstatus twice. This patch uses a loop of up to 100 iterations to
wait for tapstatus to update with PM entry results.

Change-Id: I1c87d7dde715255b3fd2460d299b9493218533fc
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4013
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agotarget: quark_x10xx: adding missing 'static' keyword
Felipe Balbi [Mon, 20 Feb 2017 15:35:55 +0000 (17:35 +0200)]
target: quark_x10xx: adding missing 'static' keyword

These symbols are only used within this C source file. They don't need
to be exposed to the outside.

Change-Id: Idb04550ecca7f12c3fdc8c6447eeeb871961add3
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4012
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agodigilent_jtag_smt2_nc: add support
Robert Jordens [Thu, 3 Aug 2017 14:25:13 +0000 (16:25 +0200)]
digilent_jtag_smt2_nc: add support

The Digilent SMT2 NC is nominally the connector-less version of the
SMT2. But neither the SMT2 configuration nor the HS3 configuration work
for on the Xilinx KCU105 board where the SMT2 NC is used.

Change-Id: Ieb27cbc6d8b0f9c64ef778e4e0c839acc85ec0ef
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4187
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agoXCF (Xilinx platfrom flash) support.
barthess [Sun, 11 Dec 2016 12:11:41 +0000 (15:11 +0300)]
XCF (Xilinx platfrom flash) support.

Change-Id: I4ee6db5f0abdb9fd279cc0edd13f71952a9d295d
Signed-off-by: Uladzimir Pylinski <barthess@yandex.ru>
Reviewed-on: http://openocd.zylin.com/3914
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agodoc: add SVF optional arguments descriptions
Paul Fertser [Thu, 21 Dec 2017 10:40:29 +0000 (13:40 +0300)]
doc: add SVF optional arguments descriptions

Change-Id: I1a3e5b04b6bc4821c4d11c8fcb33b426d6d41bfb
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4314
Tested-by: jenkins
Reviewed-by: Jim Norris <u17263@att.net>
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
6 years agoserver: gdb: always print target information in multi-target setups
Paul Fertser [Wed, 17 May 2017 08:03:19 +0000 (11:03 +0300)]
server: gdb: always print target information in multi-target setups

When multiple targets are declared, it's not always obvious which
target the connection was made for, this can lead to very confusing
errors.

Reported by zjason on IRC.

Change-Id: I52906320394e89cb6cfe82054a3f94b27c999689
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4135
Tested-by: jenkins
6 years agoflash/startup: make program accept filenames with spaces and other characters
Paul Fertser [Tue, 28 Mar 2017 10:23:43 +0000 (13:23 +0300)]
flash/startup: make program accept filenames with spaces and other characters

This should allow to process any path names excluding those that have
curly braces.

Change-Id: I87bf9ddede11e2b28d5826878eb1338143f73c03
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4083
Tested-by: jenkins
6 years agotools: release.sh: produce only SHA256 hashes
Paul Fertser [Sun, 15 Jan 2017 15:40:54 +0000 (18:40 +0300)]
tools: release.sh: produce only SHA256 hashes

Both MD5 and SHA-1 shouldn't be relied upon since long.

Change-Id: I0dea92fbf0f68b900c0d3a314fb3956d08ba0d48
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3949
Tested-by: jenkins
6 years agojtag: drivers: sysfsgpio, bcm2835gpio: remove requirement to have trst or srst
Paul Fertser [Sat, 31 Dec 2016 18:01:52 +0000 (21:01 +0300)]
jtag: drivers: sysfsgpio, bcm2835gpio: remove requirement to have trst or srst

This doesn't seem to make any sense.

Change-Id: I272de0ea3c0e86cc9a798cbd864050aaa597c3f0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3933
Tested-by: jenkins
6 years agotarget: arm: disassembler: decode v6T2 ARM MOV{W,T} instructions
Paul Fertser [Fri, 2 Dec 2016 18:54:10 +0000 (21:54 +0300)]
target: arm: disassembler: decode v6T2 ARM MOV{W,T} instructions

Change-Id: I32cf2669b1b22d4142f30674cf918e36561a885e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3899
Tested-by: jenkins
6 years agotarget: arm: disassembler: decode v6T2 ARM ISB instruction
Paul Fertser [Fri, 2 Dec 2016 17:15:46 +0000 (20:15 +0300)]
target: arm: disassembler: decode v6T2 ARM ISB instruction

Change-Id: Iaaa54aee6a74f0b250b83c53e7a3fb7c17718920
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3895
Tested-by: jenkins
6 years agotarget: arm: disassembler: decode v6T2 ARM DSB instruction
Paul Fertser [Fri, 2 Dec 2016 17:03:07 +0000 (20:03 +0300)]
target: arm: disassembler: decode v6T2 ARM DSB instruction

Change-Id: Id91b1a87d34982c72f2a8ab46564c961d1fef9dc
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3894
Tested-by: jenkins
6 years agotarget: arm: disassembler: add v5T Thumb BLX decoding
Paul Fertser [Fri, 2 Dec 2016 16:04:17 +0000 (19:04 +0300)]
target: arm: disassembler: add v5T Thumb BLX decoding

Reported by thesourcerer on IRC.

Change-Id: I36d4d95de176a19fdd0bf80d8b419be6ca637e98
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3893
Tested-by: jenkins
6 years agoflash: startup.tcl: do not disable polling when not exiting
Paul Fertser [Fri, 6 Oct 2017 16:39:21 +0000 (19:39 +0300)]
flash: startup.tcl: do not disable polling when not exiting

Change-Id: I31b8a8b4519d65d6587207a71eb08dcee8ddd6fd
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4243
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
6 years agoremote_bitbang_sysfsgpio: fix reset handling
Aleksey Shargalin [Tue, 31 Oct 2017 13:56:01 +0000 (16:56 +0300)]
remote_bitbang_sysfsgpio: fix reset handling

When both SRST and TRST asserted, 'u' is sent to remote bitbang.
Fix for correct handling of such a case

Change-Id: I2a93ff71f5bbae658e6c0c3649a9fbcca2c5a14b
Signed-off-by: Aleksey Shargalin <myokaski@gmail.com>
Reviewed-on: http://openocd.zylin.com/4283
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agoboard: consolidate st_nucleo_l4 boards
Pushpal Sidhu [Tue, 5 Dec 2017 17:36:17 +0000 (09:36 -0800)]
board: consolidate st_nucleo_l4 boards

We can now use the generic stlink.cfg which allows for both ST-LINK/V2
and V2-1 debuggers.

Change-Id: I229c6fe5f6a6a4f2d3c787a49939846f102f9e24
Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
Reviewed-on: http://openocd.zylin.com/4313
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agoAdded config files for stm8l152 stm8s003 and stm8s105
Ake Rehnman [Tue, 24 Oct 2017 18:50:39 +0000 (20:50 +0200)]
Added config files for stm8l152 stm8s003 and stm8s105

Change-Id: I26cc401aafac01e5aed8eac605488da5221ffdc2
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/4268
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agostlink_usb: Changes to make connect_under_reset work
Ake Rehnman [Sat, 4 Nov 2017 18:12:17 +0000 (19:12 +0100)]
stlink_usb: Changes to make connect_under_reset work

Leaving mode before closing added
Resolved a collision with JTAG API v1 error/status
checking overwriting SWIM status bytes

Change-Id: I35444ec0e6caace3e072c60085059602f4cdf0a4
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/4265
Tested-by: jenkins
Reviewed-by: Philipp Klaus Krause
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agojtag/drivers/stlink_usb : implemented and repaired SWIM support
Ake Rehnman [Sat, 21 Jan 2017 09:42:11 +0000 (10:42 +0100)]
jtag/drivers/stlink_usb : implemented and repaired SWIM support

Fixed a bug in stlink_usb_read_mem/write_mem preventing large data transfers

The SWIM support in stlink_usb was basically non existent so I have
implemented the missing parts. The bCBWCBLength and dCBWDataTransferLength
for STLINK-V1 protocol was not correct so that was fixed. The reason for
adding SWIM support is to add STM8 support for OpenOCD.

I have tested the driver on:
STM8 discovery board with the built-in STLINK-V1
STM8 discovery board with STLINK-V2 dongle
STM32 vldiscovery board with the built-in STLINK-V1
STM32F1xxx processor with STLINK-V2 dongle

Change-Id: I4aa80a92fb0226174356adaf2f8ff949920a621f
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/3952
Tested-by: jenkins
Reviewed-by: Philipp Klaus Krause
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agoarm_adi_v5: fix regression from 4553abf9064fe3c0e4ea2ed29a1d2217df74ff5f
Tomas Vanek [Wed, 10 Jan 2018 14:17:14 +0000 (15:17 +0100)]
arm_adi_v5: fix regression from 4553abf9064fe3c0e4ea2ed29a1d2217df74ff5f

Functions mem_ap_read() and mem_ap_write() incremented address even
if addrinc=false. I overlooked this fact and moved mem_ap_setup_tar()
set wrong addresses in no-incr mode.

Fixed by preventing address increment in no-incr mode.

Change-Id: I512e12a6a64e30cf6bc5bf77e3d57d35cc33e058
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Suggested-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/4326
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
6 years agojtag/drivers/kitprog: Enable LOG_DEBUG_IO
Forest Crossman [Sat, 6 Jan 2018 04:11:38 +0000 (22:11 -0600)]
jtag/drivers/kitprog: Enable LOG_DEBUG_IO

Change-Id: Ic01b0acf01e18bcb2bf98c101c7b5888cdc10186
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/4323
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agoaarch64: fix crash on single-stepping
Matthias Welwarsky [Wed, 26 Jul 2017 09:23:19 +0000 (11:23 +0200)]
aarch64: fix crash on single-stepping

Make sure to skip un-examined targets (e.g. targets with deferred
examination) on single-stepping

fixes bug #158

Change-Id: Ib40c6fee03079fd078bd52a84615e6f8a081d128
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4184
Tested-by: jenkins
Reviewed-by: Yao Qi <qiyaoltc@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agoarm_adi_v5: reduce some CSW writes
Tomas Vanek [Thu, 15 Jun 2017 09:03:32 +0000 (11:03 +0200)]
arm_adi_v5: reduce some CSW writes

MEM-AP access through banked data registers MEM_AP_REG_BD0..3
does not increment TAR regardless of the current autoincrement mode.
mem_ap_read_u32() and mem_ap_write_u32() can keep the current
autoincrement mode instead of switching autoincrement off.

Change-Id: Ib7ec688d3e04f1da678363cd2819ce90e8910e58
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4163
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
6 years agoarm_adi_v5: fix wrong addressing after change of CSW_ADDRINC
Tomas Vanek [Thu, 15 Jun 2017 06:59:01 +0000 (08:59 +0200)]
arm_adi_v5: fix wrong addressing after change of CSW_ADDRINC

Problem: If the same memory location is accessed alternatively
by MEM-AP banked data registers without autoincrement and by standard
autoincremented read/write, TAR register is not updated correctly.

How to replicate: On a Cortex-M issue
    mdw 0xe000edf0
multiple times. When poll is on (poll reads the same memory location)
only the first read is correct.
0xe000edf0: 01000000
0xe000edf0: 00000000
0xe000edf0: 20002640
0xe000edf0: 01000000
0xe000edf0: 00000000
0xe000edf0: 00000000

No problems with poll off.
0xe000edf0: 01000000
0xe000edf0: 01000000
0xe000edf0: 01000000

mem_ap_setup_tar() writes to MEM_AP_REG_TAR if requested TAR value
changed or CSW_ADDRINC_... is currently active.
However if an autoincremented access has been issued and autoinc
switched off in CSW afterwards, TAR does not get updated.

The change introduces mem_ap_update_tar_cache() which is called
after queuing of any access to MEM_AP_REG_DRW. It simulates
TAR increment to keep tar_value in sync with MEM_AP.
Crossing tar autoincrement block boundary invalidates cached value.

mem_ap_write() and mem_ap_read() do not check tar autoincrement
block boundary, mem_ap_setup_tar() is called before each transfer instead.

dap_invalidate_cache() is introduced to ensure invalidation
of all cached values during dap_dp_init() and swd_connect()

Change-Id: I815c2283d2989cffd6ea9a4100ce2f29dc3fb7b4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4162
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
6 years agotarget aarch64: rework memory read/write to use 8/16/32 bit operations
Bas Vermeulen [Sun, 26 Nov 2017 21:31:55 +0000 (22:31 +0100)]
target aarch64: rework memory read/write to use 8/16/32 bit operations

The existing code only used Memory Access mode to read memory,
which uses 32 bit operations only.
Rework the code to check the alignment/size of the read/write operation,
and use the Memory Access mode to read aligned 32 bit memory.
When using unaligned access, or 8 or 16 bit reads, use LDR{BHW} and STR{BHW}
instead.

The exception handling is still the same as it was before (meaning it breaks
when things go wrong), but I can now read an 8 bit register correctly.

Change-Id: I739a5ee825c0226ed4a89c32895cc2a047b8dc15
Signed-off-by: Bas Vermeulen <bas@daedalean.ai>
Reviewed-on: http://openocd.zylin.com/4301
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agojtag/drivers/cmsis-dap: fix connect under reset
Tomas Vanek [Sun, 9 Apr 2017 08:59:57 +0000 (10:59 +0200)]
jtag/drivers/cmsis-dap: fix connect under reset

Commit ef02b69b14d133b061217a91add5a028a77e86bc included
a call to cmsis_dap_cmd_DAP_Connect() before calling
cmsis_dap_cmd_DAP_SWJ_Sequence(). According to comment
it is necessary for at least Keil ULINK-ME.

Commit 72c3464be42088dc75245cf2fcc8f5c6e6959b4b added
a cmsis_dap_cmd_DAP_Disconnect() before connect call to pair
connection/disconnection. It solves some problems on Atmel EDBG.

Unfortunately calling either of cmsis_dap_cmd_DAP_Connect()
or cmsis_dap_cmd_DAP_Disconnect() deasserts reset signal.
So these workarounds break ability to connect under reset.

Use cmsis_dap_cmd_DAP_Disconnect() and cmsis_dap_cmd_DAP_Connect()
pair only if both SRST and TRST are deasserted.

Change-Id: I0914dae0a1360b8c7fe48231ff3867caedfb2dbe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reported-by: Leonardo Sabino dos Santos <leonardo.sabino@gmail.com>
Reviewed-on: http://openocd.zylin.com/4100
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agoconfig for ESPRESSObin from Globalscale Tech. Inc.
Jiri Kastner [Sat, 16 Dec 2017 21:21:14 +0000 (22:21 +0100)]
config for ESPRESSObin from Globalscale Tech. Inc.

Change-Id: I77f536a9d2e901ebcef0a7dd0f205e5332b1d382
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/4303
Tested-by: jenkins
Reviewed-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
6 years agoconfigs for Marvell Armada 3700
Jiri Kastner [Sat, 16 Dec 2017 21:17:52 +0000 (22:17 +0100)]
configs for Marvell Armada 3700

Change-Id: I367f39c9bc9e58380d6d5b500d5368d5173d96bd
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/4302
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agotarget: remove unused event definitions
Tomas Vanek [Tue, 31 Oct 2017 11:32:22 +0000 (12:32 +0100)]
target: remove unused event definitions

Events reset-halt-pre, reset-halt-post, reset-wait-pre and
reset-wait-post are not used anywhere.

Change-Id: I9a0f94875b102d9b08f6c2fd9d73a9f05f8e8e79
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4285
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
6 years agoflash/nor/stm32f2x: fix erase on STM32F413/423
Tomas Vanek [Thu, 23 Nov 2017 13:47:37 +0000 (14:47 +0100)]
flash/nor/stm32f2x: fix erase on STM32F413/423

Theese devices do not have a gap in sector numbering.
The driver translates sectors numbers 12 13... to 16 17... as used on dual
bank flash devices. Therefore erase of sector 12 and above fails with error
'stm32x device protected'
on F413/423.

Drop sector number translation for devices without has_large_mem flag.

Change-Id: I65531c0dfe02e2fd0f3d68f0615e0926e9901391
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4299
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
6 years agoflash/nor/stm32f2x: fix protection block size for F767 in dual bank mode
Tomas Vanek [Thu, 26 Oct 2017 16:00:33 +0000 (18:00 +0200)]
flash/nor/stm32f2x: fix protection block size for F767 in dual bank mode

A protection block comprises two adjacent sectors in dual bank mode.
As there are 64 and 128kB sectors joined in blocks 2 and 8, block size
should be computed as a sum of sector sizes.

Change-Id: Ie915df8cf7ca232c4565d7e0c514c8933e71fdfe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4271
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
6 years agodoc: improve stm32 flash driver documentation
Spencer Oliver [Thu, 7 Dec 2017 12:30:35 +0000 (12:30 +0000)]
doc: improve stm32 flash driver documentation

also remove legacy footnote as it adds no value.

Change-Id: I3892acf244bd8fba6f844a5d82a66004e193a395
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4309
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
6 years agojtag: drivers: stlink: handle all versions with single config
Paul Fertser [Thu, 26 Jan 2017 20:41:40 +0000 (23:41 +0300)]
jtag: drivers: stlink: handle all versions with single config

Extend HLA interface to allow multiple VID/PID pairs and use it to
autodetect the connected stlink version.

Change-Id: I35cd895b2260e23cf0e8fcb1fc11a78c2b99c69b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3961
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
6 years agoconfig: stm32l01x and stm32l02x chips support
elmot [Thu, 7 Dec 2017 08:08:28 +0000 (10:08 +0200)]
config: stm32l01x and stm32l02x chips support

New low-end chips have only 2k of RAM, workarea size adjusted

Change-Id: Ibfccd73fef9e6dabffc87d901736c5626ce411fe
Signed-off-by: Ilia Motornyi <elijah.mot@gmail.com>
Reviewed-on: http://openocd.zylin.com/4308
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
6 years agodocs: add missing stm32 flash driver documentation
Spencer Oliver [Wed, 6 Dec 2017 22:04:49 +0000 (22:04 +0000)]
docs: add missing stm32 flash driver documentation

Change-Id: I433780646e6fdfd0c2527b4a68025946ccb79d8b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4307
Tested-by: jenkins
Reviewed-by: <alexandre.torgue@st.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
6 years agostm8 : new target
Ake Rehnman [Mon, 6 Nov 2017 18:56:28 +0000 (19:56 +0100)]
stm8 : new target

New STM8 target based mostly on mips4k. Target communication
through STLINK/SWIM. No flash driver yet but it is still possible
to program flash through load_image command. The usual target debug
methods are implemented.

Change-Id: I7216f231d3ac7c70cae20f1cd8463c2ed864a329
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/3953
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
6 years agoAdd STM32H7 config files
Alexandre Torgue [Mon, 13 Nov 2017 16:00:58 +0000 (17:00 +0100)]
Add STM32H7 config files

Add 2 target files:
-stm32h7x.cfg
-stm32h7x_dual_bank.cfg

Add 2 config files for:
-STM32H743zi-nucleo bord
-STM32H743i and STM32H753i eval boards.

Change-Id: I2aae2c5acff4f3ff8e1bf232fda5a11a87f71703
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-on: http://openocd.zylin.com/4182
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
6 years agoflash: Add new stm32h7x driver support
Alexandre Torgue [Mon, 13 Nov 2017 13:05:28 +0000 (14:05 +0100)]
flash: Add new stm32h7x driver support

Add basic support for:
     -STM32H7x (Embedded flash 2M)

Erase and write tested on stm32h743.

Change-Id: Ie8d8786227cdeee39fcf5663167a053ad8dcef4c
Signed-off-by: Rémi Prud'homme <remi.prudhomme@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-on: http://openocd.zylin.com/4181
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
6 years agoOnly call cmsis_dap_cmd_DAP_SWD_Configure when swd_mode is enabled
Bas Vermeulen [Tue, 21 Nov 2017 16:12:24 +0000 (17:12 +0100)]
Only call cmsis_dap_cmd_DAP_SWD_Configure when swd_mode is enabled

The CMSIS-DAP used by NXP's LS1012ARDB board only supports JTAG,
and not SWD. Calling cmsis_dap_cmd_DAP_SWD_Configure returns with an
error (and doesn't actually do anything in the debugger).

Wrap the call to cmsis_dap_cmd_DAP_SWD_Configure in a check for
swd_mode, to make sure initialisation doesn't fail needlessly.

Change-Id: Id7e568cb6e36886bd7c5b3699d198a77a51c28c9
Signed-off-by: Bas Vermeulen <bas@daedalean.ai>
Reviewed-on: http://openocd.zylin.com/4294
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>