Wolfgang Denk [Sun, 14 Jun 2009 18:58:47 +0000 (20:58 +0200)]
MPC512x: factor out common code
Now that we have 3 boards for the MPC512x it turns out that they all
use the very same fixed_sdram() code.
This patch factors out this common code into cpu/mpc512x/fixed_sdram.c
and adds a new header file, include/asm-ppc/mpc512x.h, with some
macros, inline functions and prototype definitions specific to MPC512x
systems.
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Wolfgang Denk [Sun, 14 Jun 2009 18:58:46 +0000 (20:58 +0200)]
mecp5123: fix build error
The mecp5123 board did not compile because the MSCAN Clock Control
Registers were missing; these got added, but as an array instead
of 4 individual registers. Adapt the code so it builds.
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
For JEDEC flash, we should issue word programming command relative to
base address rather than sector base address. Original source makes
SST Flash fails to program sectors which are not on the 0x10000 boundaries.
e.g.
SST39LF040 uses addr1=0x5555 and addr2=0x2AAA, however, each sector
is 0x1000 bytes.
Thus, if we issue command to "sector base (0x41000) + offset(0x5555)",
it sends to 0x46555 and the chip fails to recognize that address.
This patch is tested with SST39LF040.
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com> Signed-off-by: Stefan Roese <sr@denx.de>
AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz.
It embeds USB high speed host and device, LCD, DDR2 RAM, and a full set of
peripherals.
The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES.
On the board you can find 2 USART, USB high speed,
a 480*272 LG lcd, ethernet, gpio/joystick/buttons.
Daniel Mack [Tue, 23 Jun 2009 15:30:05 +0000 (17:30 +0200)]
pxa: fix CKEN_B register bits
The current defition for CKEN_B register bits is nonsense. Adding 32 to
the shifted value is equal to '| (1 << 5)', and this bit is marked
'reserved' in the PXA docs.
OMAP3 pandora: Fix CKE1 MUX setting to allow self-refresh
Pandora is using both SDRC CSes. The MUX setting is needed
for the second CS clock signal to allow the 2 RAM parts to
be put in self-refresh correctly.
Based on similar patch for beagle and overo by
Jean Pihet and Steve Sakoman.
Set pullups or pulldowns for GPIOs which need them.
Disable them for others, which have external pulls.
Also make disabled pull setting consistent (some pins had
type set to "up" even if pull type selection was disabled).
OMAP3 pandora: setup pin mux for pins used on rev3 boards
Setup pin mux for GPIO pins connected on rev3 or later
boards. Also change NUB2 IRQ pin. This should not affect
older boards because they don't have any nubs (analog
controllers) attached to them.
Peter Tyser [Mon, 22 Jun 2009 23:01:41 +0000 (18:01 -0500)]
api_examples/Makefile: General cleanup
* Remove symlinking of files located outside api_examples/
* Auto generate dependencies for files located outside api_examples/
* Update names of variables to be similar to those in tools/Makefile
* Fix out of tree build error
Dependencies are calculated for all files in the SRCS variable.
Previously, the SRCS variable contained files which were symlinked
into the api_examples/ directory. These symlinked files did not exist
when dependencies were calculated when building out of tree. This
resulted in errors such as:
make[1]: *** No rule to make target `/work/wd/tmp-ppc/api_examples/.depend', needed by `_depend'. Stop.
make[1]: Leaving directory `/home/wd/git/u-boot/work/api_examples'
make: *** [depend] Error 2
Since symlinked source files are no longer used, this bug no longer
exists.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Rafal Jaworowski <raj@semihalf.com>
Timur Tabi [Fri, 19 Jun 2009 19:10:52 +0000 (14:10 -0500)]
remove _IO_BASE and KSEG1ADDR from board configuration files
The KSEG1ADDR macro used to be necessary for the RTL8139 Ethernet
driver, but the code that used that macro was removed over a year
ago, so board configuration files no longer need to define it.
The _IO_BASE macro is also automatically defined to 0 if it isn't
already set, so there's no need to define that macro either in the
board configuration files.
Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Andy Fleming <afleming@freescale.com> Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Acked-by: Kim Phillips <kim.phillips@freescale.com>
Jon Smirl [Sun, 14 Jun 2009 22:21:28 +0000 (18:21 -0400)]
board support patch for phyCORE-MPC5200B-tiny
Add support for the Phytec phyCORE-MPC5200B-tiny.
Code originally from Pengutronix.de.
Created CONFIG_SYS_ATA_CS_ON_TIMER01 define for when IDE CS is on
Timer 0/1
Signed-off-by: Jon Smirl <jonsmirl@gmail.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
Mike Frysinger [Mon, 15 Jun 2009 17:37:20 +0000 (13:37 -0400)]
kallsyms: fix escaping of NUL char in strings
The current kallsyms code is using \\0 to escape the backslash in the awk
code, but the shell too needs escaping. This way we make sure gcc is
passed the \0. Then gcc itself will consume this as an octal, so we have
to use 000 so gcc will create the final NUL.
Mike Frysinger [Thu, 25 Jun 2009 23:40:28 +0000 (19:40 -0400)]
Blackfin: blackstamp: update spi flash settings
The latest blackstamp boards can only run the SPI flash at 15MHz before
they start to crap out, so lower the max speeds accordingly. The new SPI
flash also has different sector requirements, so update the environment
sizes as well.
ppc4xx: Set default PCI device ID for 405EP boards
Current code only sets the PCI vendor id to 0x1014 and
leaved device id to 0x0000.
Ths patch ....
a) uses the correct PCI_VENDOR_ID_IBM macro for this
b) sets the default device ID as stated in the UM to 0x0156
by using PCI_DEVICE_ID_IBM_405GP for this.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Move 405EP pci code from cpu_init_f() to __pci_pre_init()
This patch moves some basic PCI initialisation from the 4xx cpu_init_f()
to cpu/ppc4xx/4xx_pci.c.
The original cpu_init_f() function enabled the 405EP's internal arbiter
in all situations. Also the HCE bit in cpc0_pci is always set.
The first is not really wanted for PCI adapter designs and the latter
is a general bug for PCI adapter U-Boots. Because it enables
PCI configuration by the system CPU even when the PCI configuration has
not been setup by the 405EP. The one and only correct place is
in pci_405gp_init() (see "Set HCE bit" comment).
So for compatibility reasons the arbiter is still enabled in any case,
but from weak pci_pre_init() so that it can be replaced by board specific
code.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
Vivek Mahajan [Wed, 24 Jun 2009 04:38:40 +0000 (10:08 +0530)]
mpc83xx: USB: fix: access of ehci struct elements
It fixes the access to the 'ehci' struct elements for mpc83xx which
should have been taken care of in 4ef01010aa4799c759d75e67007fdd3a38c88c8a
Sorry about that.
Simon Kagstrom [Tue, 7 Jul 2009 14:59:46 +0000 (16:59 +0200)]
Handle VID header offset in ubi part command
The VID header offset is sometimes needed to initialize the UBI
partition. This patch adds it (optionally) to the command line
for the ubi part command.
(Lines have been properly wrapped since last version)
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
This patch implements the is_pci_host() function in a similiar way
as it is used on 440 targets.
The former path with CONFIG_PCI_HOST == PCI_HOST_AUTO does not
build on 405EP targets because checking the PCI arbiter is different.
So putting the fixed code into a separate function makes the code
more readable.
Also using is_pci_host() on 405 brings 405 and 440 PCI code
a little bit closer.
In preparation for an upcoming 405EP based PMC module I made this
function weak so that it can be overwritten from board specific code.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Fixed PPC4xx debug compilation error in uic.c
This patch fixes a debug compilation error for PPC4xx platforms, all
other architectures are not affected by this change. The 'handler'
pointer was undefined. The fix is exercised and has effect only if
DEBUG is defined.
Signed-off-by: Alessio Centazzo acpatin@yahoo.com Signed-off-by: Stefan Roese <sr@denx.de>
Felix Radensky [Wed, 1 Jul 2009 08:37:46 +0000 (11:37 +0300)]
4xx: Fix compilation warnings and MQ registers dump in SPD DDR2 code
This patch fixes printf format string compilation warnings in several
debug statements. It also fixes the dump of DDR controller MQ registers
found on some 44x and 46x platforms. The current register dump code
uses incorrect DCRs to access these registers.
Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
Felix Radensky [Mon, 22 Jun 2009 12:30:42 +0000 (15:30 +0300)]
ppc4xx: Fix FDT EBC mappings on Canyonlands
This patch fixes 2 problems with FDT EBC mappings on Canyonlands.
First, NAND EBC mapping was missing, making Linux NAND driver
unusable on this board. Second, NOR remapping code assumed that
NOR is always on CS0, however when booting from NAND NOR is on CS3.
Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
HeungJun Kim [Tue, 30 Jun 2009 05:42:22 +0000 (14:42 +0900)]
env_onenand: change env_address type from unsigned long to loff_t
If use the onenand boot, the env_relocate_spec() calls mtd->read(),
and the type of the argument #2 of mtd->read() was changed to loff_t.
But, the "env_addr" type is still unsigned long, thus this patch change
the type from unsigned long to loff_t.
Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Mingkai Hu [Thu, 18 Jun 2009 10:23:27 +0000 (18:23 +0800)]
fsl_elbc_nand: redirect the pointer of bbt pattern to RAM
The bbt descriptors contains the pointer to the bbt pattern which
are statically initialized memory struct. When relocated to RAM,
these pointers will continue point to NOR flash(or L2 SRAM, or
other boot device). If the contents of NOR flash changed or L2
SRAM disabled, it'll hang the system.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Wed, 24 Jun 2009 22:23:49 +0000 (17:23 -0500)]
nand_spl: Fix cmd_ctrl usage in nand_boot.c.
When adding large page NAND support to this file, I had a misunderstanding
about the exact semantics of NAND_CTRL_CHANGE (which isn't documented
anywhere I can find) -- it is apparently just a hint to drivers,
which aren't required to preserve the old value for subsequent
non-"change" invocations.
This change makes nand_boot.c no longer assume this. Note that this
happened to work by chance with some NAND drivers, which don't preserve
the value, but treat 0 equivalently to NAND_CTRL_ALE.
I don't have hardware to test this, so any testing is appreciated.
Signed-off-by: Scott Wood <scottwood@freescale.com>
nand_spl: read environment early, when booting from NAND using nand_spl
Currently, when booting from NAND using nand_spl, in the beginning the default
environment is used until later in boot process the dynamic environment is read
out. This way environment variables that must be interpreted early, like the
baudrate or "silent", cannot be modified dynamically and remain at their
default values. Fix this problem by reading out main and redundand (if used)
copies of the environment in the nand_spl code.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
Wolfgang Denk [Sun, 24 May 2009 15:34:33 +0000 (17:34 +0200)]
nand/onenand: Fix missing argument checking for "markbad" command
The "nand markbad" and "onenand markbad" commands did not check if an
argument was passed; if this was forgotten, no error was raised but
block 0 was marked as bad.
While fixing this bug, clean up the code a bit and allow to pass more
than one block address, thus allowing to mark several blocks as bad
in a single command invocation.
Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
Mike Frysinger [Tue, 26 May 2009 02:42:28 +0000 (22:42 -0400)]
mtd: nand: new base driver for memory mapped nand devices
The BF537-STAMP Blackfin board had a driver for working with NAND devices
that are simply memory mapped. Since there is nothing Blackfin specific
about this, generalize the driver a bit so that everyone can leverage it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
David Brownell [Sun, 10 May 2009 22:43:01 +0000 (15:43 -0700)]
davinci_nand chipselect/init cleanup
Update chipselect handling in davinci_nand.c so that it can
handle 2 GByte chips the same way Linux does: as one device,
even though it has two halves with independent chip selects.
For such chips the "nand info" command reports:
Device 0: 2x nand0, sector size 128 KiB
Switch to use the default chipselect function unless the board
really needs its own. The logic for the Sonata board moves out
of the driver into board-specific code. (Which doesn't affect
current build breakage if its NAND support is enabled...)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
Sandeep Paulraj [Sat, 9 May 2009 16:35:20 +0000 (12:35 -0400)]
NAND DaVinci: Update to ALE/CLE Mask values
All DaVinci SOC's use a CLE mask of 0x10 and an ALE mask of 0x8
except the DM646x. This was decided by the design team driving the design.
This patch updates the CLE and ALE values for DM646x.
Updated patches for DM646x will be sent shortly.
This applies to u-boot-nand-flash git
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
David Brownell [Tue, 28 Apr 2009 20:19:53 +0000 (13:19 -0700)]
davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC)
Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option. It's not just nasty;
it's also unused by any current boards, and doesn't even match the
main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC
on newer chips that support it).
DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30,
match non-BROKEN code paths for 1-bit HW ECC. The BROKEN code paths
do seem to partially match what MontaVista/TI kernels (4.0/2.6.10,
and 5.0/2.6.18) do ... but only for small pages. Large page support
is really broken (and it's unclear just what software it was trying
to match!), and the ECC layout was making three more bytes available
for use by filesystem (or whatever) code.
Since this option itself seems broken, remove it. Add a comment
about the MV/TI compat issue, and the most straightforward way to
address it (should someone really need to solve it).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
David Brownell [Tue, 28 Apr 2009 20:19:50 +0000 (13:19 -0700)]
davinci_nand: cleanup I (minor)
Minor cleanup for DaVinci NAND code:
- Use I/O addresses from nand_chip; CONFIG_SYS_NAND_BASE won't
be defined when there are multiple chipselect lines in use
(as with common 2 GByte chips).
- Cleanup handling of EMIF control registers
* Only need one pointer pointing to them
* Remove incorrect and unused struct supersetting them
- Use the standard waitfunc; we don't need a custom version
- Partial legacy cleanup:
* Don't initialize every board like it's a DM6446 EVM
* #ifdef a bit more code for BROKEN_ECC
Sanity checked with small page NAND on dm355 and dm6446 EVMs;
and large page on dm355 EVM (packaged as two devices, not one).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
projects / u-boot / log