Jeroen Hofstee [Sat, 30 May 2015 08:11:24 +0000 (10:11 +0200)]
mtd: OMAP: Enable GPMC prefetch mode for 16 bit access
commit c316f57 "mtd: OMAP: Enable GPMC prefetch mode" only enabled
prefetch mode for 8 bit nand access, this adds 16 bit as well.
Cc: Scott Wood <scottwood@freescale.com> Cc: Tom Rini <trini@konsulko.com> Cc: Daniel Mack <zonque@gmail.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Tom Rini <trini@konsulko.com>
Jeroen Hofstee [Sat, 30 May 2015 08:11:23 +0000 (10:11 +0200)]
omap_gpmc: move prefetch out of CONFIG_NAND_OMAP_ELM
The prefech mode is a feature of the gpmc, not the ELM. An am3517
does not have an elm, but can do prefeches, so move the code out
of the CONFIG_NAND_OMAP_ELM ifdef.
Cc: Scott Wood <scottwood@freescale.com> Cc: Tom Rini <trini@konsulko.com> Cc: Daniel Mack <zonque@gmail.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Tom Rini <trini@konsulko.com>
Karsten Merker [Sun, 14 Jun 2015 10:08:42 +0000 (12:08 +0200)]
MSI_Primo81_defconfig: enable USB OTG port and keyboard support
The MSI Primo 81 is an Allwinner A31s-based tablet on which the
OTG port is the only accessible USB interface. The existing
defconfig had VGA console on the LCD enabled, but was missing
keyboard support because the prerequisites for that (sunxi MUSB
support and AXP221 GPIO support) had not been available before.
All previously missing dependencies are available now, so this
patch enables keyboard support and its prerequisites in the
defconfig.
Signed-off-by: Karsten Merker <merker@debian.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Sun, 14 Jun 2015 14:53:15 +0000 (16:53 +0200)]
sun6i: cpu_reset: Do not return from cpu_reset()
Currently on sun6i after a "reset" the prompt returns and the user can
even type stuff until the watchdog triggers and does the actual reset.
This is somewhat unexpected behavior for the "reset" command, this
commit adds an endless loop to wait for the watchdog to trigger so that
we do not return to the prompt.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sun, 14 Jun 2015 09:58:43 +0000 (11:58 +0200)]
sunxi: musb: Remove unused sunxi_musb_exit method
Remove the unused sunxi_musb_exit method, there is no code in u-boot
calling the exit method, and our implementation was broken as it did
not disable the clocks and asserted reset.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sun, 14 Jun 2015 09:55:28 +0000 (11:55 +0200)]
sunxi: musb: Do not fully reset the controler from sunxi_musb_disable
Fully resetting the controller is a too big hammer, and the musb_core will
then afterwards fail to communicate with any endpoints other then 0 as
too much state was cleared.
Instead report vbus low for 200ms which will effectively end the current
session without needing to do a full reset.
This fixes usb mass-storage devices no longer working after a "usb reset"
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Tom Rini [Sat, 13 Jun 2015 00:52:29 +0000 (20:52 -0400)]
omap5: Exclude more environment from SPL builds
In the cases where we make use of environment in SPL we do not need
these defaults compiled in and available. These are taking up space
that in some cases now prevent linking, so drop.
Lokesh Vutla [Thu, 4 Jun 2015 04:38:50 +0000 (10:08 +0530)]
ARM: DRA7: emif: Fix DDR init sequence during warm reset
Unlike OMAP5, EMIF PHY used in DRA7 will be left in unknown state after
warm reset, emif needs to be configured to bring it back to a known
state. So configure EMIF during warm reset.
Reported-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 10 Jun 2015 10:24:50 +0000 (15:54 +0530)]
ARM: AM43x: Fix MAX_RAM_BANK_SIZE
On AM437x-GP Evm there is 2GB of DDR3 memory available as stated in
AM437x GP EVM HardwareUser's guide http://www.ti.com/lit/ug/spruhw7/spruhw7.pdf.
But MAX_RAM_BANK_SIZE is defined as 1GB.
Fixing MAX_RAM_BANK_SIZE to 2GB on AM43xx.
Tom Rini [Fri, 5 Jun 2015 10:21:11 +0000 (15:51 +0530)]
am33xx: Re-enable SW levelling for DDR2
The recent changes for hw leveling on am33xx were not intended for
DDR2 boards, only DDR3. Update emif_sdram_type to take a sdram_config
value to check against. This lets us pass in the value we would use to
configure, when we have not yet configured the board yet. In other cases
update the call to be as functional as before and check an already
programmed value in.
Tested-by: Yan Liu <yan-liu@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Roger Quadros [Fri, 5 Jun 2015 09:42:21 +0000 (12:42 +0300)]
am335x_evm: nand: Fix boot from NAND
Use the correct partition names from with the Device Tree blob
and the kernel is picked up. Also use partition name instead of
number for the root filesystem in the kernel boot arguments.
Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Roger Quadros [Fri, 5 Jun 2015 09:42:20 +0000 (12:42 +0300)]
am335x_evm: am44xx_evm: dra7xx_evm: nand: Fix file-system partition name
We almost always use UBIFS for user accessible NAND file systems and
the UBIFS file system might contain more than one volume within the
single NAND partition. The last NAND partition is therefore more
appropriately named as "NAND.file-system" instead of "NAND.rootfs"
The Linux kernel (as of v3.16) also uses "NAND.file-system" to name the
last NAND partition. This patch makes the partition name consistent
between u-boot and the kernel.
Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Mark Langsdorf [Thu, 4 Jun 2015 23:58:49 +0000 (00:58 +0100)]
highbank: add custom ahci_link_up function
The Calxeda highbank SOC needs a custom sequence to bring up SATA links,
so override ahci_link_up with custom function to handle combophy setup.
Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com> Signed-off-by: Richard Gibbs Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Andre Przywara <osp@andrep.de>
Stefan Roese [Fri, 29 May 2015 11:25:04 +0000 (13:25 +0200)]
tools/kwboot: Add parameters to set delay and timeout via cmdline
To support the Armada 38x, new values for the request-delay and the
response-timeout are needed. As the values already implemented in
this tool (for Kirkwood and Armada XP) don't seem to work here.
To make this more flexible, lets add make those 2 parameters
configurable via the cmdline. Here the new parameters:
-q <req-delay>: use specific request-delay
-s <resp-timeo>: use specific response-timeout
For the Marvell DB-88F6820 these values are known to work:
One board:
-q 2 -s 1
2nd board:
-q 5 -s 5
So this seems to be even board specific. But with this patch now
those values can be specified and tested via the cmdline.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Luka Perkov <luka.perkov@sartura.hr>
Kevin Smith [Mon, 18 May 2015 16:09:44 +0000 (16:09 +0000)]
arm: mvebu: Update CBAR with SOC regs base
SMP-enabled Linux kernels read the CBAR register in CP15 to find
the address of the SCU registers. After remapping internal
registers, also update the CBAR so the kernel can find them.
Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Stefan Roese <sr@denx.de>
Kevin Smith [Mon, 16 Mar 2015 14:58:21 +0000 (14:58 +0000)]
tools/kwbimage.c: Correct header size for SPI boot
If defined, the macro CONFIG_SYS_SPI_U_BOOT_OFFS allows a board
to specify the offset of the payload image into the kwb image
file. This value was being used to locate the image, but was not
used in the "header size" field of the main header. Move the
use of this macro into the function that returns the header size
so that the same value is used in all places.
Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Stefan Roese <sr@denx.de>
Mark Langsdorf [Thu, 4 Jun 2015 23:58:46 +0000 (00:58 +0100)]
ahci: extend data io wait to 10s
The AHCI driver currently waits 5s before timing out when sending a
data command to a drive. Some drives take upwards of 8s to respond to
the initial data command while they're spinning up. Increase the
data io timeout to 10s so that those drives can be found on initial
scsi scan.
Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com> Signed-off-by: Andre Przywara <osp@andrep.de>
Mark Langsdorf [Thu, 4 Jun 2015 23:58:45 +0000 (00:58 +0100)]
ahci: support LBA48 data reads for 2+TB drives
Enable full 48-bit LBA48 data reads by passing the upper word of the
LBA block pointer in bytes 9 and 10 of the FIS.
This allows uboot to load data from any arbitrary sector on a drive
with 2 or more TB of available data connected to an AHCI controller.
Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com> Signed-off-by: Andre Przywara <osp@andrep.de>
[trini: Make use of CONFIG_SYS_64BIT_LBA in a few places to drop
warnings on platforms that don't enable that feature ] Signed-off-by: Tom Rini <trini@konsulko.com>
Mark Langsdorf [Thu, 4 Jun 2015 23:58:43 +0000 (00:58 +0100)]
ARM: highbank: add reset support for Calxeda Midway machine
The Calxeda Midway part has A15 cores, which do not have the Highbank
A9's SCU used there for resetting the chip.
Add code to distinguish between the A9 and the A15 and invoke the
appropriate register writes to support the newer part.
Andre: rework detection of Highbank vs. Midway
Rob: fix Andre's reworked detection
Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com> Signed-off-by: Andre Przywara <osp@andrep.de> Signed-off-by: Rob Herring <robh@kernel.org>
Enabling IO delay recalibration sequence for DRA7 EVM.
UART and I2C are configured before IO delay recalibration sequence
as these are used earlier and safe to use.
Lokesh Vutla [Thu, 4 Jun 2015 11:12:37 +0000 (16:42 +0530)]
ARM: DRA7: Add support for manual mode configuration
In addition to the regular mux configuration, certain pins of DRA7
require to have "manual mode" also programmed, when predefined
delay characteristics cannot be used for the interface.
struct iodelay_cfg_entry is introduced for populating
manual mode IO timings.
For configuring manual mode, along with the normal pad
configuration do the following steps:
- Select MODESELECT field of each assocaited PAD.
CTRL_CORE_PAD_XXX[8]:MODESELECT = 1(Enable MANUAL_MODE macro along with mux)
- Populate A_DELAY, G_DELAY values that are specified in DATA MANUAL.
And pass the offset of the CFG_XXX register in iodelay_cfg_entry.
Lokesh Vutla [Thu, 4 Jun 2015 11:12:36 +0000 (16:42 +0530)]
ARM: DRA7: Add support for IO delay configuration
On DRA7, in addition to the regular muxing of pins, an additional
hardware module called IODelay which is also expected to be
configured. This "IODelay" module has it's own register space that is
independent of the control module.
It is advocated strongly in TI's official documentation considering
the existing design of the DRA7 family of processors during mux or
IODelay recalibration, there is a potential for a significant glitch
which may cause functional impairment to certain hardware. It is
hence recommended to do muxing as part of IOdelay recalibration.
IODELAY recalibration sequence:
- Complete AVS voltage change on VDD_CORE_L
- Unlock IODLAY config registers.
- Perform IO delay calibration with predefined values.
- Isolate all the IOs
- Update the delay mechanism for each IO with new calibrated values.
- Configure PAD configuration registers
- De-isolate all the IOs.
- Relock IODELAY config registers.
Lokesh Vutla [Thu, 4 Jun 2015 11:12:35 +0000 (16:42 +0530)]
ARM: DRA7: Add support for virtual mode configuration
In addition to the regular mux configuration, certain pins of DRA7
require to have "virtual mode" also programmed.
This allows for predefined delay characteristics to be used by the SoC
to meet timing characterstics needed for the interface.
Provide easy to use macro to do the same.
For configuring virtual mode, along with normal pad configuration add
the following two steps:
- Select MODESELECT field of each assocaited PAD.
CTRL_CORE_PAD_XXX[8]:MODESELECT = 1
- DELAYMODE filed should be configured with value given in DATA Manual.
CTRL_CORE_PAD_XXX[7:4]:DELAYMODE =[0-15] (as given in DATA manual).
Lokesh Vutla [Thu, 4 Jun 2015 11:12:34 +0000 (16:42 +0530)]
ARM: DRA7: Add pinctrl register definitions
Adopting the pinctrl register definitions from Linux kernel
to be consistent.
Old definitions will be removed once all the pinctrl data
is adapted to new definitions.
Lokesh Vutla [Wed, 3 Jun 2015 11:27:47 +0000 (16:57 +0530)]
ARM: DRA7xx: EMIF: Fix DLL_CALIB_CTRL register
When DLL_CALIB_INTERVAL is set, an extra delay is added
which is not required and it consumes EMIF bandwidth.
So making the DLL_CALIB_CTRL[8:0]DLL_CALIB_INTERVAL bits to 0.
Masahiro Yamada [Wed, 27 May 2015 02:39:22 +0000 (11:39 +0900)]
kconfiglib: sync with the latest in Kconfiglib project
This commit imports some updates of kconfiglib.py from
https://github.com/ulfalizer/Kconfiglib
- Warn about and ignore the "allnoconfig_y" Kconfig option
- Statements in choices inherit menu/if deps
- Add Symbol.is_allnoconfig_y()
- Hint that modules are still supported despite warnings.
- Add warning related to get_defconfig_filename().
- Fix typo in docs.
- Allow digits in $-references to symbols.
Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com> Signed-off-by: Philip Craig <philipjcraig@gmail.com> Signed-off-by: Jakub Sitnicki <jsitnicki@gmail.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Pali Rohár [Tue, 9 Jun 2015 17:05:00 +0000 (19:05 +0200)]
Nokia RX-51: Fix calculating return address in save_boot_params
Commit e11c6c279d823dc0d2f470c5c2e3c0a9854a640f broke calculating lr register
in function save_boot_params() and caused U-Boot to crash at early boot time
on Nokia N900 board.
This patch fix calculating return address in lr register and make Nokia N900
board bootable again. Patch was tested in qemu and also on real N900 HW.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Prior to that commit, those boards defined CONFIG_LIB_RAND, but not
CONFIG_NET_RANDOM_ETHADDR. So, commit 9ba9e85f3f1c should not have
touched them, but in fact it ripped CONFIG_LIB_RAND off from all the
header files, which caused undefined reference to srand and rand.
CONFIG_LIB_RAND=y must be revived for such boards.
BTW, this commit indeed makes it better, but even with this fix,
three boards (bf533-stamp, bf538f-ezkit, cm-bf548) still can not
build due to region 'ram' overflowed error. This was cause by
commit 6eed3786c68c (net: Move the CMD_NET config to defconfigs)
because CMD_NET selects NET, and NET selects REGEX. Eventually,
some boards were newly enabled with CONFIG_REGEX, increasing the
memory footprint. A patch is expected to fix the build error.
Masahiro Yamada [Thu, 11 Jun 2015 10:13:49 +0000 (19:13 +0900)]
README.scrapyard: add entries for dead AVR32 boards
Some AVR32 boards were dropped by the following commits: 9eb45aabe078 (avr32: delete non generic board favr-32-ezkit) e36930764471 (avr32: delete non generic board hammerhead) c62d2f8fc5c6 (avr32: delete non generic board mimc200) e5354b8a9e2a (avr32: delete non generic board's atstk100{3, 4, 6})
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Simon Glass [Tue, 12 May 2015 20:55:05 +0000 (14:55 -0600)]
dm: serial: Don't support CONFIG_CONS_INDEX with device tree
This feature should be deprecated for new boards, and significantly adds
to SPL code size. Drop it. Instead, we can use stdout-path in the /chosen
node.
Simon Glass [Tue, 12 May 2015 20:55:02 +0000 (14:55 -0600)]
dm: ns16550: Support CONFIG_SYS_NS16550_MEM32 with driver model
This option is used by some boards, so support it with driver model. This
is really ugly - we should rewrite this driver once all users are moved to
driver model.
Simon Glass [Wed, 13 May 2015 13:02:27 +0000 (07:02 -0600)]
Remove typedefs from bmp_layout.h
We try to avoid typedefs and these ones are easy enough to remove. Before
changing this header in the next patch, remove the typedefs.
Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Glass [Wed, 13 May 2015 13:02:24 +0000 (07:02 -0600)]
arm: spl: Add an API to detect when U-Boot is started from SPL
For secure boot systems it is common to have a read-only U-Boot which starts
the machine and jumps to a read-write U-Boot for actual booting the OS. This
allows the read-write U-Boot to be upgraded without risk of permanently
bricking the machine. In the event that the read-write U-Boot is corrupted,
the read-only U-Boot can detect this with a checksum and boot into a
recovery flow.
To support this, add a way to detect when U-Boot is run from SPL as opposed
to some other method, such as booted directly (no SPL) or started from
another source (e.g. a primary U-Boot). This works by putting a special value
in r0.
For now we rely on board-specific code to actually check the register and
set a flag. At some point this could be generalised, perhaps by using a spare
register and passing a flag to _main and/or board_init_f().
This commit does not implement any feature, but merely provides the API for
boards to implement.
Simon Glass [Wed, 6 May 2015 20:00:16 +0000 (14:00 -0600)]
dm: tegra: usb: Move USB to driver model
Somehow this change was dropped in the various merges. I noticed when I
came to turn off the non-driver-model support for Tegra. We need to make
this change (and deal with any problems) before going further.
Change-Id: Ib9389a0d41008014eb0df0df98c27be65bc79ce6 Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
sunxi: Enable CONFIG_SYS_64BIT_LBA when AHCI is used
Due to absence of CONFIG_SYS_64BIT_LBA, u-boot-sunxi currently has
no support for the (GPT) partioning scheme of large disks > 2TB.
While the AHCI driver seems to handle this nicely, the problem is
that lbaint_t values get truncated to 32-bit.
This patch sets CONFIG_SYS_64BIT_LBA from sunxi_common.h for all
SoCs that support AHCI (CONFIG_SUNXI_AHCI).
Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
This commit cleanup MAX77686 regulator node by:
- remove the sub-nodes of unconnected regulators
- remove the "regulator-compatible" properties of all regulators
This prevents printing init errors for the regulators,
with duplicated name strings.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Glass [Fri, 5 Jun 2015 20:39:46 +0000 (14:39 -0600)]
tegra: config: nyan-big: Add options required by Chrome OS boot
We need to match the device tree in the FIT with the U-Boot model so we
can automatically select the right device tree. Also adjust the load address
so that the device tree is not in the way when a zImage kernel tries to
extract itself.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Fri, 5 Jun 2015 20:39:35 +0000 (14:39 -0600)]
tegra: spi: Support slow SPI rates
Use the oscillator as the source clock when we cannot achieve a low-enough
speed with the peripheral clock. This happens when we request 3MHz on a SPI
clock, for example.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Fri, 5 Jun 2015 20:39:33 +0000 (14:39 -0600)]
tegra: spi: Drop the claim_bus() method to correct delays
At present the driver does not properly honour the requested SPI CS
deactivation delay since the SPI bus is changed in the claim_bus() method.
Everything the claim_bus() method does can be done when the device is probed
(setting the speed and mode) and at the start of a new transfer (where the
fifo_status is already cleared). So drop this method.
Also, until the delay is complete, we should not touch the bus, so make sure
that spi_cs_activate() is called before other things are done in the xfer()
method.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Adam YH Lee [Mon, 1 Jun 2015 21:29:09 +0000 (14:29 -0700)]
pepper: Implement Board Detection mechanism
AM335x-based 'Gumstix Pepper' SBCs and variants use different types of
RAM (DDR2 vs DDR3 with DDR3 being the default). Detect the board type
by reading the factory-programmed EEPROM [1] and use this to select any
runtime boot options such as RAM type.
Stefan Roese [Mon, 18 May 2015 12:08:24 +0000 (14:08 +0200)]
autoboot.c: Add feature to stop autobooting via SHA256 encrypted password
This patch adds the feature to only stop the autobooting, and therefor
boot into the U-Boot prompt, when the input string / password matches
a values that is encypted via a SHA256 hash and saved in the environment.
This feature is enabled by defined these config options:
CONFIG_AUTOBOOT_KEYED
CONFIG_AUTOBOOT_STOP_STR_SHA256
Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
projects / u-boot / log