]> git.sur5r.net Git - u-boot/log
u-boot
7 years agoMerge git://git.denx.de/u-boot-fdt
Tom Rini [Fri, 25 Nov 2016 22:40:02 +0000 (17:40 -0500)]
Merge git://git.denx.de/u-boot-fdt

7 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Fri, 25 Nov 2016 22:39:54 +0000 (17:39 -0500)]
Merge git://git.denx.de/u-boot-fsl-qoriq

Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
arch/arm/Kconfig

7 years agoMAINTAINERS: Fix syntax and update filename for FDT
Andreas Färber [Wed, 26 Oct 2016 16:14:00 +0000 (18:14 +0200)]
MAINTAINERS: Fix syntax and update filename for FDT

Let get_maintainers.pl pick up the new cmd/fdt.c.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoimage-fit: Fix compiling error caused by autoconf.h
York Sun [Wed, 23 Nov 2016 17:25:09 +0000 (09:25 -0800)]
image-fit: Fix compiling error caused by autoconf.h

Commit ec6617c3 includes autoconf.h in image-fit.c, causing conflict
for board odroid-xu3 which overwrites CONFIG_SYS_BOARD in header
file. Move the include higher and use linux/kconfig.h instead of
generated/autoconf.h.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Alison Wang <alison.wang@nxp.com>
8 years agoarmv7: ls1021aiot: Fixing SPL compiling issues
York Sun [Wed, 23 Nov 2016 17:08:47 +0000 (09:08 -0800)]
armv7: ls1021aiot: Fixing SPL compiling issues

To align with SPL change 38fed8ab and 693d4c9f, add Kconfig option
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to defconfig, and remove
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Feng Li <feng.li_2@nxp.com>
8 years agocolibri_pxa270: transition to driver model for serial
Marcel Ziswiler [Mon, 14 Nov 2016 20:40:28 +0000 (21:40 +0100)]
colibri_pxa270: transition to driver model for serial

Add serial platform data to board file.
Enable driver model for PXA serial driver.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
8 years agocolibri_pxa270: drop edit, elf, fpga, hush, regex et al. for space reason
Marcel Ziswiler [Mon, 14 Nov 2016 20:40:27 +0000 (21:40 +0100)]
colibri_pxa270: drop edit, elf, fpga, hush, regex et al. for space reason

With em humble DM and Kconfig migraters U-Boot binary size keeps
increasing. Drop a bunch of less needed stuff to save another precious
20+ KB.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
8 years agoserial: pxa: integrate optional driver model handling
Marcel Ziswiler [Mon, 14 Nov 2016 20:40:26 +0000 (21:40 +0100)]
serial: pxa: integrate optional driver model handling

Optional driver model handling integration.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
8 years agoserial: pxa: use kconfig for serial configuration
Marcel Ziswiler [Mon, 14 Nov 2016 20:40:25 +0000 (21:40 +0100)]
serial: pxa: use kconfig for serial configuration

Migrate the PXA serial driver to be configured via Kconfig.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
8 years agoarmv8: fsl-layerscape: Support loading 32-bit OS with PSCI enabled
Alison Wang [Thu, 10 Nov 2016 02:49:05 +0000 (10:49 +0800)]
armv8: fsl-layerscape: Support loading 32-bit OS with PSCI enabled

As PSCI and secure monitor firmware framework are enabled, this patch is
to support loading 32-bit OS in such case. The default target exception
level returned to U-Boot is EL2, so the corresponding work to switch to
AArch32 EL2 and jump to 32-bit OS are done in U-Boot and secure firmware
together.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape: SMP support for loading 32-bit OS
Alison Wang [Thu, 10 Nov 2016 02:49:04 +0000 (10:49 +0800)]
armv8: fsl-layerscape: SMP support for loading 32-bit OS

Spin-table method is used for secondary cores to load 32-bit OS. The
architecture information will be got through checking FIT image and
saved in the os_arch element of spin-table, then the secondary cores
will check os_arch and jump to 32-bit OS or 64-bit OS automatically.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: Support loading 32-bit OS in AArch32 execution state
Alison Wang [Thu, 10 Nov 2016 02:49:03 +0000 (10:49 +0800)]
armv8: Support loading 32-bit OS in AArch32 execution state

To support loading a 32-bit OS, the execution state will change from
AArch64 to AArch32 when jumping to kernel.

The architecture information will be got through checking FIT image,
then U-Boot will load 32-bit OS or 64-bit OS automatically.

Signed-off-by: Ebony Zhu <ebony.zhu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarm: exynos7420: remove custome low level init function
Thomas Abraham [Wed, 16 Nov 2016 13:19:16 +0000 (18:49 +0530)]
arm: exynos7420: remove custome low level init function

Remove the custom low-level initialization function and reuse the
default low-level initialization function. But this requires the
ARMV8_MULTIENTRY config option to be enabled for Exynos7420.

On Exynos7420, the boot CPU belongs to the second cluster and so
with ARMV8_MULTIENTRY config option enabled, the 'branch_if_master'
macro fails to detect the CPU as boot CPU. As a temporary workaround
the CPU_RELEASE_ADDR is set to point to '_main'.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8/fsl-lsch3: Update code to release secondary cores
Priyanka Jain [Thu, 17 Nov 2016 06:59:56 +0000 (12:29 +0530)]
armv8/fsl-lsch3: Update code to release secondary cores

NXP ARMv8 SoC LS2080A release all secondary cores in one-go.
But other new SoCs like LS2088A, LS1088A release secondary
cores one by one.

Update code to release secondary cores based on SoC SVR
Add code to release cores one by one for non LS2080A SoCs

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[YS: remove "inline" from declaration of initiator_type]
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape: Add NXP LS2088A SoC support
Priyanka Jain [Thu, 17 Nov 2016 06:59:55 +0000 (12:29 +0530)]
armv8: fsl-layerscape: Add NXP LS2088A SoC support

The QorIQ LS2088A SoC is built on layerscape architecture.

It is similar to LS2080A SoC with some differences like
1)Timer controller offset is different
2)It has A72 cores
3)It supports TZASC module

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape : Check SVR for initializing TZASC
Priyanka Jain [Thu, 17 Nov 2016 06:59:54 +0000 (12:29 +0530)]
armv8: fsl-layerscape : Check SVR for initializing TZASC

LS2080 SoC and its personalities does not support TZASC
But other new SoCs like LS2088A, LS1088A supports TZASC

Hence, skip initializing TZASC for Ls2080A based on SVR

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape: Update TZASC registers type
Priyanka Jain [Thu, 17 Nov 2016 06:59:53 +0000 (12:29 +0530)]
armv8: fsl-layerscape: Update TZASC registers type

TZASC registers like TZASC_GATE_KEEPER, TZASC_REGION_ATTRIBUTES
are 32-bit regsiters.
So while doing register load-store operations, 32-bit intermediate
register, w0 should be used.
Update x0 register to w0 register type.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: lsch3: Use SVR based timer base address detection
Priyanka Jain [Thu, 17 Nov 2016 06:59:52 +0000 (12:29 +0530)]
armv8: lsch3: Use SVR based timer base address detection

Timer controller base address has been changed from
LS2080A SoC (and its personalities) to new SoCs like
LS2088A, LS1088A.

Use SVR based timer base address detection to avoid compile time #ifdef.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: lsch3: Add generic get_svr() in assembly
Priyanka Jain [Thu, 17 Nov 2016 06:59:51 +0000 (12:29 +0530)]
armv8: lsch3: Add generic get_svr() in assembly

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoMAINTAINERS: SUNXI: Update maintainership
Jagan Teki [Tue, 22 Nov 2016 11:44:06 +0000 (17:14 +0530)]
MAINTAINERS: SUNXI: Update maintainership

Add Jagan and Maxime as Maintainers for SUNXI

Signed-off-by: Jagan Teki <jagan@openedev.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Tue, 22 Nov 2016 12:57:23 +0000 (07:57 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

8 years agosf: Add support for MX66U51235F, MX66L1G45G, MT25QU02G, MT25QL02G
Radu Bacrau [Tue, 22 Nov 2016 00:27:19 +0000 (18:27 -0600)]
sf: Add support for MX66U51235F, MX66L1G45G, MT25QU02G, MT25QL02G

This commit adds support for the Macronix MX66U51235F,
MX66L1G45G and Micron MT25QU02G, MT25QL02G flash parts.

Signed-off-by: Radu Bacrau <dumitru.bacrau@intel.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Radu Bacrau <radu.bacrau@gmail.com>
[Update proper commit header and 80-line cut on body]
Reviewed-by: Jagan Teki <jagan@openedev.com>
8 years agoam57xx: Remove unused variable warnings
Tom Rini [Mon, 21 Nov 2016 19:07:58 +0000 (14:07 -0500)]
am57xx: Remove unused variable warnings

Starting with the changes to fix USB host on am57xx/am43xx we stopped
using usb_otg_ss1/related stuff and but we hadn't been enabling the
relevant options to cause the warnings until just recently.

Fixes: 55efadde7ede (ARM: AM57xx: AM43xx: Fix USB host)
Fixes: a48d687c575f (configs: am57xx: Enable download gadget)
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agofastboot: simplify the Kconfig logic
Yann E. MORIN [Sun, 13 Nov 2016 21:26:13 +0000 (22:26 +0100)]
fastboot: simplify the Kconfig logic

Currently, the fastboot item in menuconfig is a comment followed by a
boolean option withan empty prompt, followed by a menu:

        *** FASTBOOT ***
    [*]
          Fastboot support  --->

This is not "nice-looking" at all...

Change the logic to make the boolean option a "menuconfig" rather than a
mere "config", so that all dependent options gets groupped under a menu.
The layout is now:

        *** FASTBOOT ***
    [*] Fastboot support  --->

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agoARM: OMAP3_LOGIC: Update MTD Partition Table
Adam Ford [Sun, 13 Nov 2016 04:02:37 +0000 (22:02 -0600)]
ARM: OMAP3_LOGIC: Update MTD Partition Table

The previous partition table did not support a separate device tree
and the kernel size was limited to 4MB.  This update shows the
location of the device tree (labeled as spl-os) for those who
want to use Falcon Mode or use U-Boot to store the Flattened
Device Tree (FDT) to NAND without appending it to the kernel.

This also grows the kernel to 6MB since 4MB was becomming tight

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoARM: OMAP3_LOGIC: Remove FIT Support
Adam Ford [Sun, 13 Nov 2016 03:53:31 +0000 (21:53 -0600)]
ARM: OMAP3_LOGIC: Remove FIT Support

Commit ("2cd1ff84037a: OMAP3_LOGIC: Setup defconfig to enable
SPL and NAND booting") accidentally enabled FIT support.

This patch removes the FIT support.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoARM: OMAP3_LOGIC: Fix SPL Memory Map for Falcon Mode
Adam Ford [Sun, 13 Nov 2016 03:43:37 +0000 (21:43 -0600)]
ARM: OMAP3_LOGIC: Fix SPL Memory Map for Falcon Mode

The memory map defined in commit ("49c7303f0e52: OMAP3: Enable SPL
on omap3_logic) was used by a copy-paste of another board without
fully understanding how the map works in Falcon mode.  This patch
undoes the customization and uses the default SPL Memory Map
for OMAP3.

When building the uImage, set LOADADDR=0x82000000 and Falcon
mode should properly load.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agorpi: passthrough of the firmware provided FDT blob
Cédric Schieli [Fri, 11 Nov 2016 10:59:07 +0000 (11:59 +0100)]
rpi: passthrough of the firmware provided FDT blob

Raspberry firmware used to pass a FDT blob at a fixed address (0x100),
but this is not true anymore. The address now depends on both the
memory size and the blob size [1].

If one wants to passthrough this FDT blob to the kernel, the most
reliable way is to save its address from the r2/x0 register in the
U-Boot entry point and expose it in a environment variable for
further processing.

This patch just does this:
- save the provided address in the global variable fw_dtb_pointer
- expose it in ${fdt_addr} if it points to a a valid FDT blob

There are many different ways to use it. One can, for example, use
the following script which will extract from the tree the command
line built by the firmware, then hand over the blob to a previously
loaded kernel:

fdt addr ${fdt_addr}
fdt get value bootargs /chosen bootargs
bootz ${kernel_addr_r} - ${fdt_addr}

Alternatively, users relying on sysboot/pxe can simply omit any FDT
statement in their extlinux.conf file, U-Boot will automagically pick
${fdt_addr} and pass it to the kernel.

[1] https://www.raspberrypi.org/forums//viewtopic.php?f=107&t=134018

Signed-off-by: Cédric Schieli <cschieli@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agoarm: add save_boot_params for ARM1176
Cédric Schieli [Fri, 11 Nov 2016 10:59:06 +0000 (11:59 +0100)]
arm: add save_boot_params for ARM1176

Implement a hook to allow boards to save boot-time CPU state for later
use. When U-Boot is chain-loaded by another bootloader, CPU registers may
contain useful information such as system configuration information. This
feature mirrors the equivalent ARMv7 feature.

Signed-off-by: Cédric Schieli <cschieli@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agoimage: Combine image_sig_algo with image_sign_info
Andrew Duda [Tue, 8 Nov 2016 18:53:41 +0000 (18:53 +0000)]
image: Combine image_sig_algo with image_sign_info

Remove the need to explicitly add SHA/RSA pairings. Invalid SHA/RSA
pairings will still fail on verify operations when the hash length is
longer than the key length.

Follow the same naming scheme "checksum,crytpo" without explicitly
defining the string.

Indirectly adds support for "sha1,rsa4096" signing/verification.

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoimage: Add crypto_algo struct for RSA info
Andrew Duda [Tue, 8 Nov 2016 18:53:41 +0000 (18:53 +0000)]
image: Add crypto_algo struct for RSA info

Cut down on the repetition of algorithm information by defining separate
checksum and crypto structs. image_sig_algos are now simply pairs of
unique checksum and crypto algos.

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agorsa: Verify RSA padding programatically
Andrew Duda [Tue, 8 Nov 2016 18:53:40 +0000 (18:53 +0000)]
rsa: Verify RSA padding programatically

Padding verification was done against static SHA/RSA pair arrays which
take up a lot of static memory, are mostly 0xff, and cannot be reused
for additional SHA/RSA pairings. The padding can be easily computed
according to PKCS#1v2.1 as:

  EM = 0x00 || 0x01 || PS || 0x00 || T

where PS is (emLen - tLen - 3) octets of 0xff and T is DER encoding
of the hash.

Store DER prefix in checksum_algo and create rsa_verify_padding
function to handle verification of a message for any SHA/RSA pairing.

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agorsa: cosmetic: rename pad_len to key_len
Andrew Duda [Tue, 8 Nov 2016 18:53:39 +0000 (18:53 +0000)]
rsa: cosmetic: rename pad_len to key_len

checksum_algo's pad_len field isn't actually used to store the length of
the padding but the total length of the RSA key (msg_len + pad_len)

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoTI: Remove CONFIG_OMAP_COMMON in favor of CONFIG_ARCH_OMAP2
Tom Rini [Tue, 8 Nov 2016 02:34:55 +0000 (21:34 -0500)]
TI: Remove CONFIG_OMAP_COMMON in favor of CONFIG_ARCH_OMAP2

With the move to arch/arm/mach-omap2 there are now very few uses of
CONFIG_OMAP_COMMON and further they can all be replaced with
CONFIG_ARCH_OMAP2, so do so.

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoarm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms
Tom Rini [Tue, 8 Nov 2016 02:34:54 +0000 (21:34 -0500)]
arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms

This moves what was in arch/arm/cpu/armv7/omap-common in to
arch/arm/mach-omap2 and moves
arch/arm/cpu/armv7/{am33xx,omap3,omap4,omap5} in to arch/arm/mach-omap2
as subdirectories.  All refernces to the former locations are updated to
the current locations.  For the logic to decide what our outputs are,
consolidate the tests into a single config.mk rather than including 4.

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoarm: Introduce ARCH_OMAP2
Tom Rini [Tue, 8 Nov 2016 02:34:53 +0000 (21:34 -0500)]
arm: Introduce ARCH_OMAP2

To start consolidating various TI-related code, introduce the ARCH_OMAP2
symbol.  While we have removed omap2-specific boards some time ago,
matching up with the kernel naming here will help overall.

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agofs-test.sh: Update expected results
Stefan Brüns [Sun, 6 Nov 2016 00:32:15 +0000 (01:32 +0100)]
fs-test.sh: Update expected results

After the latest changes, ext4 no longer has any fails.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
8 years agoext4: Allow reading files with non-zero offset, clamp read len
Stefan Brüns [Sun, 6 Nov 2016 17:33:57 +0000 (18:33 +0100)]
ext4: Allow reading files with non-zero offset, clamp read len

Support was already implemented, but not hooked up. This fixes several
fails in the test cases.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
8 years agoext4: Fix handling of sparse files
Stefan Brüns [Sat, 5 Nov 2016 21:17:14 +0000 (22:17 +0100)]
ext4: Fix handling of sparse files

A sparse file may have regions not mapped by any extents, at the start
or at the end of the file, or anywhere between, thus not finding a
matching extent region is never an error.

Found by python filesystem tests.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
8 years agotest/py: expose config and log as session scoped fixture
Stefan Brüns [Sat, 5 Nov 2016 16:45:32 +0000 (17:45 +0100)]
test/py: expose config and log as session scoped fixture

If a test uses a fixture which is expensive to setup, the fixture can
possibly created with session or module scope. As u_boot_console has
function scope, it can not be used in this case.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
8 years agogpio: dwapb: Add support for port B
Phil Edworthy [Thu, 3 Nov 2016 11:05:12 +0000 (11:05 +0000)]
gpio: dwapb: Add support for port B

The IP supports two ports, A and B, each providing up to 32 gpios.
The driver already creates a 2nd gpio bank by reading the 2nd node
from DT, so this is quite a simple change to support the 2nd bank.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoarm: dra7xx: Unify Android partition table
Semen Protsenko [Mon, 31 Oct 2016 17:53:46 +0000 (19:53 +0200)]
arm: dra7xx: Unify Android partition table

Make Android partition table the same as for AM57x EVM.

  1. Make "bootloader" partition start from 0x300 sectors offset, so
     DRA7 is bootable in Android mode (see
     CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR option).
  2. Increase "bootloader" partition size, because size of u-boot.img is
     about 632 KiB (when building DT defconfig, with FIT image enabled).
  3. Specify "reserved" partition explicitly, rather than specifying
     "efs" partition start. Reserved area will be used to store U-Boot
     environment on eMMC. It's convenient to have it exposed explicitly
     so we can read/write U-Boot environment.
  4. Keep all Android partitions locations intact, by reducing
     "reserved" partition size. CONFIG_ENV_SIZE is considered.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
8 years agoarm: am57xx: Enable 8-bit eMMC access
Semen Protsenko [Mon, 31 Oct 2016 17:53:42 +0000 (19:53 +0200)]
arm: am57xx: Enable 8-bit eMMC access

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
8 years agoarm: am57xx: Define Android partition table
Semen Protsenko [Mon, 31 Oct 2016 17:53:38 +0000 (19:53 +0200)]
arm: am57xx: Define Android partition table

"fastboot oem format" command reuses "gpt write" command, which in turn
requires correct partitions defined in $partitions variable. This patch
adds such definition of Android partitions for DRA7XX EVM board.

By default $partitions variable contains Linux partition table. In order
to prepare Android environment one can run next commands from U-Boot
shell:

    => env set partitions $partitions_android
    => env save

After those operations one can go to fastboot mode and perform
"fastboot oem format" to create Android partition table.

While at it, enable CONFIG_RANDOM_UUID to spare user from providing
UUIDs for each partition manually.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
8 years agoomap3_beagle: use config_distro_bootcmd
Guillaume GARDET [Tue, 25 Oct 2016 16:50:32 +0000 (18:50 +0200)]
omap3_beagle: use config_distro_bootcmd

Add support for distro_bootcmd on MMC and fall back to prior
behavior if distro_bootcmd fails.

Tested on Beagleboad xM to boot GRUB2 (and then Linux kernel) in EFI mode
from MMC.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoconfigs: am57xx: Enable fastboot
Semen Protsenko [Mon, 24 Oct 2016 15:41:13 +0000 (18:41 +0300)]
configs: am57xx: Enable fastboot

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoconfigs: am57xx: Enable download gadget
Semen Protsenko [Mon, 24 Oct 2016 15:41:12 +0000 (18:41 +0300)]
configs: am57xx: Enable download gadget

Enable USB download gadget (needed for fastboot support) and all
dependencies.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoti_omap5_common: Respect USB controller number in fastboot
Semen Protsenko [Mon, 24 Oct 2016 15:41:11 +0000 (18:41 +0300)]
ti_omap5_common: Respect USB controller number in fastboot

On "fastboot reboot-bootloader" we check "dofastboot" variable and do
"fastboot 0" command in U-Boot if it's 1. But there are boards which have
USB controller number other than 0, so it should be respected when
performing "fastboot" command.

This patch reuses CONFIG_FASTBOOT_USB_DEV option toprovide correct USB
controller number to "fastboot" command.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agofastboot: Add CONFIG_FASTBOOT_USB_DEV option
Semen Protsenko [Mon, 24 Oct 2016 15:41:10 +0000 (18:41 +0300)]
fastboot: Add CONFIG_FASTBOOT_USB_DEV option

Some boards (like AM57x EVM) has USB OTG controller other than 0. So in
order to use correct controller number in compiled environment we should
define CONFIG_FASTBOOT_USB_DEV option.

For example, when doing "fastboot reboot-bootloader" we want to enter
fastboot mode automatically. But to do so we need to provide controller
number to "fastboot" command. If this procedure is defined in some config
which is common to bunch of boards, and boards have different USB
controller numbers, we can't just hardcode "fastboot 0" in the
environment. We need to use configurable option, which this patch adds.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoboard: ti: amx3xx: Remove multiple EEPROM reads
Lokesh Vutla [Fri, 14 Oct 2016 05:05:25 +0000 (10:35 +0530)]
board: ti: amx3xx: Remove multiple EEPROM reads

Detect the board very early and avoid reading eeprom multiple times.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoARM: AMx3xx: Centralize early clock initialization
Lokesh Vutla [Fri, 14 Oct 2016 05:05:24 +0000 (10:35 +0530)]
ARM: AMx3xx: Centralize early clock initialization

This is similar to Commit 93e6253d11030 ("ARM: OMAP4/5: Centralize
early clock initialization") that was done for OMAP4+, reflecting the same
for AM33xx and AM43xx SoCs to centralize clock initialization.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Add setup_early_clocks that calls setup_clocks_for_console for
        ti81xx]
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoarmv8/fsl-layerscape: Update CONFIG_LS2080A to CONFIG_FSL_LSCH3
Shengzhou Liu [Fri, 11 Nov 2016 10:11:05 +0000 (18:11 +0800)]
armv8/fsl-layerscape: Update CONFIG_LS2080A to CONFIG_FSL_LSCH3

Update CONFIG_LS2080A to CONFIG_FSL_LSCH3 to make those workaround
implementing of erratum reusable for more SoCs.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape: Add README for deploying QSPI image
Yuan Yao [Wed, 9 Nov 2016 03:50:46 +0000 (11:50 +0800)]
armv8: fsl-layerscape: Add README for deploying QSPI image

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
[YS: Reviese commit subject]
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarm: ls1021a: improve the core frequency to 1.2GHZ
Yuan Yao [Wed, 9 Nov 2016 03:19:54 +0000 (11:19 +0800)]
arm: ls1021a: improve the core frequency to 1.2GHZ

Change core clock to 1.2GHz in the configurations for SD and NAND boot.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls2080aqds: fix SGMII repeater settings
Shaohui Xie [Mon, 17 Oct 2016 08:20:48 +0000 (16:20 +0800)]
armv8: ls2080aqds: fix SGMII repeater settings

The current value to check whether the PHY was configured has dependency
on MC, it expects MC to start PCS AN, this is not true during boot up,
so it should be changed to remove the dependency.

The PHY's register space should be restore to default after accessing
extended space.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agofsl: serdes: fix a deadloop issue for P4080
Hou Zhiqiang [Mon, 31 Oct 2016 02:59:16 +0000 (10:59 +0800)]
fsl: serdes: fix a deadloop issue for P4080

This deadloop is introduced by commit:
71fe222 fsl: serdes: ensure accessing the initialized maps of serdes protocol

deadloop detail:
cpu_init_r => fsl_serdes_init => p4080_erratum_serdes_a005 =>
is_serdes_configured => fsl_serdes_init

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agopowerpc: mpc512x: Add support for get_svr() for mpc512x devices
Sriram Dash [Fri, 14 Oct 2016 06:33:50 +0000 (12:03 +0530)]
powerpc: mpc512x: Add support for get_svr() for mpc512x devices

Defines get_svr() for mpc512x devices

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodriver: net: ldpaa_eth: Fix missing bracket issue
Priyanka Jain [Thu, 3 Nov 2016 12:35:09 +0000 (18:05 +0530)]
driver: net: ldpaa_eth: Fix missing bracket issue

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls2080a: Update serdes protocol support
Priyanka Jain [Thu, 3 Nov 2016 12:20:51 +0000 (17:50 +0530)]
armv8: ls2080a: Update serdes protocol support

Add these serdes protocols
Serdes1: 0x39, 0x4B, 0x4C, 0x4D
Serdes2: 0x47, 0x57

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls1046aqds: add lpuart support
Shaohui Xie [Fri, 28 Oct 2016 06:24:02 +0000 (14:24 +0800)]
armv8: ls1046aqds: add lpuart support

LPUART0 is used by default, and it's using platform clock.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agolpuart: add a get_lpuart_clk function
Shaohui Xie [Fri, 28 Oct 2016 06:23:30 +0000 (14:23 +0800)]
lpuart: add a get_lpuart_clk function

It's not always true that LPUART clock is CONFIG_SYS_CLK_FREQ. This
patch provides a weak function get_lpuart_clk(), so that the clock
can be ovreridden on a specific board which uses different clock
for LPUART.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
[YS: Reformat commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv7: Add support of ls1021a-iot board
Feng Li [Thu, 3 Nov 2016 06:15:17 +0000 (14:15 +0800)]
armv7: Add support of ls1021a-iot board

The patch adds support for Freescale ls1021a-iot board.

Signed-off-by: Feng Li <feng.li_2@nxp.com>
[YS: rewrite commit message, fix whitespace in Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoconfigs: ls2080ardb: Enable DSPI flash support
Yuan Yao [Tue, 11 Oct 2016 04:13:40 +0000 (12:13 +0800)]
configs: ls2080ardb: Enable DSPI flash support

There is the stmicro DSPI flash on LS12080ARDB.
Enable DSPI flash related configure options.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8:ls1012a: Update bootargs for fast-boot
Pratiyush Srivastava [Mon, 10 Oct 2016 13:15:15 +0000 (18:45 +0530)]
armv8:ls1012a: Update bootargs for fast-boot

Add optimization parameters like "quiet" in bootargs to reduce the system
boot time

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Harninder Rai <harninder.rai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoARM: AMx3xx: Allow arch specific code to use early DM
Lokesh Vutla [Fri, 14 Oct 2016 05:05:23 +0000 (10:35 +0530)]
ARM: AMx3xx: Allow arch specific code to use early DM

Early system initialization is being done before initf_dm is being called
in U-Boot. Then system will fail to boot if any of the DM enabled driver
is being called in this system initialization code. So, rearrange the
code a bit so that DM enabled drivers can be called during early system
initialization. This is inspired by commit e850ed82bce8 ("ARM: OMAP4+: Allow
arch specific code to use early DM")

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agodrivers: SPI: sunxi SPL: fix warning
Andre Przywara [Sun, 20 Nov 2016 14:56:55 +0000 (14:56 +0000)]
drivers: SPI: sunxi SPL: fix warning

Somehow an int returning function without a return statement sneaked
in, fix it.
Also fix some whitespace damage on the way.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
8 years agosf: Fix s25fs512s id table
Jagan Teki [Wed, 16 Nov 2016 17:57:23 +0000 (23:27 +0530)]
sf: Fix s25fs512s id table

s25fs512s and s25fl512s_256k have common id information
till 5 bytes and 6th byte have different family id
like FS and FL-S as 0x81 and 0x80.

Reported-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
8 years agosf: dataflash: Minor cleanups
Jagan Teki [Sun, 30 Oct 2016 17:46:30 +0000 (23:16 +0530)]
sf: dataflash: Minor cleanups

- fix single line comments
- remove unneeded spaces
- ascending order of include files
- rename SPI DATAFLASH to dataflash
- rename SPI DataFlash to dataflash
- return NULL replaced with error code

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
8 years agosf: dataflash: Fix add_dataflash return logic
Jagan Teki [Sun, 30 Oct 2016 17:46:29 +0000 (23:16 +0530)]
sf: dataflash: Fix add_dataflash return logic

This patch fixed the add_dataflash return logic,
so-that it can handle both jedec and older chips
same as Linux.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
8 years agosf: dataflash: Move flash id detection into jedec_probe
Jagan Teki [Sun, 30 Oct 2016 17:46:28 +0000 (23:16 +0530)]
sf: dataflash: Move flash id detection into jedec_probe

Flash id detection should be the first step to enumerate
the connected flash on the board, once ie done checking
with respective id codes locally in the driver all this
should be part of jedec_probe instead of id detection and
validated through flash_info{} table separatly.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
8 years agosf: dataflash: Remove unneeded spi data
Jagan Teki [Sun, 30 Oct 2016 17:46:27 +0000 (23:16 +0530)]
sf: dataflash: Remove unneeded spi data

dataflash doesn't require options, memory_map from spi.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
8 years agospi: Remove dual flash options/flags
Jagan Teki [Sun, 30 Oct 2016 17:46:26 +0000 (23:16 +0530)]
spi: Remove dual flash options/flags

Dual flash code in spi are usually take the spi controller
to work with dual connected flash devices. Usually these
dual connection operation's are referred to flash controller
protocol rather with spi controller protocol, these are still
present in flash side for the usage of spi-nor controllers.

So, this patch remove the dual_flash options or flags in sf
which are triggered from spi controller side.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
8 years agospl: Remove CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS
Semen Protsenko [Wed, 16 Nov 2016 17:19:06 +0000 (19:19 +0200)]
spl: Remove CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS

This option isn't used for anything, so get rid of it.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
8 years agospl: Convert CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to Kconfig
Semen Protsenko [Wed, 16 Nov 2016 17:19:05 +0000 (19:19 +0200)]
spl: Convert CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to Kconfig

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
[trini: Fix sniper and kc1 migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agosf: Rename few local functions
Jagan Teki [Sun, 30 Oct 2016 17:46:25 +0000 (23:16 +0530)]
sf: Rename few local functions

spi_flash_write_bar-> write_bar
spi_flash_write_bar -> read_bar
spi_flash_cmd_wait_ready -> spi_flash_wait_till_ready

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
8 years agosf: ids: Use small letter in ext_jedec
Jagan Teki [Wed, 16 Nov 2016 17:56:19 +0000 (23:26 +0530)]
sf: ids: Use small letter in ext_jedec

Use small 'd' in s25s512s ext_jedec

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
8 years agosf: ids: Use small letter's with flash name
Jagan Teki [Wed, 16 Nov 2016 17:55:10 +0000 (23:25 +0530)]
sf: ids: Use small letter's with flash name

For readability use small letter's with flash name.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
8 years agosf: Rename sf_params.c to spi_flash_ids.c
Jagan Teki [Sun, 30 Oct 2016 17:46:22 +0000 (23:16 +0530)]
sf: Rename sf_params.c to spi_flash_ids.c

Now the flash params table as renamed to spi_flash_ids structure,
so rename the sf_params.c to spi_flash_ids.c and remove the legacy.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
8 years agosf: Remove non-meaningful comments
Jagan Teki [Sun, 30 Oct 2016 17:46:21 +0000 (23:16 +0530)]
sf: Remove non-meaningful comments

Remove unneeded/non-meaningful commit message on
params and flash.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
8 years agosf: Remove spansion_s25fss_disable_4KB_erase
Jagan Teki [Tue, 15 Nov 2016 17:27:42 +0000 (22:57 +0530)]
sf: Remove spansion_s25fss_disable_4KB_erase

In spansion S25FS-S family the physical sectors are grouped as
normal and parameter sectors. Parameter sectors are 4kB in size
with 8 set located at the bottom or top address of a device.
Normal sectors are similar to other flash family with sizes of
64kB or 32 kB.

To erase whole flash using sector erase(D8h or DCh) won't effect
the parameter sectors, so in order to erase these we must use 4K
sector erase commands (20h or 21h) separately.

So better to erase the whole flash using 4K sector erase instead
of detecting these family parts again and do two different erase
operations.

For this:
- Removed spansion_s25fss_disable_4KB_erase code
- Add SECT_4K for S25FS512S chip

Cc: Yunhui Cui <yunhui.cui@nxp.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
8 years agosf: params: Add S25FS256S_64K spi flash support
Jagan Teki [Sun, 30 Oct 2016 17:46:19 +0000 (23:16 +0530)]
sf: params: Add S25FS256S_64K spi flash support

Add Spansion S25FS256S_64K spi flash to the list of spi_flash_ids.

In spansion S25FS-S family the physical sectors are grouped as
normal and parameter sectors. Parameter sectors are 4kB in size
with 8 set located at the bottom or top address of a device.
Normal sectors are similar to other flash family with sizes of
64kB or 32 kB.

To erase whole flash using sector erase(D8h or DCh) won't effect
the parameter sectors, so in order to erase these we must use 4K
sector erase commands (20h or 21h) separately.

So better to erase the whole flash using 4K sector erase instead
of detecting these family parts again and do two different erase
operations.

Cc: Yunhui Cui <yunhui.cui@nxp.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
8 years agosf: Add INFO6 flash_info macro
Jagan Teki [Tue, 15 Nov 2016 07:27:52 +0000 (12:57 +0530)]
sf: Add INFO6 flash_info macro

INFO6 is for tabulating 6 byte flash parts, Ex: S25FS256S_64K

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
8 years agosf: Increase max id length by 1 byte
Jagan Teki [Sun, 30 Oct 2016 17:46:17 +0000 (23:16 +0530)]
sf: Increase max id length by 1 byte

So, now SPI_FLASH_ID_MAX_LEN is 6 bytes useful for
few spansion flash families S25FS-S

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
8 years agosf: Add SPI_FLASH_MAX_ID_LEN
Jagan Teki [Sun, 30 Oct 2016 17:46:16 +0000 (23:16 +0530)]
sf: Add SPI_FLASH_MAX_ID_LEN

Add id length of 5 bytes numerical value to macro.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
8 years agosf: nr_sectors -> n_sectors
Jagan Teki [Sun, 30 Oct 2016 17:46:15 +0000 (23:16 +0530)]
sf: nr_sectors -> n_sectors

Rename nr_sectors as n_sectors to sync with Linux.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
8 years agosf: Cleanup spi_flash_info{}
Jagan Teki [Sun, 30 Oct 2016 17:46:13 +0000 (23:16 +0530)]
sf: Cleanup spi_flash_info{}

- Proper tabs spaces
- Removed unnecessary
- Add comments in spi_flash_info members
- Add comments for spi_flash_info.flags

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
8 years agosf: sandbox: Use JEDEC_MFR|ID in id exctract
Jagan Teki [Sun, 30 Oct 2016 17:46:12 +0000 (23:16 +0530)]
sf: sandbox: Use JEDEC_MFR|ID in id exctract

Instead of extracting id's separately better
to use JEDEC_MFR|ID for code simplicity.

Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
8 years agosf: Simplify lock ops detection code
Jagan Teki [Sun, 30 Oct 2016 17:46:11 +0000 (23:16 +0530)]
sf: Simplify lock ops detection code

Simplify the flash_lock ops detection code and added
meaningful comment.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
8 years agosf: Adopt flash table INFO macro from Linux
Jagan Teki [Sun, 30 Oct 2016 17:46:10 +0000 (23:16 +0530)]
sf: Adopt flash table INFO macro from Linux

INFO macro make flash table entries more adjustable like
adding new flash_info attributes, update ID length bytes
and so on and more over it will sync to Linux way of defining
flash_info attributes.

- Add JEDEC_ID
- Add JEDEC_EXT macro
- Add JEDEC_MFR
- spi_flash_params => spi_flash_info
- params => info

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
8 years agospi: kirkwood_spi: implement mvebu_spi_set_mode()
Chris Packham [Thu, 27 Oct 2016 08:16:05 +0000 (21:16 +1300)]
spi: kirkwood_spi: implement mvebu_spi_set_mode()

Set the appropriate bits in the interface config register based
on the SPI_ mode flags.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
8 years agoMerge branch 'master' of http://git.denx.de/u-boot-mmc
Tom Rini [Thu, 17 Nov 2016 16:46:56 +0000 (11:46 -0500)]
Merge branch 'master' of http://git.denx.de/u-boot-mmc

8 years agoMerge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Tom Rini [Thu, 17 Nov 2016 16:46:45 +0000 (11:46 -0500)]
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2016-11-17

Highlights this time around:

  - x86 efi_loader support
  - hello world efi test case
  - network device name is now representative
  - terminal output reports modes correctly
  - fix psci reset for ls1043/ls1046
  - fix efi_add_runtime_mmio definition for x86
  - efi_loader support for ls2080

8 years agols2080ardb: Convert to distro boot
Alexander Graf [Thu, 17 Nov 2016 00:03:02 +0000 (01:03 +0100)]
ls2080ardb: Convert to distro boot

Most new systems in U-Boot these days make use of the generic "distro"
framework which allows a user to have U-Boot scan for a bootable OS
on all available media types.

This patch extends the LS2080ARDB board to use that framework if the
hard coded NOR flash location does not contain a bootable image.

Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoarmv8: fsl-layerscape: Add support for efi_loader RTS reset
Alexander Graf [Thu, 17 Nov 2016 00:03:01 +0000 (01:03 +0100)]
armv8: fsl-layerscape: Add support for efi_loader RTS reset

When implementing efi loader support, we can expose runtime services
for payloads. One such service is CPU reset.

This patch implements RTS CPU reset support for layerscape systems.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls2080a: Declare spin tables as reserved for efi loader
Alexander Graf [Thu, 17 Nov 2016 00:03:00 +0000 (01:03 +0100)]
armv8: ls2080a: Declare spin tables as reserved for efi loader

The efi loader code has its own memory map, so it needs to be aware where
the spin tables are located, to ensure that no code writes into those
regions.

Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agols2080ardb: Reserve DP-DDR RAM
Alexander Graf [Thu, 17 Nov 2016 00:02:59 +0000 (01:02 +0100)]
ls2080ardb: Reserve DP-DDR RAM

The DP-DDR shouldn't be exposed as conventional memory to an OS, so let's
rather claim it's a reserved region in the EFI memory map

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agols2080: Exit dpaa only right before exiting U-Boot
Alexander Graf [Thu, 17 Nov 2016 00:02:57 +0000 (01:02 +0100)]
ls2080: Exit dpaa only right before exiting U-Boot

On ls2080 we have a separate network fabric component which we need to
shut down before we enter Linux (or any other OS). Along with that also
comes configuration of the fabric using a description file.

Today we always stop and configure the fabric in the boot script and
(again) exit it on device tree generation. This works ok for the normal
booti case, but with bootefi the payload we're running may still want to
access the network.

So let's add a new fsl_mc command that defers configuration and stopping
the hardware to when we actually exit U-Boot, so that we can still use
the fabric from an EFI payload.

For existing boot scripts, nothing should change with this patch.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
[agraf: Fix x86 build]

8 years agoefi_loader: Fix efi_add_runtime_mmio definition
Alexander Graf [Thu, 17 Nov 2016 00:02:56 +0000 (01:02 +0100)]
efi_loader: Fix efi_add_runtime_mmio definition

The efi_add_runtime_mmio prototype for disabled CONFIG_EFI_LOADER
was different from the enabled one. Sync them.

Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi_loader: Disable PSCI reset for ls1043 and ls1046
Alexander Graf [Thu, 17 Nov 2016 00:02:55 +0000 (01:02 +0100)]
efi_loader: Disable PSCI reset for ls1043 and ls1046

The NXP ls1043 and ls1046 systems do not (yet) have PSCI enablement
for reset. Don't enable generic PSCI reset code on them.

Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi_loader: AArch64: Run EFI payloads in EL2 if U-Boot runs in EL3
Alexander Graf [Thu, 17 Nov 2016 00:02:58 +0000 (01:02 +0100)]
efi_loader: AArch64: Run EFI payloads in EL2 if U-Boot runs in EL3

Some boards decided not to run ATF or other secure firmware in EL3, so
they instead run U-Boot there. The uEFI spec doesn't know what EL3 is
though - it only knows about EL2 and EL1. So if we see that we're running
in EL3, let's get into EL2 to make payloads happy.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>