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8 years agoARM: dts: dra72-evm: Add mode-gpios entry for mac node
Vignesh R [Tue, 2 Aug 2016 04:44:28 +0000 (10:14 +0530)]
ARM: dts: dra72-evm: Add mode-gpios entry for mac node

On DRA72 EVM, cpsw slave1 is muxed with VIN2A, hence switch to cpsw
slave0 for ethernet. This is controlled by pcf gpio line. Add
appropriate mode-gpios DT entry so that driver can select the required
slave.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
8 years agonet: cpsw: Add support to drive gpios for ethernet to be functional
Vignesh R [Tue, 2 Aug 2016 04:44:27 +0000 (10:14 +0530)]
net: cpsw: Add support to drive gpios for ethernet to be functional

On DRA72 EVM, cpsw slaves may be muxed with other modules. This
selection is controlled by a pcf gpio line. Add support for cpsw driver
to acquire mode-gpios and select the appropriate slave using gpio APIs.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
8 years agoARM: dts: dra7xx: Add u-boot specific property for PCF8575 nodes
Vignesh R [Tue, 2 Aug 2016 04:44:26 +0000 (10:14 +0530)]
ARM: dts: dra7xx: Add u-boot specific property for PCF8575 nodes

PCF8575 does not have any registers hence, offset field needs to be
ignored for i2c read/write. Therefore populate u-boot,i2c-offset-len
with 0 in PCF8575 DT nodes.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoARM: dra7xx_evm: Enable support for TI PCF8575
Vignesh R [Tue, 2 Aug 2016 04:44:25 +0000 (10:14 +0530)]
ARM: dra7xx_evm: Enable support for TI PCF8575

On DRA7, pcf chip present at address 0x21 on i2c1, is used to
switch between cpsw slave0 and slave1. Hence, enable PCF
driver for the same.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agogpio: Add driver for TI PCF8575 I2C GPIO expander
Vignesh R [Tue, 2 Aug 2016 04:44:24 +0000 (10:14 +0530)]
gpio: Add driver for TI PCF8575 I2C GPIO expander

TI's PCF8575 is a 16-bit I2C GPIO expander.The device features a
16-bit quasi-bidirectional I/O ports. Each quasi-bidirectional I/O can
be used as an input or output without the use of a data-direction
control signal. The I/Os should be high before being used as inputs.
Read the device documentation for more details[1].

This driver is based on pcf857x driver available in Linux v4.7 kernel.
It supports basic reading and writing of gpio pins.

[1] http://www.ti.com/lit/ds/symlink/pcf8575.pdf

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
8 years agospl_nor.c: Support devicetree sizes different from 16k
Mike Looijmans [Tue, 26 Jul 2016 05:34:07 +0000 (07:34 +0200)]
spl_nor.c: Support devicetree sizes different from 16k

The devicetrees for various platforms already exceed 16k. Add a define
CONFIG_SYS_FDT_SIZE to specify the FDT size, and set to 16k for the
two boards that define this CONFIG_SYS_FDT_BASE parameter. This
allows platforms with larger devicetree blobs to boot from NOR.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
8 years agospi: cadence_qspi_apb: Ensure baudrate doesn't exceed max value
Chin Liang See [Sun, 7 Aug 2016 14:50:40 +0000 (22:50 +0800)]
spi: cadence_qspi_apb: Ensure baudrate doesn't exceed max value

Ensuring the baudrate divisor value doesn't exceed the max value
in the calculation.It will be capped at max value to ensure the
correct value being written into the register.

Example of the existing bug is when calculated div = 16. After and
with the mask, the value written to register is actually 0 (register
field for baudrate divisor). With this fix, the value written is now
15 which is max value for baudrate divisor.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jteki@openedev.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
8 years agoARM: socfpga: use the default CONFIG_BOOTDELAY=2
Masahiro Yamada [Sun, 24 Jul 2016 16:38:53 +0000 (01:38 +0900)]
ARM: socfpga: use the default CONFIG_BOOTDELAY=2

This option controls how long it should be paused before entering
the auto-boot mode.  The default value from Kconfig should be fine
except socfpga_vining_fpga_defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoMerge git://git.denx.de/u-boot-rockchip
Tom Rini [Sat, 6 Aug 2016 15:38:14 +0000 (11:38 -0400)]
Merge git://git.denx.de/u-boot-rockchip

8 years agozynq_sdhci.c: Fix warning in arasan_sdhci_probe
Tom Rini [Fri, 5 Aug 2016 21:34:55 +0000 (17:34 -0400)]
zynq_sdhci.c: Fix warning in arasan_sdhci_probe

We no longer need to set 'caps' as it's not passed to sdhci_setup_cfg
anymore.

Fixes: 14bed52d276a ("mmc: sdhci: remove the unnecessary arguments for
sdhci_setup_cfg")
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-tegra
Tom Rini [Fri, 5 Aug 2016 18:09:15 +0000 (14:09 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-mmc
Tom Rini [Fri, 5 Aug 2016 13:15:55 +0000 (09:15 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc

8 years agoconfigs: Fix mmc rescan misuses
Karl Beldan [Tue, 2 Aug 2016 10:36:17 +0000 (10:36 +0000)]
configs: Fix mmc rescan misuses

This follows 9fd383724cf4 ("mmc: don't allow extra cmdline arguments"),
and affects omapl138_lcdk and omap3_evm_quick_mmc.

Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agomkimage: Fix argument parsing with signature comment
Karl Beldan [Tue, 2 Aug 2016 18:57:14 +0000 (18:57 +0000)]
mkimage: Fix argument parsing with signature comment

Inform getopt that '-c' requires a parameter.

Fixes: a02221f29deb ("mkimage: Convert to use getopt()")
Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agotest: Adjust run_command_list() to return a list of strings
Simon Glass [Sun, 31 Jul 2016 23:35:09 +0000 (17:35 -0600)]
test: Adjust run_command_list() to return a list of strings

Return one string for each command that was executed. This seems cleaner.

Suggested-by: Teddy Reed <teddy.reed@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agotest: Add a function to restart U-Boot
Simon Glass [Sun, 31 Jul 2016 23:35:08 +0000 (17:35 -0600)]
test: Add a function to restart U-Boot

Add a proper function for this rather than using internal functions. Use it
in the single call site.

Also, do a restart at the end of the vboot test to reset to the normal
device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Stephen Warren <swarren@nvidia.com>
8 years agotest: vboot: Put each test variant in its own section
Simon Glass [Sun, 31 Jul 2016 23:35:07 +0000 (17:35 -0600)]
test: vboot: Put each test variant in its own section

Use 'cons.log.section' feature to split up the test output. This makes it
easier to read.

Suggested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agotest: Rename sha to sha_algo and pass it around
Simon Glass [Sun, 31 Jul 2016 23:35:06 +0000 (17:35 -0600)]
test: Rename sha to sha_algo and pass it around

Rename this argument and pass it to each function that needs it, instead of
making it global.

Suggested-by: Stephen Warren <swarren@nvidia.com>
Suggested-by: Teddy Reed <teddy.reed@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agotest: Drop the cmd() function
Simon Glass [Sun, 31 Jul 2016 23:35:05 +0000 (17:35 -0600)]
test: Drop the cmd() function

Instead of this, use the existing run_and_log() function, enhanced to
support a command string as well as a list of arguments.

Suggested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agotest: Fix typos in comments
Simon Glass [Sun, 31 Jul 2016 23:35:04 +0000 (17:35 -0600)]
test: Fix typos in comments

Fix some typos in various files introduced with the vboot test conversion.

Reported-by: Teddy Reed <teddy.reed@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agotest: Check exit status in run_and_log_expect_exception()
Simon Glass [Sun, 31 Jul 2016 23:35:03 +0000 (17:35 -0600)]
test: Check exit status in run_and_log_expect_exception()

This check was missed. Add it and make the message more verbose.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
Fixes: 9e17b034 (test/py: Provide a way to check that a command fails)
8 years agotest: Fix typos and tidy up
Simon Glass [Sun, 31 Jul 2016 23:35:02 +0000 (17:35 -0600)]
test: Fix typos and tidy up

Fix review comments that were missed at the time. Also explain why we need
to regenerate the device tree for each test.

Reported-by: Teddy Reed <teddy.reed@gmail.com>
Suggested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: f6349c3c (test: Add a README)
8 years agoMakefile: Allow 'make tests' to run tests
Simon Glass [Sun, 31 Jul 2016 23:35:01 +0000 (17:35 -0600)]
Makefile: Allow 'make tests' to run tests

Add this shortcut for running tests. Unfortunately 'make test' cannot be
used as it is an existing directory.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Teddy Reed <teddy.reed@gmail.com>
8 years agoarmv8: mmu: Detect page table overflow in emergency pt creation
Alexander Graf [Sat, 30 Jul 2016 21:13:03 +0000 (23:13 +0200)]
armv8: mmu: Detect page table overflow in emergency pt creation

We create 2 sets of page tables: One for normal operation, one for
emergency (used while modifying the former).

Because the page tables grow dynamically, we have code that checks
for overflow. Unfortunately we didn't adjust the available space
variable while creating the emergency tables, so potentially someone
might run into an overflow there (not seen in real world yet though!).

Fix it by properly adjusting the size as well as the base offset in
emergency page table creation.

Reported-by: York Sun <york.sun@nxp.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agocmd: gpt: fix the wrong size parse for the last partition
Kever Yang [Fri, 29 Jul 2016 03:12:18 +0000 (11:12 +0800)]
cmd: gpt: fix the wrong size parse for the last partition

The calculation of "dev_desc->lba - 34  - 1 - offset" is not correct for
size '-', because both fist_usable_lba and last_usable_lba will remain
34 sectors.

We can simply use 0 for size '-' because the part_efi module will decode
the size and auto extend the size to maximum available size.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
8 years agoomap3: Drop omap3_evm_quick_* targets
Tom Rini [Thu, 28 Jul 2016 02:29:42 +0000 (22:29 -0400)]
omap3: Drop omap3_evm_quick_* targets

These config targets were added well before the Kconfig migration began
as a way to demonstrate how to make these platforms work with cut down
features.  At this point in time they no longer serve a good purpose so
remove them.

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agorockchip: remove log2 reimplementation from clock drivers
Heiko Stübner [Fri, 22 Jul 2016 21:51:06 +0000 (23:51 +0200)]
rockchip: remove log2 reimplementation from clock drivers

The already available ilog2 function does exactly the same in the common
case than the log2 function the current clock-driver reimplement.
So, simply move to that one.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoconfig: rk3399: enable dwmmc controller
Kever Yang [Thu, 4 Aug 2016 03:45:00 +0000 (11:45 +0800)]
config: rk3399: enable dwmmc controller

Enable the rockchip dwmmc driver for rk3399 and its evb.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agodts: rk3399: enable dwmmc for sdcard
Kever Yang [Thu, 4 Aug 2016 03:44:59 +0000 (11:44 +0800)]
dts: rk3399: enable dwmmc for sdcard

rk3399 sdcard is using dwmmc controller, enable it for sdcard.
SCLK_SDMMC is the clock for controller operation clock, move it
to the first place.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoclock: rk3399: add support for dwmmc 400K
Kever Yang [Thu, 4 Aug 2016 03:44:58 +0000 (11:44 +0800)]
clock: rk3399: add support for dwmmc 400K

MMC core will use 400KHz for card initialize first and then switch to
higher frequency like 50MHz, we need to support both 400KHz and about
50MHz for dwmmc controller.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoconfigs: rk3399: add gpt and fs support
Kever Yang [Thu, 4 Aug 2016 03:40:29 +0000 (11:40 +0800)]
configs: rk3399: add gpt and fs support

To compatible with distro boot, we need to add gpt and fs support,
including gpt table and vfat, ext2, ext4 support.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: add usb mass storage feature support for rk3288
Xu Ziyuan [Wed, 3 Aug 2016 03:55:06 +0000 (11:55 +0800)]
rockchip: add usb mass storage feature support for rk3288

Enable ums feature for rk3288 boards, so that we can mount the mmc
device to PC.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: add basic partitions support for rk3288
Xu Ziyuan [Wed, 3 Aug 2016 03:55:05 +0000 (11:55 +0800)]
rockchip: add basic partitions support for rk3288

For compatibility with distro boot, fastboot, and mount the mmc deivce
to PC via usb mass storage feature, GPT partitions are essential.

You should write the partitions to mmc device prior to use above
feature.

=> gpt write mmc 1 $partitions
GPT successfully written to block device!
success!

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: add support for rk3288 miniarm board
Xu Ziyuan [Mon, 1 Aug 2016 00:46:19 +0000 (08:46 +0800)]
rockchip: add support for rk3288 miniarm board

Miniarm is a rockchip rk3288 based development board, which has lots of
interface such as HDMI, USB, micro-SD card, Audio etc.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agomove: rockchip: move clock drivers into a subdirectory
Heiko Stübner [Fri, 29 Jul 2016 12:47:21 +0000 (14:47 +0200)]
move: rockchip: move clock drivers into a subdirectory

With the number of Rockchip clock drivers increasing, don't clutter up
the core drivers/clk directory with them and instead move them out of
the way into a separate subdirectory.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
Updated for rk3399:
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agork3399: add basic soc driver
Kever Yang [Fri, 29 Jul 2016 02:35:25 +0000 (10:35 +0800)]
rk3399: add basic soc driver

This patch add driver for:
- clock driver including set_rate for cpu, mmc, vop, I2C.
- sysreset driver
- grf syscon driver

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: rockchip, sdram-channel 0xff fix remaining dts
Sandy Patterson [Thu, 28 Jul 2016 13:49:01 +0000 (09:49 -0400)]
rockchip: rockchip, sdram-channel 0xff fix remaining dts

Add an extra byte so that this data is not byteswapped.

Signed-off-by: Sandy Patterson <apatterson@sightlogix.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: add fastboot support for rk3036 board
Xu Ziyuan [Thu, 28 Jul 2016 03:42:34 +0000 (11:42 +0800)]
rockchip: add fastboot support for rk3036 board

Enable fastboot feature on rk3036, please refer to doc/README.rockchip
for more detailed usage.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agommc: sdhci: fix the compiler warning when disable CONFIG_MMC_SDMA
Jaehoon Chung [Fri, 5 Aug 2016 05:13:36 +0000 (14:13 +0900)]
mmc: sdhci: fix the compiler warning when disable CONFIG_MMC_SDMA

When disabled CONFIG_MMC_SDMA, variable caps didn't use.
This patch fixes the compiler error for -Wunused-but-set-variable

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
8 years agoomap3, omap4: Enable USE_TINY_PRINTF for all
Tom Rini [Thu, 28 Jul 2016 02:29:41 +0000 (22:29 -0400)]
omap3, omap4: Enable USE_TINY_PRINTF for all

In the case of omap3 we have a number of platforms that are close to
exceeding SRAM limits, depending on compiler.  Move to USE_TINY_PRINTF
to give them more room.  OMAP4 will soon enough be in a similar place,
so enable that now.

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoomap3: Move to select SUPPORT_SPL for all
Tom Rini [Thu, 28 Jul 2016 02:29:40 +0000 (22:29 -0400)]
omap3: Move to select SUPPORT_SPL for all

In reality all omap3 platforms support SPL so move the select for this
up a level.

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agocmd/bdinfo: extract print_std_bdinfo
Max Filippov [Thu, 28 Jul 2016 00:57:24 +0000 (03:57 +0300)]
cmd/bdinfo: extract print_std_bdinfo

print_std_bdinfo outputs typical set of board information entries:
boot params location, memory and flash addresses and sizes, network
interfaces information and configured serial baud rate.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agocmd/bdinfo: extract print_baudrate
Max Filippov [Thu, 28 Jul 2016 00:57:23 +0000 (03:57 +0300)]
cmd/bdinfo: extract print_baudrate

print_baudrate outputs serial baud rate.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agocmd/bdinfo: extract print_eth_ip_addr
Max Filippov [Thu, 28 Jul 2016 00:57:22 +0000 (03:57 +0300)]
cmd/bdinfo: extract print_eth_ip_addr

print_eth_ip_addr outputs eth configurations for up to 6 interfaces and
configured IP address.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agocmd/bdinfo: extract print_bi_flash
Max Filippov [Thu, 28 Jul 2016 00:57:21 +0000 (03:57 +0300)]
cmd/bdinfo: extract print_bi_flash

print_bi_flash outputs flashstart, flashsize and flashoffset lines.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agocmd/bdinfo: extract print_bi_dram
Max Filippov [Thu, 28 Jul 2016 00:57:20 +0000 (03:57 +0300)]
cmd/bdinfo: extract print_bi_dram

print_bi_dram outputs start address and size for each DRAM bank.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agocmd/bdinfo: extract print_bi_mem
Max Filippov [Thu, 28 Jul 2016 00:57:19 +0000 (03:57 +0300)]
cmd/bdinfo: extract print_bi_mem

print_bi_mem outputs memstart and memsize lines.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agocmd/bdinfo: extract print_bi_boot_params
Max Filippov [Thu, 28 Jul 2016 00:57:18 +0000 (03:57 +0300)]
cmd/bdinfo: extract print_bi_boot_params

print_bi_boot_params outputs boot parameters structure location.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agotreewide: move CONFIG_PHYS_64BIT to Kconfig
Masahiro Yamada [Mon, 25 Jul 2016 10:56:03 +0000 (19:56 +0900)]
treewide: move CONFIG_PHYS_64BIT to Kconfig

We need to ensure that CONFIG_PHYS_64BIT is configured via Kconfig so
that it is always available to the build system.  Otherwise we can run
into cases where we have inconsistent sizes of certain attributes.

Ravi Babu reported offset mismatch of struct dwc3 across files since
commit 95ebc253e6d4 ("types.h: move and redefine resource_size_t").
Since the commit, resource_addr_t points to phys_addr_t, whose size
is dependent on CONFIG_PHYS_64BIT for ARM architecture.

I tried my best to use "select" where possible (for example, ARMv8
architecture) because I think this kind of option is generally user-
unconfigurable.  However, I see some of PowerPC boards have 36BIT
defconfigs as well as 32BIT ones.  I moved CONFIG_PHYS_64BIT to the
defconfigs for such boards.

CONFIG_36BIT is no longer referenced, so all of the defines were
removed from CONFIG_SYS_EXTRA_OPTIONS.

Fixes: 95ebc253e6d4 ("types.h: move and redefine resource_size_t")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Ravi Babu <ravibabu@ti.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agotools: moveconfig: support CONFIG_SYS_EXTRA_OPTIONS cleaning
Masahiro Yamada [Mon, 25 Jul 2016 10:15:29 +0000 (19:15 +0900)]
tools: moveconfig: support CONFIG_SYS_EXTRA_OPTIONS cleaning

We mostly move config options from board header files to Kconfig,
but sometimes config defines come from CONFIG_SYS_EXTRA_OPTIONS.

Historically, CONFIG_SYS_EXTRA_OPTIONS originates in boards.cfg,
which was used as a central database of configuration prior to the
Kconfig conversion.

Now, we want to migrate to primary entries in Kconfig rather than
option list in CONFIG_SYS_EXTRA_OPTIONS, so it should be helpful to
have the tool to cleanup CONFIG_SYS_EXTRA_OPTIONS automatically.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agotools: moveconfig: make getting all defconfigs into helper function
Masahiro Yamada [Mon, 25 Jul 2016 10:15:28 +0000 (19:15 +0900)]
tools: moveconfig: make getting all defconfigs into helper function

I want to reuse this routine in the next commit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agotools: moveconfig: fix cleanup of defines across multiple lines
Masahiro Yamada [Mon, 25 Jul 2016 10:15:27 +0000 (19:15 +0900)]
tools: moveconfig: fix cleanup of defines across multiple lines

Correct the clean-up of such defines that continue across multiple
lines, like follows:

  #define CONFIG_FOO "this continues to the next line " \
          "this line should be removed too" \
          "this line should be removed as well"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agotools: moveconfig: show diffs of cleaned headers in color
Masahiro Yamada [Mon, 25 Jul 2016 10:15:26 +0000 (19:15 +0900)]
tools: moveconfig: show diffs of cleaned headers in color

Show code diff in color if --color option is given.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agotools: moveconfig: show result of header cleaning in unified diff
Masahiro Yamada [Mon, 25 Jul 2016 10:15:25 +0000 (19:15 +0900)]
tools: moveconfig: show result of header cleaning in unified diff

The header cleanup feature of this tool now removes empty ifdef's,
successive blank lines as well as moved option defines.  So, we
want to see a little more context to check which lines were deleted.

It is true that we can see it by "git diff", but it would not work
in the --dry-run mode.  So, here, this commit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agotools: moveconfig: trim garbage lines after header cleanups
Masahiro Yamada [Mon, 25 Jul 2016 10:15:24 +0000 (19:15 +0900)]
tools: moveconfig: trim garbage lines after header cleanups

The tools/moveconfig.py has a feature to cleanup #define/#undef's
of moved config options, but I want this tool to do a better job.

For example, when we are moving CONFIG_FOO and its define is
surrounded by #ifdef ... #endif, like follows:

  #ifdef CONFIG_BAR
  #  define CONFIG_FOO
  #endif

The header cleanup will leave empty #ifdef ... #endif:

  #ifdef CONFIG_BAR
  #endif

Likewise, if a define line between two blank lines

  <blank line>
  #define CONFIG_FOO
  <blank lines.

... is deleted, the result of the clean-up will be successive empty
lines, which is a coding-style violation.

It is tedious to remove left-over garbage lines manually, so I want
the tool to take care of this.  The tool's job is still not perfect,
so we should check the output of the tool, but I hope our life will
be much easier with this patch.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agotools: moveconfig: do not check clean tree and compilers for -H option
Masahiro Yamada [Mon, 25 Jul 2016 10:15:23 +0000 (19:15 +0900)]
tools: moveconfig: do not check clean tree and compilers for -H option

The clean tree (make mrproper) and compilers are required when moving
config options, but not needed when we only cleanup headers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agotools: moveconfig: do not cleanup headers in include/generated
Masahiro Yamada [Mon, 25 Jul 2016 10:15:22 +0000 (19:15 +0900)]
tools: moveconfig: do not cleanup headers in include/generated

The files in include/generated are generated during build and removed
by "make mrproper", so it has no point to touch them by this tool.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoext4: Refuse to mount filesystems with 64bit feature set
Tom Rini [Fri, 22 Jul 2016 21:59:11 +0000 (17:59 -0400)]
ext4: Refuse to mount filesystems with 64bit feature set

With e2fsprogs after 1.43 the 64bit and metadata_csum features are
enabled by default.  The metadata_csum feature changes how
ext4_group_desc->bg_checksum is calculated, which would break write
support.  The 64bit feature however introduces changes such that it
cannot be read by implementations that do not support it.  Since we do
not support this, we must not mount it.

Cc: Stephen Warren <swarren@nvidia.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Stefan Roese <sr@denx.de>
Reported-by: Andrew Bradford <andrew.bradford@kodakalaris.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoARM: Rework and correct barrier definitions
Tom Rini [Mon, 1 Aug 2016 22:54:53 +0000 (18:54 -0400)]
ARM: Rework and correct barrier definitions

As part of testing booting Linux kernels on Rockchip devices, it was
discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
some cases incomplete isb definitions.  This was causing a failure to
boot of the Linux kernel.

In order to solve this problem as well as cover any corner cases that we
may also have had a number of changes are made in order to consolidate
things.  First, <asm/barriers.h> now becomes the source of isb/dsb/dmb
definitions.  This however introduces another complexity.  Due to
needing to build SPL for 32bit tegra with -march=armv4 we need to borrow
the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete
form.  Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add
a comment about it.  Now that we can always know what the target CPU is
capable off we can get always do the correct thing for the barrier.  The
final part of this is that need to be consistent everywhere and call
isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the
function names in others.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Sandy Patterson <apatterson@sightlogix.com>
Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reported-by: Sandy Patterson <apatterson@sightlogix.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoarc: Rename AXS101 board to more generic AXS10x
Alexey Brodkin [Thu, 4 Aug 2016 12:00:35 +0000 (15:00 +0300)]
arc: Rename AXS101 board to more generic AXS10x

As of now we have 2 flavors of ARC SDP boards:
 1) AXS101 - with ARC770 in ASIC
 2) AXS103 - with ARC HS38 in FPGA

Both options share exactly the same base-board and only differ with
CPU-tiles in use. That means all peripherals are the same (they are
implemented in FPGA on the base-board) and so generic board could be
used for both.

While at it:
 * Recreated defconfigs with savedefconfig
 * In include/configs/axs10x.h numerical sizes replaced with
defines from linux/sizes.h for better readability.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarc: Rename ARCangel4 board to nSIM
Alexey Brodkin [Thu, 4 Aug 2016 11:35:01 +0000 (14:35 +0300)]
arc: Rename ARCangel4 board to nSIM

ARCangel was one of the main development boards back in the day but
now it's gone and replaced by other boards like ARC SDP.

But we also used to have simulation platform very similar to ARCangel4
in terms of CPU settings as well as basic IO like UART. Even though
ARCangel4 is long gone now we have a replacement for simulation which is
a plain or stand-alone nSIM and Free nSIM.

Note Free nSIM is available for download here:
https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi

And while at it:
 * Finally switch hex numerical values in nsim.h to defines from
   include/linux/sizes.h
 * Add defconfigs with ARC HS38 cores
 * Recreated all defconfigs with savedefconfig

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
8 years agoarc: No need in sections defined in sources with newer tools
Alexey Brodkin [Wed, 3 Aug 2016 17:44:39 +0000 (20:44 +0300)]
arc: No need in sections defined in sources with newer tools

Starting from arc-2016.03 GNU tools linker properly works with
symbols defined in linker script and so external declarations
are no longer required, dump them.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
8 years agoarc: Update exception & interrupt handling for ARCv2
Alexey Brodkin [Thu, 4 Aug 2016 06:21:50 +0000 (09:21 +0300)]
arc: Update exception & interrupt handling for ARCv2

Initially IVT for ARCv2 was simply copypasted from ARCompact
with some selected fixes so basic stuff works.

Now we update it with more ARCv2 specific vectors like
 * Software Interrupt
 * Division by zero
 * Data cache consistency error
 * Misaligned access

Also normal interrupts are now implemented properly and extened to
all possible 240 items.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
8 years agoarc: Add debug messages during relocation fixups
Alexey Brodkin [Wed, 3 Aug 2016 17:45:22 +0000 (20:45 +0300)]
arc: Add debug messages during relocation fixups

This might be useful to make sure relocation fixups really
happen. And since this info gets printed only in DEBUG
build it doesn't really hurt normal execution.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
8 years agommc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit
Jaehoon Chung [Thu, 28 Jul 2016 05:26:24 +0000 (14:26 +0900)]
mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit

According to DesignWare TRM, FIFO_COUNT is bit[29:17].
If get the correct fifo_count value, it has to  use the FIFO_MASK
as 0x1FFF, not 0x1FF.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Ziyuan Xu <xzy.xu@rock-chips.com>
8 years agommc: dw_mmc: fix data starvation by host timeout under FIFO mode
Xu Ziyuan [Thu, 28 Jul 2016 02:25:48 +0000 (10:25 +0800)]
mmc: dw_mmc: fix data starvation by host timeout under FIFO mode

This patch fixes data starvation by host timeout(HTO) error interrupt
which occurred under FIFO mode transfer on rk3036 board.

The former implement, the actual bytes were transmitted may be less than
should be. The size will still subtract value of len in case of there is
no receive/transmit FIFO data request interrupt.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
8 years agommc: dw_mmc: transfer proper bytes to FIFO
Xu Ziyuan [Thu, 28 Jul 2016 02:25:47 +0000 (10:25 +0800)]
mmc: dw_mmc: transfer proper bytes to FIFO

The former implement, dw_mmc will push and pop the redundant data to
FIFO, we should transfer it according to the real size.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
8 years agommc: sdhci: remove the unnecessary arguments for sdhci_setup_cfg
Jaehoon Chung [Tue, 26 Jul 2016 10:06:24 +0000 (19:06 +0900)]
mmc: sdhci: remove the unnecessary arguments for sdhci_setup_cfg

Some arguments don't need to pass to sdhci_setup_cfg.
Generic variable can be used in sdhci_setup_cfg, and some arguments are
already included in sdhci_host struct.

It's enough that just pass the board specific things to sdhci_setup_cfg().
After removing the unnecessary arguments, it's more simpler than before.
It doesn't consider "Version" and "Capabilities" anymore in each SoC
driver.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agommc: sdhci: remove the unused argument for sdhci_setup_cfg
Jaehoon Chung [Tue, 26 Jul 2016 10:06:23 +0000 (19:06 +0900)]
mmc: sdhci: remove the unused argument for sdhci_setup_cfg

buswidth isn't used anywhere in sdhci_setup_cfg.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agommc: sdhci: revert "mmc: sdhci: Claer high speed if not supported"
Jaehoon Chung [Tue, 26 Jul 2016 10:03:49 +0000 (19:03 +0900)]
mmc: sdhci: revert "mmc: sdhci: Claer high speed if not supported"

This "commit 429790026021d522d51617217d4b86218cca5750" is wrong.
SDHCI_QUIRK_NO_HISPD_BIT is for skipping to set CTRL_HISPD bit.

For example, Exynos didn't have CTRL_HISPD. But Highspeed mode
is supported.
(This quirks doesn't mean  that driver didn't support the Highseepd mode.)

Note: If driver didn't support the Highspeed Mode, use or add the other
quirks.

After applied this patch, all Exynos SoCs are just running with 25MHz.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
8 years agommc: display mmc list information like mmc_legacy type
Xu Ziyuan [Sat, 23 Jul 2016 03:11:22 +0000 (11:11 +0800)]
mmc: display mmc list information like mmc_legacy type

It's nicer to see this:

=> mmc list
dwmmc@ff0c0000: 0
dwmmc@ff0f0000: 1 (eMMC)

than this:

=> mmc list
dwmmc@ff0c0000: 0dwmmc@ff0f0000: 1 (eMMC)

With the former, it's much clearer which mmc devices are on.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
8 years agommc: use the generic error number
Jaehoon Chung [Tue, 19 Jul 2016 07:33:36 +0000 (16:33 +0900)]
mmc: use the generic error number

Use the generic error number instead of specific error number.
If use the generic error number, it can debug more easier.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agommc: fsl_esdhc: remove the duplicated header file
Jaehoon Chung [Tue, 19 Jul 2016 07:33:35 +0000 (16:33 +0900)]
mmc: fsl_esdhc: remove the duplicated header file

"mmc.h" is already included. It's duplicated.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agommc: dw_mmc: remove the duplicated header file
Jaehoon Chung [Tue, 19 Jul 2016 07:33:34 +0000 (16:33 +0900)]
mmc: dw_mmc: remove the duplicated header file

<asm-generic/errno.h> is already included in <errno.h>.
It can use <errno.h> instead of <asm-generic/errno.h>

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agommc: s5p_sdhci: unset the SDHCI_QUIRK_BROKEN_R1B
Jaehoon Chung [Tue, 12 Jul 2016 12:18:47 +0000 (21:18 +0900)]
mmc: s5p_sdhci: unset the SDHCI_QUIRK_BROKEN_R1B

Unset the SDHCI_QUIRK_BROKEN_R1B for exynos SoC.
(Tested on Exynos4 Boards.)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
8 years agommc: sdhci: set to INT_DATA_END when there are data
Jaehoon Chung [Tue, 12 Jul 2016 12:18:46 +0000 (21:18 +0900)]
mmc: sdhci: set to INT_DATA_END when there are data

There is no data, it doesn't needs to wait for completing data transfer.
(It seems that it can be removed.)
Almost all timeout error is occured from stop command without data.
After applied this patch, I hope that we don't need to increase timeout value anymore.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
8 years agommc: sdhci: clean up timeout detection
Masahiro Yamada [Sat, 9 Jul 2016 15:40:22 +0000 (00:40 +0900)]
mmc: sdhci: clean up timeout detection

The current timeout detection logic is not very nice; it calls
get_timer(start) in the while() loop, and then calls it again after
the loop to check if a timeout error happened.

Because of the time difference between the two calls of get_timer(),
the timeout detected after the loop may not be true.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
8 years agoARM: tegra: call tegra_board_init on Tegra186
Stephen Warren [Wed, 27 Jul 2016 21:24:57 +0000 (15:24 -0600)]
ARM: tegra: call tegra_board_init on Tegra186

Introduce tegra_board_init() and call it from board_init(). Tegra wil use
tegra_board_init() for board-specific initialization, and board_init() for
SoC-specific initialization.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoARM: tegra: add I2C controllers to Tegra186 DT
Bryan Wu [Wed, 27 Jul 2016 21:48:21 +0000 (15:48 -0600)]
ARM: tegra: add I2C controllers to Tegra186 DT

Tegra186 has 8 I2C controllers including BPMP I2C. This patch adds the
other 7 generic controllers to Tegra186's DT.

Signed-off-by: Bryan Wu <pengw@nvidia.com>
(swarren, fixed DT node sort order, tweak patch description)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoARM: tegra: add PCIe controller to Tegra186 SoC DT
Stephen Warren [Wed, 27 Jul 2016 21:48:19 +0000 (15:48 -0600)]
ARM: tegra: add PCIe controller to Tegra186 SoC DT

The Tegra186 PCIe DT content is almost identical to previous chips, except
that the:

- There are 3 ports instead of 2.
- Some physical addresses have moved.
- PHY programming is handled by firmware, so CCPLEX DTs don't need to
  reference any PHY.
- The power domain is explicitly represented in DT. This change is
  mandatory for Tegra186 since standard power domain APIs are used, and
  should be made to the DT for older SoCs, although we get away without
  doing so since U-Boot currently uses custom APIs that hard-code power
  domain IDs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoARM: tegra: add BPMP I2C to Tegra186 device tree
Stephen Warren [Fri, 29 Jul 2016 19:15:04 +0000 (13:15 -0600)]
ARM: tegra: add BPMP I2C to Tegra186 device tree

This allows the BPMP I2C device to be instantiated, which makes it
available to other drivers and the user.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoARM: tegra: add BPMP and dependencies to Tegra186 DT
Stephen Warren [Wed, 27 Jul 2016 21:24:51 +0000 (15:24 -0600)]
ARM: tegra: add BPMP and dependencies to Tegra186 DT

This adds the DT content that's needed to allow board DTs to enable use
of BPMP, clocks, resets, GPIOs, eMMC, and SD cards.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agodt-bindings: add Tegra186 BPMP I2C binding
Stephen Warren [Fri, 29 Jul 2016 19:15:02 +0000 (13:15 -0600)]
dt-bindings: add Tegra186 BPMP I2C binding

In Tegra186, the BPMP (Boot and Power Management Processor) owns certain
HW devices, such as the I2C controller for the power management I2C bus.
Software running on other CPUs must perform IPC to the BPMP in order to
execute transactions on that I2C bus. This binding describes an I2C bus
that is accessed in such a fashion.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agodt-bindings: allow child nodes inside the Tegra BPMP
Stephen Warren [Fri, 29 Jul 2016 19:15:00 +0000 (13:15 -0600)]
dt-bindings: allow child nodes inside the Tegra BPMP

The BPMP implements some services which must be represented by separate
nodes. For example, it can provide access to certain I2C controllers, and
the I2C bindings represent each I2C controller as a device tree node.
Update the binding to describe how the BPMP supports this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoARM: tegra: add BPMP DT bindings
Stephen Warren [Wed, 27 Jul 2016 21:24:50 +0000 (15:24 -0600)]
ARM: tegra: add BPMP DT bindings

The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. These bindings dictate how to represent the BPMP in device tree.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoARM: tegra: adapt to latest HSP DT binding
Stephen Warren [Wed, 27 Jul 2016 21:24:49 +0000 (15:24 -0600)]
ARM: tegra: adapt to latest HSP DT binding

The DT binding for the Tegra186 HSP module apparently wasn't quite final
when I posted initial U-Boot support for it. Add the final DT binding doc
and adapt all code and DT files to match it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agopowerpc/86xx: Increase boot map size to 256 MiB
Scott Wood [Tue, 19 Jul 2016 22:51:55 +0000 (17:51 -0500)]
powerpc/86xx: Increase boot map size to 256 MiB

This is what Linux maps on classic PPC during boot, and modern kernel
images don't fit within the current 8 MiB uncompressed limit.

Adjust image load addresses to be above this limit to avoid conflicts.

Signed-off-by: Scott Wood <oss@buserror.net>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Wed, 3 Aug 2016 00:45:24 +0000 (20:45 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq

8 years agoARMv8/fsl-ppa: Consolidate PPA image stored-media flag for XIP
Hou Zhiqiang [Fri, 29 Jul 2016 11:26:34 +0000 (19:26 +0800)]
ARMv8/fsl-ppa: Consolidate PPA image stored-media flag for XIP

The PPA binary may be stored on QSPI flash instead of NOR.
So, deprecated CONFIG_SYS_LS_PPA_FW_IN_NOR in favour of
CONFIG_SYS_LS_PPA_FW_IN_XIP to prevent fragmentation of code
by addition of a new QSPI specific flag.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarm/PSCI: Add support for creating ARMv7 PSCI version 1.0 DT node
Hou Zhiqiang [Fri, 29 Jul 2016 10:26:37 +0000 (18:26 +0800)]
arm/PSCI: Add support for creating ARMv7 PSCI version 1.0 DT node

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarm/PSCI: Fixed the backward compatiblity issue
Hou Zhiqiang [Fri, 29 Jul 2016 10:26:36 +0000 (18:26 +0800)]
arm/PSCI: Fixed the backward compatiblity issue

Appended the compatible strings of old version PSCI to the latest
version supported. And there are some psci functions' property must
be added to DT only for psci version 0.1, including cpu_on, cpu_off,
cpu_suspend, migrate.

Note, ARMv8 Secure Firmware Framework doesn't support PSCI ver 0.1.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarm/PSCI: Removed unused code
Hou Zhiqiang [Fri, 29 Jul 2016 10:26:35 +0000 (18:26 +0800)]
arm/PSCI: Removed unused code

Identify the PSCI node only by its name, so removed the code finding
it by compatible string.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodriver/ddr/fsl: Fix timing_cfg_2
York Sun [Fri, 29 Jul 2016 16:02:29 +0000 (09:02 -0700)]
driver/ddr/fsl: Fix timing_cfg_2

Commit 5605dc6 tried to fix wr_lat bit in timing_cfg_2, but the
change was wrong. wr_lat has 5 bits with MSB at [13] and lower
4 bits at [9:12], in big-endian convention.

Signed-off-by: York Sun <york.sun@nxp.com>
Reported-by: Thomas Schaefer <Thomas.Schaefer@kontron.com>
8 years agoboard/freescale: Update MAINTAINERS files
York Sun [Fri, 29 Jul 2016 15:46:49 +0000 (08:46 -0700)]
board/freescale: Update MAINTAINERS files

Update maintainers for secure boot targets.

Signed-off-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls1043a: enable pxe commands
Wenbin Song [Fri, 15 Jul 2016 09:17:46 +0000 (17:17 +0800)]
armv8: ls1043a: enable pxe commands

Enable pxe command for ls1043ardb and ls1043aqds.

Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls1012a: Update Refresh cycle for DDR
Prabhakar Kushwaha [Tue, 19 Jul 2016 10:24:33 +0000 (15:54 +0530)]
armv8: ls1012a: Update Refresh cycle for DDR

Refresh cycle value must be selected based on the frequency
of DDR. tREFI = 7.8 us as per JEDEC. The value for MDREF[REF_CNT]
should be based on round up (tREFI/tCK) formula. For 500MHz, mdref
value should be 0x0f3c8000.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls1012a: Enable DDR row-bank-column decoding
Prabhakar Kushwaha [Tue, 19 Jul 2016 10:24:22 +0000 (15:54 +0530)]
armv8: ls1012a: Enable DDR row-bank-column decoding

Enable DDR row-bank-column decoding to decode DDR address as
row-bank-column instead of bank-row-column for improving
performance of serial data transfers.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoboard: ls1012aqds: Update LBMAP_MASK and RST_CTL_RESET
Prabhakar Kushwaha [Tue, 19 Jul 2016 08:35:47 +0000 (14:05 +0530)]
board: ls1012aqds: Update LBMAP_MASK and RST_CTL_RESET

qixis_reset altbank usagge ~QIXIS_LBMAP_MASK in code. So define
inverse value QIXIS_LBMAP_MASK.

Also, update QIXIS_RST_CTL_RESET value to keep RST_CTL[REQ_MOD]
as 0b11 i.e. PORESET during qixis_reset

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agocrypto/fsl: Update blob cmd to accept 64bit addresses
Sumit Garg [Thu, 14 Jul 2016 17:27:50 +0000 (13:27 -0400)]
crypto/fsl: Update blob cmd to accept 64bit addresses

Update blob cmd to accept 64bit source, key modifier and destination
addresses. Also correct output result print format for fsl specific
implementation of blob cmd.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodriver: spi: fsl-qspi: remove compile Warnings
Yunhui Cui [Wed, 13 Jul 2016 02:46:27 +0000 (10:46 +0800)]
driver: spi: fsl-qspi: remove compile Warnings

Warnins log:
drivers/spi/fsl_qspi.c: In function ‘qspi_ahb_read’:
drivers/spi/fsl_qspi.c:400:16: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  memcpy(rxbuf, (u8 *)(priv->cur_amba_base + priv->sf_addr), len);

Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>