Martyn Welch [Wed, 10 Jan 2018 19:31:30 +0000 (20:31 +0100)]
board: ge: bx50v3: move FEC MAC address programming to driver
Instead of programming the hardware directly in the board
implementation, follow the flow documented in doc/README.enetaddr: set
the enet[0-9]*addr environment variable and let the driver program the
hardware.
This avoids duplicating the implementation as it already exists in the
driver (drivers/net/fec_mxc.c: fec_set_hwaddr).
The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order, i.e. FEC always has the index 2.
The FEC driver does *not* set the flag Set MAC Address on Transmit (bit
set_eth0_mac_address used to do but this is unnecessary as the Linux
networking stack fills in the MAC address.
Signed-off-by: Hannu Lounento <hannu.lounento@ge.com> Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Ian Ray [Wed, 10 Jan 2018 19:31:29 +0000 (20:31 +0100)]
configs: Add network device support for bx50v3 products
Modify b450v3, b650v3 and b850v3 defconfigs to enable the network devices
found in these products.
Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Martyn Welch [Wed, 10 Jan 2018 19:31:28 +0000 (20:31 +0100)]
board: ge: Enable access to i2c bus 1 and 2
The change in i2c configuration added to support access to the VPD has
inadvertantly caused access to i2c buses 1 & 2 to be lost. This has
resulted in the configuration for the PMIC to be attempted on the wrong
bus and thus isn't taking effect.
Add the required configuration to return access to buses 1 & 2. In order
to ensure that any users of the bus numbering prior to addition in VPD
patches work, add buses before configuration related to mux on bus 0 and
tweak VPD bus usage to fit new numbering scheme.
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Hannu Lounento [Wed, 10 Jan 2018 19:31:25 +0000 (20:31 +0100)]
net: e1000: split e1000_read_mac_addr
Split the implementation of e1000_read_mac_addr into eeprom and register
versions called by e1000_read_mac_addr.
This allows for calling e1000_read_mac_addr when MAC address is needed
with no constraints where it is read from, and for calling the register
and, especially, the eeprom version directly in order to specify where
to read the address from.
Signed-off-by: Hannu Lounento <hannu.lounento@ge.com> CC: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Ye Li [Wed, 10 Jan 2018 05:20:44 +0000 (13:20 +0800)]
net: fec: fix build warnings for 64bits support
When building for 64bits system, we get some warnings about type
cast between pointer and integer. This patch eliminates the warnings
by using ulong/long type which is 32bits on 32bits system or 64bits on
64bits system.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Peng Fan [Wed, 10 Jan 2018 05:20:32 +0000 (13:20 +0800)]
imx: cleanup bootaux
Move i.MX6/7 bootaux code to imx_bootaux.c.
The i.MX6/7 has different src layout, so define M4 reg offset
to ease the cleanup. Redefine the M4 related BIT for share
common code.
Peng Fan [Wed, 10 Jan 2018 05:20:31 +0000 (13:20 +0800)]
imx: refactor imx_get_mac_from_fuse
Move imx_get_mac_from_fuse to a new mac.c for i.MX6/7.
Since fuse regs structure are different for i.MX6/7, use mac
address offset in code and define a new local struture
imx_mac_fuse.
Peng Fan [Wed, 10 Jan 2018 05:20:22 +0000 (13:20 +0800)]
imx: mx8m: add clock driver
Add clock driver to support i.MX8M.
There are two kind PLLs, FRAC pll and SSCG pll. ROM already
configured SYS PLL1/2, we only need to configure the output.
ocotp/i2c/pll decoding and configuration/usdhc/lcdif/dram pll/
enet clock are configured in the code.
Jagan Teki [Tue, 9 Jan 2018 18:49:52 +0000 (00:19 +0530)]
configs: enable spl support wrt env device
nand device needed for mmc config to access nand
for write and update so enabling SPL_SUPPORT to mmc
or nand is wrt to env device rather nand driver check.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
i.CoreM6 1.5 is an another i.CoreM6 QDL cpu modules which can be connected
to EDIMM starter kit design with eMMC and MIPI-CSI interfaces suitable for
Android and video capture application.
notable features:
CPU NXP i.MX6 S/DL/D/Q, Up to 4 x Cortex-A9@800MHz
Memory Up to 2 GB DDR3-1066
Video Interfaces Up to 1 Parallel Up to 2 LVDS HDMI 1.4
port 8 bit CSI INPUT MIPI-CSI INPUT
1 x 10/100 Ethernet interface, 2 x USB, 1 x PCIe, 1 x I2S etc
This patch adds support for Quad/Dual and DualLite/Solo SOM's on
MIPI starter kit with boot from SD and eMMC.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
env: make env drivers propagate env_import return value
For multiple env drivers to correctly implement fallback when
one environment fails to load (e.g. crc error), the return value
of env_import has to be propagated by all env driver's load
function.
Without this change, the first driver that succeeds to load an
environment with an invalid CRC return 0 (success) and no other
drivers are checked.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
There is more common code in mmc, nand and ubi env drivers that
can be shared by moving to env_import_redund.
For this, a status/error value whether the buffers were loaded
are passed as additional parameters to env_import_redund.
Ideally, these are already returned to the env driver by the
storage driver. This is the case for mmc, nand and ubi, so for
this change, code deduplicated.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
env: make env_import(_redund) return 0 on success, not 1
env_import (and env_import_redund) currently return 1 on success
and 0 on error. However, they are only used from functions
returning 0 on success or a negative value on error.
Let's clean this up by making env_import and env_import_redund
return 0 on success and -EIO on error (as was the case for all
users before).
Users that cared for the return value are also updated. Funny
enough, this only affects onenand.c and sf.c
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
cmd: nvedit: env_get_f must check for env_get_char error codes
env_get_f calls env_get_char to load single characters from the
environment. However, the return value of env_get_char was not
checked for errors. Now if the env driver does not support the
.get_char call, env_get_f did not notice this and looped over the
whole size of the environment, calling env_get_char over 8000
times with the default settings, just to return an error in the
end.
Fix this by checking if env_get_char returns < 0.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tom Rini [Wed, 31 Jan 2018 20:34:49 +0000 (15:34 -0500)]
davinci: Fix omapl138_lcdk builds
The omapl138_lcdk platform is not a DA850 SoC so we need to select
SOC_DA8XX and not SOC_DA850, as it was before. It does however point
out a bit of a misnomer in how all of these PLL defines are named as
they are generic to DA8xx, not DA850 centric. Remove the 'if SOC_DA850'
under the defaults as these are simply the defaults. As SOC_DA8XX will
select SYS_DA850_DDR_INIT when needed, we do not need it under both SOC
options.
Fixes: 76e22222d3aa ("Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig") Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 31 Jan 2018 12:10:55 +0000 (07:10 -0500)]
Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.03
- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
- ZynqMP psu rework based on Zynq concept
- Add low level initialization for zc770 and zcu102
- Add support for Zynq zc770 x16 nand configuration
- Add mini nand/emmc ZynqMP targets
- Some arasan nand changes
Adam Ford [Tue, 23 Jan 2018 10:04:28 +0000 (04:04 -0600)]
Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_DV_CLKMODE
CONFIG_SYS_DA850_PLL0_POSTDIV
CONFIG_SYS_DA850_PLL0_PLLDIV1
CONFIG_SYS_DA850_PLL0_PLLDIV2
CONFIG_SYS_DA850_PLL0_PLLDIV3
CONFIG_SYS_DA850_PLL0_PLLDIV4
CONFIG_SYS_DA850_PLL0_PLLDIV5
CONFIG_SYS_DA850_PLL0_PLLDIV6
CONFIG_SYS_DA850_PLL0_PLLDIV7
CONFIG_SYS_DA850_PLL1_POSTDIV
CONFIG_SYS_DA850_PLL1_PLLDIV1
CONFIG_SYS_DA850_PLL1_PLLDIV2
CONFIG_SYS_DA850_PLL1_PLLDIV3
York Sun [Mon, 29 Jan 2018 17:44:40 +0000 (09:44 -0800)]
armv8: ls2088ardb: Add 3DS RDIMM support
Tested with MTA72ASS8G72PSZ-2S6G1. This is 3DS RDIMM module with x4
DDR chips. LS2088ARDB needs to be modified to connect all DQS signals.
Some of them are grounded by default for x8 chips. Tested with RDIMM
MTA18ASF2G72PDZ on main memory controllers. DP-DDR doesn't support
RDIMM. Dropped related timing table.
York Sun [Mon, 29 Jan 2018 17:44:37 +0000 (09:44 -0800)]
drivers/ddr/fsl: Modify binding registers to save time on data init
DDR controllers always use binding register to determine the memory
space to perform data initialization. In case of controller interleaving,
the space is doubled, resulting twice long wait. It wasn't too bad until
the memory capacity increases. To reduce the wait time, reduce the
binding space to half and restore it after data initialization.
Three-way interleaving is no longer used and is removed.
York Sun [Mon, 29 Jan 2018 17:44:33 +0000 (09:44 -0800)]
drivers/ddr/fsl: Fix DDR4 RDIMM support
For DDR4, command/address delay in mode registers and parity latency
in timing config register are only needed for UDIMMs, but not RDIMMs.
Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for
dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix
calculation of timing config registers. Use hexadecimal format for
printing RCW (register control word) registers.
Yogesh Gaur [Tue, 16 Jan 2018 04:38:24 +0000 (10:08 +0530)]
driver: fsl-mc: Perform fsl-mc fdt fixup for lazyapply dpl
For for case of lazyapply method, API fdt_fixup_board_enet() gets
invoked before DPL being deployed. This leads to an issue that
fsl-mc fdt fixup status marked as fail and dprc driver didn't get
registered in linux boot.
Fixes this issue by calling fdt_fixup_board_enet() for case when
DPL is deployed successfully in lazyapply method.
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Ulf Magnusson [Tue, 30 Jan 2018 12:59:03 +0000 (13:59 +0100)]
x86: kconfig: Remove meaningless 'select n'
'select n' selects a constant symbol, which is meaningless and has no
effect. Maybe this was meant to be a 'default n', though bool and
tristate symbols already implicitly default to n.
Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which does more strict checking here:
kconfiglib.KconfigSyntaxError: board/google/Kconfig:34: Couldn't parse ' select n': expected nonconstant symbol
Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Sat, 27 Jan 2018 20:13:47 +0000 (15:13 -0500)]
x86: quark: Fix unused warnings
The variable t_rfc is never used, so drop it. The variables ddr_wctl
and ddr_wcmd are only used in certain manual instances, so guard their
declaration by the same check as their use.
Cc: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Tue, 30 Jan 2018 13:01:17 +0000 (05:01 -0800)]
x86: qemu: qfw: Implement acpi_get_rsdp_addr()
U-Boot on QEMU does not build ACPI table by ourself, instead it uses
the prebuilt ACPI table via the qfw interface. This implements the
qfw version of acpi_get_rsdp_addr() for setup_zimage().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Ulf Magnusson [Tue, 30 Jan 2018 13:02:01 +0000 (14:02 +0100)]
arm64: zynqmp: Fix misspelled choice default
There is no JTAG symbol in the "Boot mode" choice. JTAG_MODE was
probably intended.
No functional changes. Kconfig choices fall back on using the first
(visible) symbol in the choice as the default if the default symbol is
not visible.
Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which prints the following warning:
warning: the default selection JTAG (undefined) of <choice> (defined at arch/arm/cpu/armv8/zynqmp/Kconfig:107) is not contained in the choice
I've added a corresponding warning to the C tools too, which is
currently in linux-next: https://patchwork.kernel.org/patch/9983667/
Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 10 Jan 2018 08:36:09 +0000 (09:36 +0100)]
arm64: zynqmp: Prepare psu_init rework
Move generic functions to common location psu_spl_init.c. Function
declarations are added to private header.
These changes are done in connection to the fact that still files from
HDF can be copied over and compilation should pass.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
nand: arasan_nfc: Use the calculated ecc address for updating ecc register
This patch corrects the ecc address calculation before updating
to ecc register. The ecc address has to be calculated based on
page, oob and ecc sizes of the device.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds support for ondie ecc. As of now
this adds support for micron parts which supports
ondie ecc.
Didn't found any better way to detect ondie ecc
support by a device except sorting out with
manufacture and device id's.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
xilinx: zynqmp: Add new target with only emmc enabled
This patch adds new target which is called as mini configuration
with only emmc functionality and other required basic features enabled.
This will be used to run in system with small footprint and needs
emmc support.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
xilinx: zynqmp: Add new target with only nand enabled
This patch adds new target which is called as mini configuration
with only nand functionality and other required basic features enabled.
This will be used to run in system with small footprint and needs
nand support.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm64: zynqmp: Provide a config to not map DDR region in MMU table
DDR less systems are possible for configuration like mini qspi
and making DDR region as normal memory may cause speculative
access which results u-boot hang if DDR is absent. So, this
patch fixes the issue by not making DDR memory region
entry into MMU table.
Future solution is to prepare MMU table per memory node in dts instead
of hard code DDR addresses.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 9 Jan 2018 14:27:31 +0000 (15:27 +0100)]
arm: zynq: Enable DM_GPIO when needed
There are two reasons for doing this change.
There is still !DM driver for xilinx soft gpio IP and especially it is
saving some space for memory constrained boards like cse (almost ~400B).
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 9 Jan 2018 13:52:29 +0000 (14:52 +0100)]
arm: zynq: Enable BLK when needed
There is no reason to enable BLK by default for all boards which is just
increasing memory footprint for memory contrained boards like cse.
zc770s are also saving some space.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>