Stefan Roese [Thu, 19 Apr 2007 07:53:52 +0000 (09:53 +0200)]
ppc4xx: Fix chip select timing for SysACE access on AMCC Katmai
Previous versions used full wait states for the chip select #1 which
is connected to the Xilinix SystemACE controller on the AMCC Katmai
evaluation board. This leads to really slow access and therefore low
performance. This patch now sets up the chip select a lot faster
resulting in much better read/write performance of the Linux driver.
Denis Peter [Fri, 13 Apr 2007 07:13:33 +0000 (09:13 +0200)]
[PATCH] Fix bugs in cmd_ide.c and cmd_scsi.c
Fix bug introduced by "Fix get_partition_info() parameter error in all
other calls" from 2005-03-04 in cmd_ide.c and cmd_scsi.c, which prevented
to use diskboot or scsiboot form another device than 0.
Jeffrey Mann [Thu, 12 Apr 2007 12:15:59 +0000 (14:15 +0200)]
ppc4xx: Fix i2c divisor calcularion for PPC4xx
This patch fixes changes the i2c_init(...) function to use the function
get_OPB_freq() rather than calculating the OPB speed by
sysInfo.freqPLB/sysInfo.pllOpbDiv. The get_OPB_freq() function is
specific per processor. The prior method was not and so was calculating
the wrong speed for some PPC4xx processors.
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com> Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 2 Apr 2007 08:09:30 +0000 (10:09 +0200)]
ppc4xx: Change SysACE address on Katmai
With this new base address of the Xilinx SystemACE controller
the Linux driver will be easier to adapt, since it can now be
mapped via the "normal" ioremap() call.
Gerald Van Baren [Sat, 31 Mar 2007 16:22:10 +0000 (12:22 -0400)]
Add a flattened device tree (fdt) command (1 of 2)
The fdt command uses David Gibson's libfdt library to manipulate as well
as print the flattened device tree. This patch is the new command,
the second part is the modifications to the existing code.
Gerald Van Baren [Sat, 31 Mar 2007 16:13:43 +0000 (12:13 -0400)]
libfdt: Enhanced and published fdt_next_tag()
Enhanced the formerly private function _fdt_next_tag() to allow stepping
through the tree, used to produce a human-readable dump, and made
it part of the published interface.
Also added some comments.
Stefan Roese [Sat, 31 Mar 2007 06:46:08 +0000 (08:46 +0200)]
ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)
Fix a bug in the auto calibration routine. This driver now runs
more reliable with the tested modules. It's also tested with
167MHz PLB frequency (667MHz DDR2 frequency) on the Katmai.
Stefan Roese [Wed, 28 Mar 2007 12:52:12 +0000 (14:52 +0200)]
i2c: Enable "old" i2c commands even when CONFIG_I2C_CMD_TREE is defined
The "old" i2c commands (iprobe, imd...) are now compiled in again,
even when the i2c command tree is enabled via the CONFIG_I2C_CMD_TREE
config option.
Haiying Wang [Thu, 7 Dec 2006 16:35:55 +0000 (10:35 -0600)]
Set Rev 2.x 86xx PIC in mixed mode.
Prevent false interrupt from hanging Linux as MSR[EE] is set
to enable interrupts by changing the PIC out of the default
pass through mode into mixed mode.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
Stefan Roese [Fri, 16 Mar 2007 20:11:42 +0000 (21:11 +0100)]
[PATCH] Use dynamic SDRAM TLB setup on AMCC Ebony eval board
Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
DDR memory are dynamically programmed matching the total size
of the equipped memory (DIMM modules).
Michal Simek [Sun, 11 Mar 2007 12:48:24 +0000 (13:48 +0100)]
[Microblaze][PATCH] part 2
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
Michal Simek [Sun, 11 Mar 2007 12:42:58 +0000 (13:42 +0100)]
[Microblaze][PATCH]
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
Stefan Roese [Thu, 8 Mar 2007 09:13:16 +0000 (10:13 +0100)]
[PATCH] Update AMCC Luan 440SP eval board support
The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.
This patch also enables the cache in FLASH for the startup
phase of U-Boot (while running from FLASH). After relocating to
SDRAM the cache is disabled again. This will speed up the boot
process, especially the SDRAM setup, since there are some loops
for memory testing (auto calibration).
Stefan Roese [Thu, 8 Mar 2007 09:10:18 +0000 (10:10 +0100)]
[PATCH] Update AMCC Yucca 440SPe eval board support
The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.
Stefan Roese [Wed, 7 Mar 2007 15:43:00 +0000 (16:43 +0100)]
[PATCH] Use dynamic SDRAM TLB setup on AMCC Ocotea eval board
Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
DDR memory are dynamically programmed matching the total size
of the equipped memory (DIMM modules).
Stefan Roese [Wed, 7 Mar 2007 15:39:36 +0000 (16:39 +0100)]
[PATCH] Fix AMCC 44x SPD SDRAM init code to support 2 DIMM's
This patch fixes a problem that occurs when 2 DIMM's are
used. This problem was first spotted and fixed by Gerald Jackson
<gerald.jackson@reaonixsecurity.com> but this patch fixes the
problem in a little more clever way.
This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.
As this feature is new to the "old" 44x SPD DDR driver, it
has to be enabled via the CONFIG_PROG_SDRAM_TLB define.
projects / u-boot / log