]> git.sur5r.net Git - u-boot/log
u-boot
9 years agodrivers: usb: fsl: Check USB Erratum A007792 applicability
Nikhil Badola [Thu, 30 Oct 2014 04:41:28 +0000 (10:11 +0530)]
drivers: usb: fsl: Check USB Erratum A007792 applicability

Check USB Erratum A007792 applicability. If applicable, add
corresponding  property in the device tree via device tree fixup

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agodrivers: usb: fsl: Add USB device-tree errata framework
Nikhil Badola [Tue, 30 Sep 2014 05:54:07 +0000 (11:24 +0530)]
drivers: usb: fsl: Add USB device-tree errata framework

Add a new framework for fsl usb erratum handling to standardize
erratum checking only inside Uboot. Information to kernel is passed
via a boolean property corresponding to erratum, hence eliminating
need for code duplication inside kernel

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agodrivers: usb: Make usb device-tree fixup code architecture independent
Nikhil Badola [Mon, 20 Oct 2014 11:20:49 +0000 (16:50 +0530)]
drivers: usb: Make usb device-tree fixup code architecture independent

move usb device tree fixup code from "arch/powerpc/" to "drivers/usb/"
so that it works independent of architecture it is running on

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agols1021aqds: add hwconfig setting to do pin mux
Yao Yuan [Wed, 26 Nov 2014 06:54:33 +0000 (14:54 +0800)]
ls1021aqds: add hwconfig setting to do pin mux

The Freescale LS1021AQDS share some pins, so Add the hwconfig option
that allows the user to choose which the function he wants.

The main pin mux IP is:
eSDHC, SAI, IIC2, RGMII, CAN, SAI.

Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Add NAND boot support for LS1021AQDS board
Alison Wang [Tue, 9 Dec 2014 09:38:14 +0000 (17:38 +0800)]
arm: ls102xa: Add NAND boot support for LS1021AQDS board

This patch adds NAND boot support for LS1021AQDS board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from NAND flash to DDR, finally SPL transfer control to u-boot.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Add QSPI boot support for LS1021AQDS/TWR board
Alison Wang [Tue, 9 Dec 2014 09:38:02 +0000 (17:38 +0800)]
arm: ls102xa: Add QSPI boot support for LS1021AQDS/TWR board

This patch adds QSPI boot support for LS1021AQDS/TWR board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then the booting will start from QSPI memory space.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Fix SD/NAND/QSPI boot defination error for QE support
Alison Wang [Tue, 9 Dec 2014 09:37:49 +0000 (17:37 +0800)]
arm: ls102xa: Fix SD/NAND/QSPI boot defination error for QE support

The SD/NAND/QSPI boot definations are wrong for QE support, this
patch is to fix this error.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls1021a: Add CONFIG_DOS_PARTITION and CONFIG_CMD_FAT support
Alison Wang [Tue, 9 Dec 2014 09:37:34 +0000 (17:37 +0800)]
arm: ls1021a: Add CONFIG_DOS_PARTITION and CONFIG_CMD_FAT support

This patch will fix the bug that the partitions on the SD card could
not be accessed and add the support for the FAT fs.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Add SD boot support for LS1021ATWR board
Alison Wang [Wed, 3 Dec 2014 07:00:48 +0000 (15:00 +0800)]
arm: ls102xa: Add SD boot support for LS1021ATWR board

This patch adds SD boot support for LS1021ATWR board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.

Signed-off-by: Chen Lu <chen.lu@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Add SD boot support for LS1021AQDS board
Alison Wang [Wed, 3 Dec 2014 07:00:47 +0000 (15:00 +0800)]
arm: ls102xa: Add SD boot support for LS1021AQDS board

This patch adds SD boot support for LS1021AQDS board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agols102xa: qixis: Add CONFIG_QIXIS_I2C_ACCESS macro
Alison Wang [Wed, 3 Dec 2014 07:00:46 +0000 (15:00 +0800)]
ls102xa: qixis: Add CONFIG_QIXIS_I2C_ACCESS macro

Through adding CONFIG_QIXIS_I2C_ACCESS macro,
QIXIS_READ(reg)/QIXIS_WRITE(reg, value) can be used
for both i2c and ifc access to QIXIS FPGA. This is
more convenient for coding.

Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agokconfig: ls1021a: add SUPPORT_SPL
Alison Wang [Wed, 3 Dec 2014 07:00:45 +0000 (15:00 +0800)]
kconfig: ls1021a: add SUPPORT_SPL

Add SUPPORT_SPL feature for SD and NAND boot on
LS1021AQDS and LS1021ATWR.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: spl: Add I2C linker list in generic .lds
Alison Wang [Wed, 3 Dec 2014 07:00:43 +0000 (15:00 +0800)]
arm: spl: Add I2C linker list in generic .lds

On LS1, DDR is initialized by reading SPD through I2C interface
in SPL code. For I2C, ll_entry_count() is called, and it returns
the number of elements of a linker-generated array placed into
subsection of .u_boot_list section specified by _list argument.
So add I2C linker list in the generic .lds to fix the issue about
using I2C in SPL.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agospl: Use u-boot.img instead of u-boot.bin
Alison Wang [Wed, 3 Dec 2014 07:00:42 +0000 (15:00 +0800)]
spl: Use u-boot.img instead of u-boot.bin

In SD boot, the magic number of u-boot image will be checked.
For LS102xA, u-boot.bin doesn't have the magic number. So use
u-boot.img which includes the magic number instead of u-boot.bin
when producing u-boot-with-spl-pbl.bin.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agols102xa: pblimage: Add pblimage tool support for LS102xA
Alison Wang [Wed, 3 Dec 2014 07:00:41 +0000 (15:00 +0800)]
ls102xa: pblimage: Add pblimage tool support for LS102xA

For LS102xA, the size of spl/u-boot-spl.bin is variable.
This patch adds the support to deal with the variable
u-boot size in pblimage tool. It will be padded to 64
byte boundary.

Use pblimage_check_params() to add the specific operations
for ARM, such as PBI CRC and END command and the calculation
of pbl_cmd_initaddr.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agols1021aqds: set the default I2C channel before DDR init
Chenhui Zhao [Thu, 6 Nov 2014 02:51:59 +0000 (10:51 +0800)]
ls1021aqds: set the default I2C channel before DDR init

When resuming from deep sleep, the I2C channel may not be
in the default channel. So, switch to the default channel
before accessing DDR SPD.

Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Update PCIe dts node status
Minghuan Lian [Fri, 31 Oct 2014 05:43:44 +0000 (13:43 +0800)]
arm: ls102xa: Update PCIe dts node status

The patch changes PCIe dts node status to 'disabled' if the
corresponding controller is disabled according to serdes protocol.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: clear EPU registers for deep sleep
chenhui zhao [Wed, 22 Oct 2014 10:20:22 +0000 (18:20 +0800)]
arm: ls102xa: clear EPU registers for deep sleep

After wakeup from deep sleep, Clear EPU registers as early as possible
to prevent from possible issue. It's also safe to clear at normal boot.

Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: fixed a bus frequency setting error
Tang Yuantian [Tue, 21 Oct 2014 05:51:58 +0000 (13:51 +0800)]
arm: ls102xa: fixed a bus frequency setting error

The bus frequency in SOC node should be clock frequency of platform.
That is not true if it is devided by 2.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoPrepare v2015.01-rc3 v2015.01-rc3
Tom Rini [Mon, 8 Dec 2014 21:33:13 +0000 (16:33 -0500)]
Prepare v2015.01-rc3

Signed-off-by: Tom Rini <trini@ti.com>
9 years agoMerge git://git.denx.de/u-boot-mpc85xx
Tom Rini [Mon, 8 Dec 2014 21:35:07 +0000 (16:35 -0500)]
Merge git://git.denx.de/u-boot-mpc85xx

9 years agoMerge branch 'master' of git://git.denx.de/u-boot-ti
Tom Rini [Mon, 8 Dec 2014 21:35:06 +0000 (16:35 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-ti

9 years agoMerge git://git.denx.de/u-boot-i2c
Tom Rini [Mon, 8 Dec 2014 21:35:05 +0000 (16:35 -0500)]
Merge git://git.denx.de/u-boot-i2c

9 years agoMerge branch 'master' of git://git.denx.de/u-boot-uniphier
Tom Rini [Mon, 8 Dec 2014 21:35:05 +0000 (16:35 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier

9 years agoARM: UniPhier: detect the number of flash banks at run-time
Masahiro Yamada [Fri, 5 Dec 2014 15:03:26 +0000 (00:03 +0900)]
ARM: UniPhier: detect the number of flash banks at run-time

Some UniPhier boards are equipped with an expansion slot that
some optional SRAM/NOR-flash cards can be attached to.  So, run-time
detection of the number of flash banks would be more user-friendly.

Until this commit, UniPhier boards have achieved this by (ab)using
board_flash_wp_on() because the boot failed if flash_size got zero.
Fortunately, this problem was solved by commit 70879a92561a (flash:
do not fail even if flash_size is zero).

Now it is possible to throw away such a tricky workaround.  This
commit also enables CONFIG_SYS_MAX_FLASH_BANKS_DETECT for further
refactoring.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: extend register area of init page table for PH1-sLD3
Masahiro Yamada [Fri, 5 Dec 2014 15:03:25 +0000 (00:03 +0900)]
ARM: UniPhier: extend register area of init page table for PH1-sLD3

0x20000000-0x2fffffff: assigned to ARM mpcore (sLD3 only)
0xf0000000-0xffffffff: assigned to Denali NAND controller (sLD3 only)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: add device tree sources for PH1-sLD3
Masahiro Yamada [Fri, 5 Dec 2014 15:03:24 +0000 (00:03 +0900)]
ARM: UniPhier: add device tree sources for PH1-sLD3

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: add more device nodes to device tree
Masahiro Yamada [Fri, 5 Dec 2014 15:03:23 +0000 (00:03 +0900)]
ARM: UniPhier: add more device nodes to device tree

Add I2C controller and NAND controller devices.  Fix indentation too.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Mon, 8 Dec 2014 14:36:26 +0000 (09:36 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sh

9 years agodoc/gitmail-rc: Update m68k alias
Tom Rini [Thu, 4 Dec 2014 16:27:08 +0000 (11:27 -0500)]
doc/gitmail-rc: Update m68k alias

Signed-off-by: Tom Rini <trini@ti.com>
9 years agokconfig: Fix warning "‘jump’ may be used uninitialized"
Peter Kümmel [Sat, 29 Nov 2014 08:26:04 +0000 (17:26 +0900)]
kconfig: Fix warning "‘jump’ may be used uninitialized"

Warning:
In file included from scripts/kconfig/zconf.tab.c:2537:0:
scripts/kconfig/menu.c: In function ‘get_symbol_str’:
scripts/kconfig/menu.c:590:18: warning: ‘jump’ may be used uninitialized in this function [-Wmaybe-uninitialized]
     jump->offset = strlen(r->s);

Simplifies the test logic because (head && local) means (jump != 0)
and makes GCC happy when checking if the jump pointer was initialized.

Signed-off-by: Peter Kümmel <syntheticpp@gmx.net>
Signed-off-by: Michal Marek <mmarek@suse.cz>
[ imported from Linux Kernel, commit 2d5603060967 ]
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agolibfdt: move CONFIG_OF_LIBFDT and CONFIG_FIT to lib/Makefile
Masahiro Yamada [Fri, 28 Nov 2014 02:13:28 +0000 (11:13 +0900)]
libfdt: move CONFIG_OF_LIBFDT and CONFIG_FIT to lib/Makefile

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agolibfdt: descend from lib/ to lib/libfdt/
Masahiro Yamada [Fri, 28 Nov 2014 02:13:27 +0000 (11:13 +0900)]
libfdt: descend from lib/ to lib/libfdt/

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agolib: bzip2: move bzip2 files to lib/bzip2/ directory
Masahiro Yamada [Fri, 28 Nov 2014 02:13:26 +0000 (11:13 +0900)]
lib: bzip2: move bzip2 files to lib/bzip2/ directory

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agofdt: Allow non-FDT kernels to boot when CONFIG_OF_LIBFDT is defined
Suriyan Ramasami [Thu, 27 Nov 2014 21:24:16 +0000 (13:24 -0800)]
fdt: Allow non-FDT kernels to boot when CONFIG_OF_LIBFDT is defined

The boot commands - bootz/bootm mandate a third argument which is the
address to the FDT blob. In cases where this argument is not specified,
boot fails with a message indicating a missing FDT.

This causes non-FDT kernels to fail to boot. This patch allows both FDT
and non-FDT kernels to boot by making the third parameter to the bootm/bootz
optional.

Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
[trini: Update again for covering appended DTB case after last revert in
this area]
Signed-off-by: Tom Rini <trini@ti.com>
9 years agoblackfin: include <linux/compiler.h> rather than define __iomem
Masahiro Yamada [Wed, 26 Nov 2014 07:02:54 +0000 (16:02 +0900)]
blackfin: include <linux/compiler.h> rather than define __iomem

The macro __iomem is defined in include/linux/compiler.h.
Let's include it rather than double __iomem defines.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
9 years agolinux/compat.h: remove redundant macro defines
Masahiro Yamada [Wed, 26 Nov 2014 07:02:53 +0000 (16:02 +0900)]
linux/compat.h: remove redundant macro defines

__user and __iomem are defined in include/linux/compiler.h.
MAX_ERRNO is defined in include/linux/err.h.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoReplace <compiler.h> with <linux/compiler.h>
Masahiro Yamada [Wed, 26 Nov 2014 07:00:58 +0000 (16:00 +0900)]
Replace <compiler.h> with <linux/compiler.h>

Including <linux/compiler.h> is enough for general use.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agogit-mailrc: fix mips alias
Daniel Schwierzeck [Wed, 19 Nov 2014 19:20:11 +0000 (20:20 +0100)]
git-mailrc: fix mips alias

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
9 years agoAdd Alison Wang m68k custodian email/alias
angelo@sysam.it [Tue, 25 Nov 2014 09:05:41 +0000 (10:05 +0100)]
Add Alison Wang m68k custodian email/alias

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
9 years agoAdd custodians to the m68k subsystem.
angelo@sysam.it [Mon, 24 Nov 2014 14:36:57 +0000 (15:36 +0100)]
Add custodians to the m68k subsystem.

9 years agoKbuild: introduce Makefile in arch/$ARCH/
Daniel Schwierzeck [Fri, 21 Nov 2014 22:51:33 +0000 (23:51 +0100)]
Kbuild: introduce Makefile in arch/$ARCH/

Introduce a Makefile under arch/$ARCH/ and include it in the
top Makefile (similar to Linux kernel). This allows further
refactoringi like moving architecture-specific code out of global
makefiles, deprecating config variables (CPU, CPUDIR, SOC) or
deprecating arch/$ARCH/config.mk.

In contrary to Linux kernel, U-Boot defines the ARCH variable by
Kconfig, thus the arch Makefile can only included conditionally
after the top config.mk.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoserial: pl01x: avoid pl01x type check two times
Vikas Manocha [Fri, 21 Nov 2014 18:34:23 +0000 (10:34 -0800)]
serial: pl01x: avoid pl01x type check two times

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoserial: pl01x: disable as per type of pl01x
Vikas Manocha [Fri, 21 Nov 2014 18:34:22 +0000 (10:34 -0800)]
serial: pl01x: disable as per type of pl01x

pl010 & pl011 have different control register offsets, setting it as per
the pl01x type.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoserial: pl01x: move all line control at same place
Vikas Manocha [Fri, 21 Nov 2014 18:34:21 +0000 (10:34 -0800)]
serial: pl01x: move all line control at same place

Receive line control uses same setting as transmit line control, also one lcrh
write is effective for both baud rate & receive line control internal update.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoserial: pl01x: fix pl011 baud rate configuration
Vikas Manocha [Fri, 21 Nov 2014 18:34:20 +0000 (10:34 -0800)]
serial: pl01x: fix pl011 baud rate configuration

UART_IBRD, UART_FBRD, and UART_LCR_H form a single 30-bit wide register which
is updated on a single write strobe generated by a UART_LCR_H write. So, to
internally update the content of UART_IBRD or UART_FBRD, a write to UART_LCR_H
must always be performed at the end.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoserial: pl01x: pass pl01x_type to set baudrate
Vikas Manocha [Fri, 21 Nov 2014 18:34:19 +0000 (10:34 -0800)]
serial: pl01x: pass pl01x_type to set baudrate

Although we were checking the pl01x type, seems like PL010 type was being
passed by mistake.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoimx6: remove redudant CONFIG_SPL_START_S_PATH define
Masahiro Yamada [Fri, 21 Nov 2014 02:50:10 +0000 (11:50 +0900)]
imx6: remove redudant CONFIG_SPL_START_S_PATH define

The CPU directory of IMX6 is arch/arm/cpu/armv7, so setting
CONFIG_SPL_START_S_PATH to arch/arm/cpu/armv7 is totally redundant.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Stefano Babic <sbabic@denx.de>
9 years agopowerpc: a3m071: remove redundant CONFIG_SPL_* defines
Masahiro Yamada [Fri, 21 Nov 2014 02:50:09 +0000 (11:50 +0900)]
powerpc: a3m071: remove redundant CONFIG_SPL_* defines

The CPU directory of this board is arch/powerpc/cpu/mpc5xxx.
Without the CONFIG_SPL_START_S_PATH and CONFIG_SPL_LDSCRIPT defines,
the same start.o and u-boot-spl.lds are selected by default.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
9 years agopowerpc: lwmon5: remove redundant CONFIG_SPL_* defines
Masahiro Yamada [Fri, 21 Nov 2014 02:50:08 +0000 (11:50 +0900)]
powerpc: lwmon5: remove redundant CONFIG_SPL_* defines

The CPU directory of this board is arch/powerpc/cpu/ppc4xx.
Without the CONFIG_SPL_START_S_PATH and CONFIG_SPL_LDSCRIPT defines,
the same start.o and u-boot-spl.lds are selected by default.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
9 years agopowerpc: mpc8xx: remove hermes board support
Masahiro Yamada [Fri, 21 Nov 2014 02:26:11 +0000 (11:26 +0900)]
powerpc: mpc8xx: remove hermes board support

This board sprinkles #ifdef(CONFIG_HERMES) over various global files
such as include/common.h, common/board_r.c, common/cmd_bdinfo.c.
Let's zap such an ill-behaved board.

It has not been converted to generic board yet and mpc8xx is old
enough.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
9 years agocmd_fuse: return CMD_RET_FAILURE on error
Hector Palacios [Thu, 20 Nov 2014 08:27:42 +0000 (09:27 +0100)]
cmd_fuse: return CMD_RET_FAILURE on error

Fuse drivers, like the mxs_ocotp.c, may return negative error codes but
the commands are only allowed to return CMD_RET_* enum values to the
shell, otherwise the following error appears:

"exit not allowed from main input shell."

Signed-off-by: Hector Palacios <hector.palacios@digi.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
9 years agoARM: rpi: support an environment
Stephen Warren [Thu, 20 Nov 2014 03:41:04 +0000 (20:41 -0700)]
ARM: rpi: support an environment

Enable ENV_IS_IN_FAT so that the environment can be stored persistently.
It's stored in the FAT partition that the RPi firmware requires. On most
RPis, this is on the SD card (which must be present in order for the
system to boot). On the CM this is on the built-in eMMC device.

Since we now have a persistent environment, there's no need to load
uEnv.txt at boot; we only did that to work around the lack of persistent
environment.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
9 years agoARM: rpi: rename rpi_b to rpi
Stephen Warren [Thu, 20 Nov 2014 03:41:03 +0000 (20:41 -0700)]
ARM: rpi: rename rpi_b to rpi

The U-Boot port runs on a variety of RPi models, not just the B. So,
rename the port to something slightly more generic.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
9 years agoARM: rpi_b: detect board revision
Stephen Warren [Wed, 19 Nov 2014 04:40:21 +0000 (21:40 -0700)]
ARM: rpi_b: detect board revision

Detect the board revision early during boot, and print the decoded
model name.

Eventually, this information can be used for tasks such as:
- Allowing/preventing USB device mode; some models have a USB device on-
  board so only host mode makes sense. Others connect the SoC directly
  to the USB connector, so device-mode might make sense.
- The on-board USB hub/Ethernet requires different GPIOs to enable it,
  although luckily the default appears to be fine so far.
- The compute module contains an on-board eMMC device, so we could store
  the environment there. Other models use an SD card and so don't support
  saving the environment (unless we store it in a file on the FAT boot
  partition...)

Set $fdtfile based on this information. At present, the mainline Linux
kernel doesn't contain a separate DTB for most models, but I hope that
will change soon.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
9 years agospl: if MMCSD_MODE_RAW fails, try MMCSD_MODE_FS, if available
Guillaume GARDET [Tue, 18 Nov 2014 09:44:46 +0000 (10:44 +0100)]
spl: if MMCSD_MODE_RAW fails, try MMCSD_MODE_FS, if available

In SPL MMC, boot modes are exclusive. So, if MMCSD_MODE_RAW fails, the board hangs. This patch allows to
try MMCSD_MODE_FS then, if available.

It has been tested on a pandaboard (rev. A3).

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@ti.com>
9 years agoMAINTAINERS: add me as a maintainer of UBI
Heiko Schocher [Tue, 18 Nov 2014 08:08:45 +0000 (09:08 +0100)]
MAINTAINERS: add me as a maintainer of UBI

Add me for UBI custodian.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
9 years agonet: bootp: as CONFIG_BOOTP_SERVERIP is defined, keep bootfile not changed
Wu, Josh [Tue, 18 Nov 2014 05:07:08 +0000 (13:07 +0800)]
net: bootp: as CONFIG_BOOTP_SERVERIP is defined, keep bootfile not changed

Currenly when CONFIG_BOOTP_SERVERIP is defined, the SERVERIP is not changed
when receive the BOOTP packet. But BOOTFILE is changed via BOOTP packet.

As we will load the BOOTFILE from SERVERIP, if the BOOTFILE is modified
by bootp packet but SERVERIP is not, that is not make sense.

This patch make SERVERIP and BOOTFILE be consistent. If we define the
CONFIG_BOOTP_SERVERIP, then SERVERIP and BOOTFILE will not changed by
BOOTP packet. Only IP address is changed.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
9 years agoget_maintainer.pl: fix source tree detection
Daniel Schwierzeck [Sun, 16 Nov 2014 19:30:11 +0000 (20:30 +0100)]
get_maintainer.pl: fix source tree detection

get_maintainer.pl always fails with following message:
./scripts/get_maintainer.pl: The current directory does not appear to be a linux kernel source tree.

This was caused by commit:

commit 548b310c68ac99a0330d8b56c797c09ff0742d1e
Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
Date:   Thu Oct 30 15:50:15 2014 +0900

    Remove the CREDITS file

    This file is not maintained these days.

    We use MAINTAINERS for the maintainership of the supported boards.
    For dead boards, we have some clues in doc/README.scrapyard and
    also imperishable history in git-log.

Remove CREDITS from source tree detection to fix this.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoFix console functions for U-Boot API
Simon Glass [Fri, 14 Nov 2014 03:51:12 +0000 (20:51 -0700)]
Fix console functions for U-Boot API

Commit 709ea54 made a subtle change to the way the U-Boot API jump table
is set up. So at present putc(), getc(), tstc() and puts() do not work
correctly from functions that use the U-Boot API.

Previously these were set to the stdio functions, but these now take a
parameter specifying which stdio device to use. Instead, we should change
them to use the global functions which do not have a parameter.

This is a slight change in behaviour. The functions will now output to
all selected stdio devices - for example putc() will output a character to
all devices selected by stdout. However in most cases there is only one,
and it isn't necessarily incorrect behaviour anyway.

The API version is not changed since it is compatible with what was there
before.

Reported-by: Martin Dorwig <dorwig@tektronik.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agospl: MMC U-Boot image load from raw partition
Paul Kocialkowski [Sat, 8 Nov 2014 22:14:56 +0000 (23:14 +0100)]
spl: MMC U-Boot image load from raw partition

Raw images of U-Boot can be stored inside MMC partitions, so it makes sense to
read the partition table, looking for a partition number instead of using
a fixed sector address.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@ti.com>
[trini: Only add mmc_load_image_raw_partition() when
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION to avoid warning, add missing
conversion in spl_mmc_load_image()]
Signed-off-by: Tom Rini <trini@ti.com>
9 years agoi2c: Correct spelling error
Mark Tomlinson [Mon, 1 Dec 2014 19:49:19 +0000 (08:49 +1300)]
i2c: Correct spelling error

"diconnect" and "disconnet" should both be "disconnect".

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
9 years agoi2c: Fix deselection of muxes
Mark Tomlinson [Mon, 1 Dec 2014 19:49:18 +0000 (08:49 +1300)]
i2c: Fix deselection of muxes

Due to an uninitialised variable, when muxes were deselected, any value
could be written to the mux control register. On the PCA9548, this could
result in multiple channels being selected, thus enabling multiple
pull-up resistors, and much bus capacitance.

The fix is simply to initialise the written value to zero.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
9 years agoARM: UniPhier: merge UniPhier config headers into a single file
Masahiro Yamada [Fri, 5 Dec 2014 15:03:22 +0000 (00:03 +0900)]
ARM: UniPhier: merge UniPhier config headers into a single file

Some configurations have been moved to Kconfig and the difference
among the config headers of UniPhier SoC variants is getting smaller
and smaller.  Now is a good time to merge them into a single file.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: move support card select to Kconfig
Masahiro Yamada [Fri, 5 Dec 2014 15:03:21 +0000 (00:03 +0900)]
ARM: UniPhier: move support card select to Kconfig

There are two kinds of expansion boards which are often used for
the UniPhier platform and they are only exclusively selectable.
It can be better described by the "choice" menu of Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: move CONFIG_UNIPHIER_SMP to Kconfig
Masahiro Yamada [Fri, 5 Dec 2014 15:03:20 +0000 (00:03 +0900)]
ARM: UniPhier: move CONFIG_UNIPHIER_SMP to Kconfig

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: use boot_is_swapped() macro for readability
Masahiro Yamada [Fri, 5 Dec 2014 15:03:19 +0000 (00:03 +0900)]
ARM: UniPhier: use boot_is_swapped() macro for readability

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: disable autostart by default
Masahiro Yamada [Fri, 5 Dec 2014 15:03:18 +0000 (00:03 +0900)]
ARM: UniPhier: disable autostart by default

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoflash: do not fail even if flash_size is zero
Masahiro Yamada [Fri, 5 Dec 2014 03:20:58 +0000 (12:20 +0900)]
flash: do not fail even if flash_size is zero

CONFIG_SYS_MAX_FLASH_BANKS_DETECT allows to determine the number of
flash banks at run-time, that is, there is a possibility that no flash
bank is found.  Even in such cases, it makes sense to continue the
boot process without any flash device.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
9 years agoARM: UniPhier: remove Denali NAND controller fixup code
Masahiro Yamada [Fri, 28 Nov 2014 06:19:32 +0000 (15:19 +0900)]
ARM: UniPhier: remove Denali NAND controller fixup code

This ugly work-around code is unnecessary since commit f09eb52b3ffc
(mtd: denali: set some registers after nand_scan_ident()).

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agopowerpc/hydra: fix judging condition of RGMII selection
Minghuan Lian [Mon, 24 Nov 2014 10:20:46 +0000 (18:20 +0800)]
powerpc/hydra: fix judging condition of RGMII selection

BRDCFG1_EMI1_SEL_MASK has been changed to 0x78, which contains
selection bits and connected status bit. So the Corresponding mux
value of RGMII is changed to BRDCFG1_EMI1_SEL_RGMII | BRDCFG1_EMI1_EN.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/hydra: Update MDIO mux fixups
Chunhe Lan [Tue, 18 Nov 2014 03:11:54 +0000 (11:11 +0800)]
powerpc/hydra: Update MDIO mux fixups

The new device trees use a more generic interface for
supporting muxing mdio buses. The mux property is thus
specified in "reg", rather than "fsl,hydra-mdio-muxval".

In order to support using old device trees, we keep the
old fixup in there. Linux will therefore see the both
properties, but will ignore fsl,hydra-mdio-muxval.

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/t4240rdb: enable eSDHC 3.3V support
Xiaobo Xie [Tue, 18 Nov 2014 01:12:24 +0000 (09:12 +0800)]
powerpc/t4240rdb: enable eSDHC 3.3V support

The SD supply Voltage was 3.3V on T4240RDB, so enabled 3.3V support for eSDHC.

Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Wujie Qiu <B49553@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/mpc85xx: use correct dma compatible for several SoCs
Tudor Laurentiu [Thu, 20 Nov 2014 10:09:31 +0000 (12:09 +0200)]
powerpc/mpc85xx: use correct dma compatible for several SoCs

Newer qoriq socs have an updated dma ip block with a
different compatible. Let's make sure we use the proper
string so that the dmas get their liodn.
In order to have the means to specify the compatible
string, the liodn setting macros were updated to receive
a new parameter for it.
The following SoCs were changed to use the new compatible:
 T1023/4, T1040, T2080/1, T4240, B4860.

Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoboard/t1024qds: add retimer support on t1024qds
Shengzhou Liu [Mon, 24 Nov 2014 09:18:28 +0000 (17:18 +0800)]
board/t1024qds: add retimer support on t1024qds

Initialize retimer for XFI on t1024qds.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agot1024qds: increase IO drive strength
Shengzhou Liu [Mon, 24 Nov 2014 09:12:00 +0000 (17:12 +0800)]
t1024qds: increase IO drive strength

Increase IO drive strength to fix FCS error on RGMII ports
on T1024QDS.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agonet/phy: enable serdes auto-negotiation for vsc8514 phy
Shengzhou Liu [Mon, 24 Nov 2014 09:11:59 +0000 (17:11 +0800)]
net/phy: enable serdes auto-negotiation for vsc8514 phy

VSC8514 QSGMII PHY requires enabling auto-negotiation,
otherwise it wouldn't work.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoboard/t1024qds: update pin multiplexing
Shengzhou Liu [Mon, 24 Nov 2014 09:11:58 +0000 (17:11 +0800)]
board/t1024qds: update pin multiplexing

Add multiplexing support among SPI flash, TDM riser card and SDXC.
it routes SPI pins to SPI flash by default.
Route SPI pins to SD slot if "adaptor=sdxc" is set in hwconfig.
Route SPI pins to TDM riser card and do fixup for dts if "pin_mux=tdm"
is set in hwconfig.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agonet/fman: update 10GEC to fit new SoC
Shengzhou Liu [Mon, 24 Nov 2014 09:11:57 +0000 (17:11 +0800)]
net/fman: update 10GEC to fit new SoC

fm_standard_init() initializes each 10G port by FM_TGEC_INFO_INITIALIZER.
but it needs different implementation of FM_TGEC_INFO_INITIALIZER on different SoCs.
on SoCs earlier(e.g. T4240, T2080), the notation between 10GEC and MAC as below:
10GEC1->MAC9, 10GEC2->MAC10, 10GEC3->MAC1, 10GEC4->MAC2
on SoCs later(e.g. T1024, etc), the notation between 10GEC and MAC as below:
10GEC1->MAC1, 10GEC2->MAC2

so we introduce CONFIG_FSL_FM_10GEC_REGULAR_NOTATION to fit the new SoCs on
which 10GEC enumeration is consistent with MAC enumeration.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/t1024rdb: Add T1024 RDB board support
Shengzhou Liu [Mon, 24 Nov 2014 09:11:56 +0000 (17:11 +0800)]
powerpc/t1024rdb: Add T1024 RDB board support

T1024RDB is a Freescale Reference Design Board that hosts the T1024 SoC.

T1024RDB board Overview
-----------------------
- T1024 SoC integrating two 64-bit e5500 cores up to 1.4GHz
- CoreNet fabric supporting coherent and noncoherent transactions with
  prioritization and bandwidth allocation
- 32-/64-bit DDR3L SDRAM memory controller with ECC and interleaving support
- Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC
- Ethernet interfaces:
  - Two 10M/100M/1G RGMII ports on-board
  - one 10Gbps XFI interface
- PCIe: Three PCIe controllers: one PCIe Slot and two Mini-PCIe connectors.
- SerDes: 4 lanes up to 10.3125GHz
- IFC: 128MB NOR Flash, 512MB NAND Flash and CPLD
- eSPI: 64MB N25Q512 SPI flash.
- Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
- USB: Two  Type-A USB2.0 ports with internal PHY
- eSDHC: Support SD, SDHC, SDXC and MMC/eMMC
- I2C: Four I2C controllers
- UART: Two UART serial ports

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: Fix ft_board_setup() type, fix MAINTAINERS for SECURE_BOOT
   Fix Kconfig by adding SUPPORT_SPL]
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/t1024qds: Add T1024 QDS board support
Shengzhou Liu [Mon, 24 Nov 2014 09:11:55 +0000 (17:11 +0800)]
powerpc/t1024qds: Add T1024 QDS board support

T1024QDS is a high-performance computing evaluation, development and
test platform for T1024 QorIQ Power Architecture processor.

T1024QDS board Overview
-----------------------
- T1024 SoC integrating two 64-bit e5500 cores up to 1.4GHz
- CoreNet fabric supporting coherent and noncoherent transactions with
  prioritization and bandwidth allocation
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support
- Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC
- Ethernet interfaces:
  - Two 10M/100M/1G RGMII ports on-board
  - Three 1G/2.5Gbps SGMII ports
  - Four 1Gbps QSGMII ports
  - one 10Gbps XFI or 10Base-KR interface
- SerDes: 4 lanes up to 10.3125GHz Supporting SGMII/QSGMII, XFI, PCIe, SATA and Aurora
- PCIe: Three PCI Express controllers with five PCIe slots.
- IFC: 128MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA
- Video: DIU supports video up to 1280x1024x32 bpp.
  - Chrontel CH7201 for HDMI connection.
  - TI DS90C387R for direct LCD connection.
  - Raw (not encoded) video connector for testing or other encoders.
- QUICC Engine block
  - 32-bit RISC controller for flexible support of the communications peripherals
  - Serial DMA channel for receive and transmit on all serial channels
  - Two universal communication controllers, supporting TDM, HDLC, and UART
- Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
- eSPI: Three SPI flash devices.
- SATA: one SATA 2.O.
- USB: Two USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB)
- eSDHC: Support SD, SDHC, SDXC and MMC/eMMC.
- I2C: Four I2C controllers.
- UART: Two UART on board.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: Fix ft_board_setup() type, fix MAINTAINERS for SECURE_BOOT
   Fix Kconfig by adding SUPPORT_SPL]
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/mpc85xx: Add T1024/T1023 SoC support
Shengzhou Liu [Mon, 24 Nov 2014 09:11:54 +0000 (17:11 +0800)]
powerpc/mpc85xx: Add T1024/T1023 SoC support

Add support for Freescale T1024/T1023 SoC.

The T1024 SoC includes the following function and features:
- Two 64-bit Power architecture e5500 cores, up to 1.4GHz
- private 256KB L2 cache each core and shared 256KB CoreNet platform cache (CPC)
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
- Four MAC for 1G/2.5G/10G network interfaces (RGMII, SGMII, QSGMII, XFI)
- High-speed peripheral interfaces
  - Three PCI Express 2.0 controllers
- Additional peripheral interfaces
  - One SATA 2.0 controller
  - Two USB 2.0 controllers with integrated PHY
  - Enhanced secure digital host controller (SD/eSDHC/eMMC)
  - Enhanced serial peripheral interface (eSPI)
  - Four I2C controllers
  - Four 2-pin UARTs or two 4-pin UARTs
  - Integrated Flash Controller supporting NAND and NOR flash
- Two 8-channel DMA engines
- Multicore programmable interrupt controller (PIC)
- LCD interface (DIU) with 12 bit dual data rate
- QUICC Engine block supporting TDM, HDLC, and UART
- Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
- Support for hardware virtualization and partitioning enforcement
- QorIQ Platform's Trust Architecture 2.0

Differences between T1024 and T1023:
  Feature         T1024  T1023
  QUICC Engine:   yes    no
  DIU:            yes    no
  Deep Sleep:     yes    no
  I2C controller: 4      3
  DDR:            64-bit 32-bit
  IFC:            32-bit 28-bit

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agodriver/ddr/fsl: Add workaround for faulty SPD
York Sun [Sat, 15 Nov 2014 01:17:50 +0000 (17:17 -0800)]
driver/ddr/fsl: Add workaround for faulty SPD

Some UDIMMs have faulty SPD with wrong mapping for DQ[36-39].
Using raw card spec in case this error is detected.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/mpc85xx: Update LIODN entries for T1040
Priyanka Jain [Tue, 18 Nov 2014 05:23:49 +0000 (10:53 +0530)]
powerpc/mpc85xx: Update LIODN entries for T1040

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/t2080: updating rcw for silicon v1.1
Shengzhou Liu [Fri, 14 Nov 2014 02:31:22 +0000 (10:31 +0800)]
powerpc/t2080: updating rcw for silicon v1.1

T2080 v1.1 requires different MEM_PLL_RAT from previous v1.0,
and also update core frequency to 1.8GHz for v1.1.
We reserve the support for T2080 v1.0 and enable v1.1 by default.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoB4860QDS: Enable enet port as per fsl_b4860_serdes2 string in hwconfig
Suresh Gupta [Thu, 13 Nov 2014 03:28:09 +0000 (11:28 +0800)]
B4860QDS: Enable enet port as per fsl_b4860_serdes2 string in hwconfig

In B4860QDS board SerDes2 lanes EFGH either go to SFP or AMC riser card
slot2 so either DTSEC3/DTSEC4 or TGEC1/TGEC2 should be accessible. This
Patch enables DTSEC3/DTSEC4 or TGEC1/TGEC2 on bases of user specified
string fsl_b4860_serdes2:sfp_amc=amc or fsl_b4860_serdes2:sfp_amc=sfp
respectively in hwconfig.

Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/b4860qds: add workaround for XFI
Shaohui Xie [Thu, 13 Nov 2014 03:27:49 +0000 (11:27 +0800)]
powerpc/b4860qds: add workaround for XFI

XFI does not work stable on current board, it's due to heat sink issue,
to make it work stable the board needs additional heat sink, enable two
XFI lanes only. Right now we do not have such an erratum for the issue,
so use a define CONFIG_SYS_FSL_B4860QDS_XFI_ERR to identify it.
The workaround will only be used in XFI protocols and only if the
hwconfig indicates that XFI is prefered.

A new VSC3308 config function is used instead of re-use the original
function, to avoid making the function complex and ugly.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoB4860QDS: Enable SFP or AMC on basis of hwconfig string
Suresh Gupta [Thu, 13 Nov 2014 03:27:32 +0000 (11:27 +0800)]
B4860QDS: Enable SFP or AMC on basis of hwconfig string

SerDes2 lanes EFGH either go to SFP or AMC riser card slot2.
By default AMC will be configured even if no hwconfig is specified.

To enable XFI via SFP use the below hwconfig:
fsl_b4860_serdes2:sfp_amc=sfp

Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@ffeescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/b4860qds: dtb fixup for xfi
Shaohui Xie [Thu, 13 Nov 2014 03:27:12 +0000 (11:27 +0800)]
powerpc/b4860qds: dtb fixup for xfi

Since xfi has no phy, we delete the property "phy-handle" and use
a "fixed-link" property for a xfi port.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/b4860qds: add xfi support
Shaohui Xie [Thu, 13 Nov 2014 03:26:19 +0000 (11:26 +0800)]
powerpc/b4860qds: add xfi support

We need following changes to make xfi work on B4:
1. set cross-point switch VSC3308 to use sfp config when running xfi;
2. add 10G interface check for xfi;
3. set phy address for xfi so the 10G ports can be registered by mdio;

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoB4860: Add alternate LC VCO serdes protocols support in board file
Shaveta Leekha [Wed, 12 Nov 2014 10:30:44 +0000 (16:00 +0530)]
B4860: Add alternate LC VCO serdes protocols support in board file

Add the support of newly added LC VCO SerDes protocols
for configuration of IDT and VSC crossbar

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoB4860QDS: SGMII related updates
Shaveta Leekha [Wed, 12 Nov 2014 10:30:22 +0000 (16:00 +0530)]
B4860QDS: SGMII related updates

- Enable SGMII support for 0x8d Serdes 2 protocol.
    - Correct Phy address for DTSECx for 0x8d/0xb2 Serdes 2 protocol.
    - Updated debug statement
    - Add Alternate LC VCO protocols(0x8d-->0x8c, 0xb2-->0xb1)
    - Rename onboard PHY address defines for more readability
    - Add these new Defines in B4860QDS.h file

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years ago85xx/b4860: Add alternate serdes protocols for B4860/B4420
Shaveta Leekha [Wed, 12 Nov 2014 10:32:25 +0000 (16:02 +0530)]
85xx/b4860: Add alternate serdes protocols for B4860/B4420

Addded Alternate options with LC VCO for following protocols:
0x02 --> 0x01
0x08 --> 0x07
0x18 --> 0x17
0x1E --> 0x1D
0x49 --> 0x48
0x6F --> 0x6E
0x9A --> 0x99
0x9E --> 0x9D

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/b4860: Enable law creation of MAPLE
Shaveta Leekha [Wed, 12 Nov 2014 08:53:26 +0000 (14:23 +0530)]
powerpc/b4860: Enable law creation of MAPLE

B4860, B4440, B4420 and B4220 have MAPLE, so enable law creation
for them only. Remove static LAW creation for MAPLE.

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/t104x: Convert to use generic board code
vijay rai [Tue, 18 Nov 2014 06:51:13 +0000 (12:21 +0530)]
powerpc/t104x: Convert to use generic board code

Convert T1040QDS and T1040RDB to use generic board code.

Signed-off-by: Vijay Rai <vijay.rai@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agonet/phy: Add support for CS4315/CS4340 PHY
Shengzhou Liu [Mon, 10 Nov 2014 10:32:29 +0000 (18:32 +0800)]
net/phy: Add support for CS4315/CS4340 PHY

Add support for Cortina CS4315/CS4340 10G PHY.
- This driver loads CS43xx firmware from NOR/NAND/SPI/SD device
  to initialize Cortina PHY.
- Cortina PHY has non-standard offset of PHY ID registers, thus
  we define own get_phy_id() to override default get_phy_id().
- To define macro CONFIG_PHY_CORTINA will enable this driver.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agodriver/ddr/fsl: Adjust timing_cfg_0 to better support two DDR slots
York Sun [Fri, 7 Nov 2014 20:14:36 +0000 (12:14 -0800)]
driver/ddr/fsl: Adjust timing_cfg_0 to better support two DDR slots

Increase write-to-write and read-to-read turnaround time for two-slot DDR
configurations. Previously only quad-rank and two dual-rank configurations
have this additional turnaround time. A recent test on two single-rank
DIMMs shows the shorter additional turnaround time is also needed.

Signed-off-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/c29xpcie: Enable configs to use generic board code
Chunhe Lan [Fri, 7 Nov 2014 07:39:56 +0000 (15:39 +0800)]
powerpc/c29xpcie: Enable configs to use generic board code

Add configs:
  o CONFIG_SYS_GENERIC_BOARD
  o CONFIG_DISPLAY_BOARDINFO
in C29XPCIE config header file to use U-boot generic
board code.

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/p1023rdb: Enable configs to use generic board code
Chunhe Lan [Fri, 7 Nov 2014 07:15:49 +0000 (15:15 +0800)]
powerpc/p1023rdb: Enable configs to use generic board code

Add configs:
  o CONFIG_SYS_GENERIC_BOARD
  o CONFIG_DISPLAY_BOARDINFO
in P1023RDB config header file to use U-boot generic
board code.

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agompc85xx/p1022ds: convert to generic board
Tang Yuantian [Fri, 7 Nov 2014 06:46:18 +0000 (14:46 +0800)]
mpc85xx/p1022ds: convert to generic board

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>