Jason Cooper [Mon, 3 Oct 2011 08:19:53 +0000 (13:49 +0530)]
dreamplug: initial board support.
Copied wholeheartedly from board/Marvell/guruplug and modified to add support
for SPI NOR flash.
CONFIG_MACH_DREAMPLUG defined in include/configs/dreamplug.h until Linus's
kernel.org tree adds it to mach-types.h. Once it trickles down, the definition
can be removed from include/configs/dreamplug.h.
Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
Currently there are two config options for building a U-boot binary for MX31PDK:
make mx31pdk_config
or,
make mx31pdk_nand_config
mx31pdk_config was developed first when no NAND SPL support was available for
MX31 and it requires that the U-boot binary is loaded into RAM via JTAG and it
forces SKIP_LOWLEVEL_INIT.
mx31pdk_nand_config was added later and it allows booting from NAND Flash.
Leave just one config option called mx31pdk so that it produces a binary that can boot from NAND Flash.
Helmut Raiger [Thu, 29 Sep 2011 05:45:03 +0000 (05:45 +0000)]
mx31: provide readable WEIM CS accessor
setup_weimcs() and some macros are added to support the setup
for i.MX31 WEIM chip selects. As a compromise between verbosity
and readability an ASCII-art'ish bit comment is used instead of
bitfields.
All i.MX31 boards have been patched to use this approach using a
helper program to verify the changes.
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
Simon Glass [Wed, 21 Sep 2011 12:40:06 +0000 (12:40 +0000)]
tegra2: Add more pinmux functions
This adds support for changing pinmux functions of pin groups. This is done
by defining a PMUX_FUNC_... enum which can be used to select the function for
each group using pinmux_set_func(). It is also possible to enable
pullup/pulldown, and the existing tristate functionality is retained.
Also provided is a means of configuring a list of pingroups by providing a
configuration table to pinmux_config_table().
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Wed, 21 Sep 2011 12:40:03 +0000 (12:40 +0000)]
tegra2: Clean up board code a little
This removes clock_init() and pinmux_init() which are names better suited
to those respective modules. By moving board_init_f() to the bottom of the
file we can remove the need for so many functions in the board.h header file.
The only clock/pinmux/gpio init we need to do prior to relocation is
for the UART.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
Donggeun Kim [Mon, 24 Oct 2011 21:15:28 +0000 (21:15 +0000)]
FAT: Add FAT write feature
In some cases, saving data in RAM as a file with FAT format is required.
This patch allows the file to be written in FAT formatted partition.
The usage is similar with reading a file.
First, fat_register_device function is called before file_fat_write function
in order to set target partition.
Then, file_fat_write function is invoked with desired file name,
start ram address for writing data, and file size.
Signed-off-by: Donggeun Kim <dg77.kim@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Simon Glass [Mon, 24 Oct 2011 19:15:34 +0000 (19:15 +0000)]
fdt: ARM: Add fdtcontroladdr to set device tree address in environment
This adds support for a new environment variable called 'fdtcontroladdr'. If
defined, the hex address is used as the address of the control fdt for U-Boot.
Note: I have not changed CONFIG_PRAM section as I already have an
outstanding patch on that.
Simon Glass [Mon, 24 Oct 2011 19:15:32 +0000 (19:15 +0000)]
fdt: add decode helper library
This library provides useful functions to drivers which want to use
the fdt to control their operation. Functions are provided to:
- look up and enumerate a device type (for example assigning i2c bus 0,
i2c bus 1, etc.)
- decode basic types from the fdt, like addresses and integers
While this library is not strictly necessary, it helps to minimise the
changes to a driver, in order to make it work under fdt control. Less
code is required, and so the barrier to switch drivers over is lower.
Additional functions to read arrays and GPIOs could be made available
here also.
Simon Glass [Mon, 24 Oct 2011 19:15:31 +0000 (19:15 +0000)]
fdt: Add support for a separate device tree (CONFIG_OF_SEPARATE)
This adds support for an FDT to be build as a separate binary file called
u-boot.dtb. This can be concatenated with the U-Boot binary to provide a
device tree located at run-time by U-Boot. The Makefile is modified to
provide this file in u-boot-dtb.bin.
Simon Glass [Sat, 15 Oct 2011 05:48:21 +0000 (05:48 +0000)]
fdt: Add support for embedded device tree (CONFIG_OF_EMBED)
This new option allows U-Boot to embed a binary device tree into its image
to allow run-time control of peripherals. This device tree is for U-Boot's
own use and is not necessarily the same one as is passed to the kernel.
The device tree compiler output should be placed in the $(obj)
rooted tree. Since $(OBJCOPY) insists on adding the path to the
generated symbol names, to ensure consistency it should be
invoked from the directory where the .dtb file is located and
given the input file name without the path.
This commit contains my entry for the ugliest Makefile / shell interaction
competition.
Simon Glass [Sat, 15 Oct 2011 05:48:20 +0000 (05:48 +0000)]
fdt: ARM: Add device tree control of U-Boot (CONFIG_OF_CONTROL)
This adds a device tree pointer to the global data. It can be set by
board code. A later commit will add support for making a device
tree binary blob available to U-Boot for run-time configuration.
Simon Glass [Mon, 24 Oct 2011 18:00:02 +0000 (18:00 +0000)]
net: tftpput: Rename TFTP to TFTPGET
This is a better name for this protocol. Also remove the typedef to keep
checkpatch happy, and move zeroing of NetBootFileXferSize a little
earlier since TFTPPUT will need to change this.
Simon Glass [Mon, 24 Oct 2011 18:00:01 +0000 (18:00 +0000)]
net: tftpput: Add support for receiving ICMP packets
ICMP packets can tell you when there is no server at the other end. It
is useful for tftp to figure this out, so that a quick error can be
displayed, rather than pointlessly retrying.
This adds an ICMP packet handler to the net interface.
Note: This is kind of guess work. The current code is preserved for
all RGMII related modes. It is different for flags=0 (GMII) and flags=5
(SGMII). The last case, SGMII, is successfully tested on
Altera's Terasic DE4.
Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
Currently part_efi.c allocates buffers for the gpt_header, the
legacy_mbr, and the pte (partition table entry) that may be
incorrectly aligned for DMA operations.
This patch uses ALLOC_CACHE_ALIGN_BUFFER for the stack allocated
buffers and memalign to replace the malloc of the pte.
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Mike Frysinger <vapier@gentoo.org>
Anton staaf [Tue, 4 Oct 2011 11:24:50 +0000 (11:24 +0000)]
mmc: dcache: allocate cache aligned buffers for ext_csd
Currently the mmc_change_freq and mmc_startup functions allocates
buffers on the stack that are passed down to the MMC device driver.
These buffers could be unaligned to the L1 dcache line size. This
causes problems when using DMA and with caches enabled.
This patch correctly cache alignes the buffers used for reading the
ext_csd data from an MMC device.
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Anton staaf [Mon, 3 Oct 2011 13:55:00 +0000 (13:55 +0000)]
ext2: Cache line aligned partial sector bounce buffer
Currently, if a device read request is done that does not begin or end
on a sector boundary a stack allocated bounce buffer is used to perform
the read, and then just the part of the sector that is needed is copied
into the users buffer. This stack allocation can mean that the bounce
buffer will not be aligned to the dcache line size. This is a problem
when caches are enabled because unaligned cache invalidates are not
safe.
This patch uses ALLOC_CACHE_ALIGN_BUFFER to create a stack allocated
cache line size aligned bounce buffer.
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Dave Liu <r63238@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Change-Id: I32e1594d90ef039137bb219b0f7ced55768744ff Acked-by: Mike Frysinger <vapier@gentoo.org>
Anton staaf [Mon, 3 Oct 2011 13:54:59 +0000 (13:54 +0000)]
mmc: dcache: allocate cache aligned buffer for scr and switch_status
Currently the sd_change_freq function allocates two buffers on the
stack that it passes down to the MMC device driver. These buffers
could be unaligned to the L1 dcache line size. This causes problems
when using DMA and with caches enabled.
This patch correctly cache alignes the buffers used for reading the
scr register and switch status values from an MMC device.
Change-Id: Ifa8414f572ef907681bd2d5ff3950285a215357d Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Mike Frysinger <vapier@gentoo.org>
Anton staaf [Mon, 3 Oct 2011 13:54:58 +0000 (13:54 +0000)]
tegra: define CONFIG_SYS_CACHELINE_SIZE for tegra
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Tom Warren <twarren.nvidia@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Change-Id: I5c4bcfc0bfe59158ff249fe3be6640eec6d3cc76 Acked-by: Mike Frysinger <vapier@gentoo.org>
Anton staaf [Wed, 12 Oct 2011 13:55:59 +0000 (13:55 +0000)]
cache: add ALLOC_CACHE_ALIGN_BUFFER macro
This macro is used to allocate cache line size aligned stack
buffers for use with DMA hardware.
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Aneesh V <aneesh@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Mon, 24 Oct 2011 19:14:42 +0000 (21:14 +0200)]
Revert "km_arm: enable POST for these boards"
This reverts commit a2da616311151ecfab8b8fcc510686fc3c0c9a21.
THis was applied by accident - a more recent version of this change
was already present, see commit 9400f8f 2011-10-05 22:03:11 +0200 km_arm: enable POST for these boards
Simon Glass [Sun, 23 Oct 2011 17:44:35 +0000 (17:44 +0000)]
arm: Correct build error introduced by getenv_ulong() patch
Commit dc8bbea removed a local variable that is used in most ARM boards.
Since we want to avoid an 'unused variable' warning with later compilers,
and the #ifdef logic of whether this variable is required is bit painful,
this declares the variable local to the block of code that needs it.
Stefano Babic [Mon, 17 Oct 2011 00:07:43 +0000 (00:07 +0000)]
mkimage: adding support for Davinci AIS image
Some Davinci processors supports the Application
Image Script (AIS) boot process. The patch adds the generation
of the AIS image inside the mkimage tool to make possible
to generate a bootable U-boot without external tools
(TI Davinci AIS Generator).
Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Wolfgang Denk <wd@denx.de>
Mike Frysinger [Sun, 16 Oct 2011 10:04:10 +0000 (10:04 +0000)]
net: ns9750: drop !NET_MULTI driver
Only one board uses this driver (ns9750dev), but the board doesn't seem
to have an entry to actually build it in the Makefile/boards.cfg, so just
delete net support from its board config.
Bernhard Kaindl [Sun, 16 Oct 2011 00:07:08 +0000 (00:07 +0000)]
powerpc/lib/board.c: Call run_post(POST_ROM) before relocating
The call to run_post(POST_ROM) which can run the POST memory test
is currently called too late when gd has already been copied to DRAM.
This results in failure to boot Linux after a POST_ROM memory test
tested all RAM while gd was already relocated to DRAM due to gd being
overwritten by the POST_ROM memory test.
Support this by moving the call to run_post(POST_ROM) to run earlier,
before U-Boot has started to move data to DRAM (from late board_init_f
to early board_init_f) where DRAM is initialized, but not used yet.
This allows that an POST memory test can test the whole DRAM,
including the area where the board info struct is located.
Signed-off-by: Bernhard Kaindl <bernhard.kaindl@thalesgroup.com> Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
Bernhard Kaindl [Sat, 15 Oct 2011 23:59:22 +0000 (23:59 +0000)]
net/dns.c: Fix endian conversion for big-endian in dns command
net/dns.c used endian conversion macros wrongly (shorts in reply
were put swapped into CPU, and then ntohs() was used to swap it
back, which broke on big-endian).
Fix this by using the correct linux conversion macro for reading
a unaligned short in network byte order: get_unaligned_be16()
Thanks to Mike Frysinger pointing at the best macro to use.
Tested on big and little endian qemu boards (mips and versatile)
Signed-off-by: Bernhard Kaindl <bernhard.kaindl@thalesgroup.com> Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl> Cc: Robin Getz <rgetz@blackfin.uclinux.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
Anton Staaf [Mon, 17 Oct 2011 23:46:13 +0000 (16:46 -0700)]
cache: include asm/cache.h for ARCH_DMA_MINALIGN definition
ARCH_DMA_MINALIGN will be used to allocate DMA buffers that are
aligned correctly. In all current cases this means that the DMA
buffer will be aligned to at least the L1 data cache line size of
the configured architecture. If the board configuration file
does not specify the architecture L1 data cache line size then the
maximum line size of the architecture is used to align DMA buffers.
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Laurence Withers <lwithers@guralp.com>
Anton Staaf [Mon, 17 Oct 2011 23:46:06 +0000 (16:46 -0700)]
powerpc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
Signed-off-by: Anton Staaf <robotboy@chromium.org> Acked-by: Stefan Roese <sr@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de>
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