]> git.sur5r.net Git - u-boot/log
u-boot
7 years agofs: Kconfig: Add a separate config for FS_CBFS
Simon Glass [Thu, 27 Apr 2017 04:27:59 +0000 (22:27 -0600)]
fs: Kconfig: Add a separate config for FS_CBFS

Rather than using CMD_CBFS for both the filesystem and its command, we
should have a separate option for each. This allows us to enable CBFS
support without the command, if desired, which reduces U-Boot's size
slightly.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply FS_CBFS on SYS_COREBOOT]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agofs: Convert CONFIG_CMD_CBFS to Kconfig
Simon Glass [Thu, 27 Apr 2017 04:27:58 +0000 (22:27 -0600)]
fs: Convert CONFIG_CMD_CBFS to Kconfig

This converts the following to Kconfig:
   CONFIG_CMD_CBFS

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply CMD_CBFS on SYS_COREBOOT]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoConvert CONFIG_SYS_WHITE_ON_BLACK to Kconfig
Simon Glass [Thu, 27 Apr 2017 04:27:57 +0000 (22:27 -0600)]
Convert CONFIG_SYS_WHITE_ON_BLACK to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_WHITE_ON_BLACK

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Make this default y on various SoCs]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoConvert CONFIG_CMD_BSP to Kconfig
Simon Glass [Thu, 27 Apr 2017 04:27:56 +0000 (22:27 -0600)]
Convert CONFIG_CMD_BSP to Kconfig

This converts the following to Kconfig:
   CONFIG_CMD_BSP

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoConvert CONFIG_CMD_BMP to Kconfig
Simon Glass [Thu, 27 Apr 2017 04:27:55 +0000 (22:27 -0600)]
Convert CONFIG_CMD_BMP to Kconfig

This converts the following to Kconfig:
   CONFIG_CMD_BMP

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add depends on LCD || DM_VIDEO || VIDEO]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoConvert CONFIG_CMD_BMODE to Kconfig
Simon Glass [Thu, 27 Apr 2017 04:27:54 +0000 (22:27 -0600)]
Convert CONFIG_CMD_BMODE to Kconfig

This converts the following to Kconfig:
   CONFIG_CMD_BMODE

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Make this default y and depend on mx5/6/7]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoConvert CONFIG_CMD_BLOB to Kconfig
Simon Glass [Thu, 27 Apr 2017 04:27:53 +0000 (22:27 -0600)]
Convert CONFIG_CMD_BLOB to Kconfig

This converts the following to Kconfig:
   CONFIG_CMD_BLOB

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add imply CMD_BLOB under CHAIN_OF_TRUST]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoConvert CONFIG_CMD_BEDBUG to Kconfig
Simon Glass [Thu, 27 Apr 2017 04:27:52 +0000 (22:27 -0600)]
Convert CONFIG_CMD_BEDBUG to Kconfig

This converts the following to Kconfig:
   CONFIG_CMD_BEDBUG

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoConvert CONFIG_CMD_BAT to Kconfig
Simon Glass [Thu, 27 Apr 2017 04:27:51 +0000 (22:27 -0600)]
Convert CONFIG_CMD_BAT to Kconfig

This converts the following to Kconfig:
   CONFIG_CMD_BAT

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoti816x_evm: Change CONFIG_CMD_ASKEN to CONFIG_CMD_ASKENV
Simon Glass [Thu, 27 Apr 2017 04:27:50 +0000 (22:27 -0600)]
ti816x_evm: Change CONFIG_CMD_ASKEN to CONFIG_CMD_ASKENV

This looks like a typo. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoConvert CONFIG_CMD_AES et al to Kconfig
Simon Glass [Thu, 27 Apr 2017 04:27:49 +0000 (22:27 -0600)]
Convert CONFIG_CMD_AES et al to Kconfig

This converts the following to Kconfig:
   CONFIG_CMD_AES
   CONFIG_AES

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add select AES to CMD_AES]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agopower: Drop CONFIG_PMIC
Simon Glass [Thu, 27 Apr 2017 04:27:48 +0000 (22:27 -0600)]
power: Drop CONFIG_PMIC

This option is not used in U-Boot. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agopower: Drop CONFIG_I2C_PMIC
Simon Glass [Thu, 27 Apr 2017 04:27:47 +0000 (22:27 -0600)]
power: Drop CONFIG_I2C_PMIC

This is only used by one board and should not be a CONFIG option. Instead
it should use the driver model pmic framework. For now, just move the
setting into the only board that uses it.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agopower: Convert CONFIG_PMIC_AS3722 to Kconfig
Simon Glass [Thu, 27 Apr 2017 04:27:46 +0000 (22:27 -0600)]
power: Convert CONFIG_PMIC_AS3722 to Kconfig

This converts the following to Kconfig:
   CONFIG_PMIC_AS3722

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agopower: Move as3722 pmic to pmic/ directory
Simon Glass [Thu, 27 Apr 2017 04:27:45 +0000 (22:27 -0600)]
power: Move as3722 pmic to pmic/ directory

Most of the PMICs are in the drivers/power/pmic/ directory. Move this one
there.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agopower: Rename CONFIG_AS3722_POWER to CONFIG_PMIC_AS3722
Simon Glass [Thu, 27 Apr 2017 04:27:44 +0000 (22:27 -0600)]
power: Rename CONFIG_AS3722_POWER to CONFIG_PMIC_AS3722

Before converting this to Kconfig, rename it to match the other PMICs.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoarm: Re-sync ARCH_MX5 / MX51 / MX53 CONFIG options
Tom Rini [Sat, 29 Apr 2017 23:20:27 +0000 (19:20 -0400)]
arm: Re-sync ARCH_MX5 / MX51 / MX53 CONFIG options

A few boards had not been fully re-synced with CONFIG_ARCH_MX5 / CONFIG_MX51 /
CONFIG_MX53 being in Kconfig.  Do so now.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoMerge tag 'xilinx-fixes-for-v2017.05' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Thu, 27 Apr 2017 20:49:19 +0000 (16:49 -0400)]
Merge tag 'xilinx-fixes-for-v2017.05' of git://www.denx.de/git/u-boot-microblaze

Xilinx fixes for v2017.05

- Fix usbotg on Miami board
- Cleanup zc1751 defconfig

7 years agoext4: Fix comparision of unsigned expression with < 0
Lokesh Vutla [Wed, 26 Apr 2017 11:28:22 +0000 (16:58 +0530)]
ext4: Fix comparision of unsigned expression with < 0

In file ext4fs.c funtion ext4fs_read_file() compares an
unsigned expression with < 0 like below

lbaint_t blknr;
blknr = read_allocated_block(&(node->inode), i);
if (blknr < 0)
return -1;

blknr is of type ulong/uint64_t. read_allocated_block() returns
long int. So comparing blknr with < 0 will always be false. Instead
declare blknr as long int.

Similarly ext4/dev.c does a similar comparison. Drop the redundant
comparison.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoMAINTAINERS: Update for Keystone2 secure devices
Lokesh Vutla [Wed, 26 Apr 2017 06:05:19 +0000 (11:35 +0530)]
MAINTAINERS: Update for Keystone2 secure devices

Update Keystone2 secure device configs under
"TI SYSTEM SECURITY". Without this buildman keeps complaining
about the status of these boards.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Andrew F. Davis <afd@ti.com>
7 years agoarm/lib/bootm.c: keep ARM v7M in thumb mode during boot_jump_linux()
Patrice Chotard [Tue, 25 Apr 2017 09:07:46 +0000 (11:07 +0200)]
arm/lib/bootm.c: keep ARM v7M in thumb mode during boot_jump_linux()

On ARM v7M, the processor will return to ARM mode when executing
a blx instruction with bit 0 of the address == 0. Always set it
to 1 to stay in thumb mode.

Tested on STM32f746-disco board

Similar commit:
f99993c10882f7dc8ec35993d5febe59aac01e6a
Author: Matt Porter <mporter@konsulko.com>

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
7 years agoARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig
Masahiro Yamada [Tue, 25 Apr 2017 04:10:11 +0000 (13:10 +0900)]
ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig

In Linux, CONFIG_ARCH_OMAP2PLUS is used for OMAP2 or later SoCs.
Rename CONFIG_ARCH_OMAP2 to CONFIG_ARCH_OMAP2PLUS to follow this
naming.

Move the OMAP2+ board/SoC choice down to mach-omap2/Kconfig to slim
down the arch/arm/Kconfig level.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoadd Kconfig for fsuuid command
Josua Mayer [Mon, 24 Apr 2017 08:10:45 +0000 (10:10 +0200)]
add Kconfig for fsuuid command

CONFIG_CMD_FS_UUID was neither whitelisted, nor was it declared in
Kconfig.
Now it can be enabled in .config and defconfig as expected.

Signed-off-by: Josua Mayer <josua.mayer97@gmail.com>
7 years agoKconfig: Enable FIT support by default for TI platforms
Andrew F. Davis [Fri, 21 Apr 2017 15:01:28 +0000 (10:01 -0500)]
Kconfig: Enable FIT support by default for TI platforms

Almost all TI defconfigs enable this already, add this as a default
and remove the explicit assignment.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agotravisci: Add support for ARC
Alexey Brodkin [Fri, 21 Apr 2017 10:35:43 +0000 (13:35 +0300)]
travisci: Add support for ARC

Finally adding support for ARC boards in TravisCI.

To build for ARC boards we need to install Synopsys prebuilt toolchain
which we do here.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: dra71: Fix selection of OPPs
Lokesh Vutla [Thu, 20 Apr 2017 08:37:52 +0000 (14:07 +0530)]
board: dra71: Fix selection of OPPs

As per the DM[1] Dated June 2016–Revised February 2017, Table 5-3,
DRA71 supports the following OPPs for various voltage domains:

VDD_MPU: OPP_NOM
VDD_CORE: OPP_NOM
VDD_GPU: OPP_NOM
VDD_DSPEVE: OPP_NOM, OPP_HIGH
VDD_IVA: OPP_NOM, OPP_HIGH

This patch add support for selection of the above OPPs instead of
using OPP_NOM for all voltage domains.

[1] http://www.ti.com/lit/ds/symlink/dra718.pdf

Reported-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agopinctrl: Kconfig: sort pinctrl config options to prevent future clutter
Philipp Tomsich [Wed, 19 Apr 2017 14:46:37 +0000 (16:46 +0200)]
pinctrl: Kconfig: sort pinctrl config options to prevent future clutter

This originally started out as
     "pinctrl: Kconfig: reorder to keep Rockchip options together"
and tried to keep the Rockchip-related config options together.

However, we now rewrite all chip-specific driver selections to start
with CONFIG_PINCTRL_ (with the inadvertent changes to related
Makefiles) and sort those alphabetically. And as this already means
touching most of the file, we also reformat the help text to not exceed
80 characters (but make full use of those 80 characters).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: mkimage: remove (left-over) assignment w/o effect [coverity]
Philipp Tomsich [Wed, 19 Apr 2017 13:09:04 +0000 (15:09 +0200)]
rockchip: mkimage: remove (left-over) assignment w/o effect [coverity]

An assignment (of a value to itself) was left over (after removing and
addition from the line) from moving the common padding code into
rkcommon_vrec_header.

This change removes this to avoid a spurious warning in static code
analysis (i.e. Coverity).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Coverity (CID: 161418)
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoclean-up: Remove uselsess mentions of CONFIG_COMMAND_HISTORY
Alexey Brodkin [Tue, 18 Apr 2017 19:09:10 +0000 (22:09 +0300)]
clean-up: Remove uselsess mentions of CONFIG_COMMAND_HISTORY

These were reminders that somehow slipped through the cracks
or were erroneously introduced after previous clean-ups.

Getting rid of then once again. Hopefully for good now :)

Where missing and appropriate replace with CONFIG_CMDLINE_EDITING
which really enables shell history as of now.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Peter Griffin <peter.griffin@linaro.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Steve Rae <steve.rae@raedomain.com>
Cc: Jon Mason <jon.mason@broadcom.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoarm: Warn that starting with v2018.01 gcc-6 or later is required
Tom Rini [Mon, 17 Apr 2017 13:18:00 +0000 (09:18 -0400)]
arm: Warn that starting with v2018.01 gcc-6 or later is required

There are more and more cases where if we do not use gcc-6.0 or later we
run into problems where our binaries are too large for the targets.
Given the prevalence of gcc-6.0 or later toolchains at this point in
time, we give notice now that starting with v2018.01 we will require
gcc-6 (or later) for ARM.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agodm: sandbox: pwm: Add a basic pwm test
Simon Glass [Mon, 17 Apr 2017 03:01:11 +0000 (21:01 -0600)]
dm: sandbox: pwm: Add a basic pwm test

Unfortunately a test for the PWM uclass was not included when it was
submitted. This was noticed when trying to add more functionality:

   http://patchwork.ozlabs.org/patch/748172/

Add a simple test to get us started.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoconfigs: keystone2: Standardise U-boot prompt
Lokesh Vutla [Sun, 16 Apr 2017 05:51:28 +0000 (11:21 +0530)]
configs: keystone2: Standardise U-boot prompt

Standardise U-Boot prompt on all keystone2 platforms
instead of platform specific prompt.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoOMAP3: Correct name of omap34xx_gpios when using DM_GPIO
Adam Ford [Sun, 9 Apr 2017 12:35:12 +0000 (07:35 -0500)]
OMAP3: Correct name of omap34xx_gpios when using DM_GPIO

The name of the gpio bank under DM_GPIO appear to be a copy-paste error.
This changes the name of the gpio bank from am33xx_gpios to omap34xx_gpios.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoomap3: i2c: correct register
Adam Ford [Sat, 8 Apr 2017 22:34:29 +0000 (17:34 -0500)]
omap3: i2c: correct register

The register names and offset were not correct as per the TRM for OMAP3530
and OMAP3630.  Correct the naing and offsets per the documentation

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
7 years agoarm64: zynqmp: Sync defconfig with Kconfig
Michal Simek [Thu, 20 Apr 2017 09:47:21 +0000 (11:47 +0200)]
arm64: zynqmp: Sync defconfig with Kconfig

Remove option which depends on MMC controller which is disabled for dc2.
Savedefconfig is removing it because of new dependencies.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
7 years agozynq-topic-miami.dts: Add usbotg0 alias to make USB actually work
Mike Looijmans [Mon, 10 Apr 2017 06:56:22 +0000 (08:56 +0200)]
zynq-topic-miami.dts: Add usbotg0 alias to make USB actually work

Fixes the following problem:
zynq-uboot> run dfu_ram
Setting bus to 1
g_dnl_register: failed!, error: -19

The cause appears to be that the USB framework is looking for a usbotg aliases,
so add the alias to point to our USB device.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
7 years agoMerge git://git.denx.de/u-boot-sunxi
Tom Rini [Tue, 25 Apr 2017 20:12:42 +0000 (16:12 -0400)]
Merge git://git.denx.de/u-boot-sunxi

7 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Tue, 25 Apr 2017 20:11:35 +0000 (16:11 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Tue, 25 Apr 2017 13:00:18 +0000 (09:00 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Tue, 25 Apr 2017 12:59:56 +0000 (08:59 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

7 years agoehci-ppc4xx: Prepare for usage of readl()/writel() accessors
Alexey Brodkin [Mon, 17 Apr 2017 16:13:17 +0000 (19:13 +0300)]
ehci-ppc4xx: Prepare for usage of readl()/writel() accessors

We used to have opencoded ehci_readl()/writel() which required no
external functions to be called.

Now with attempt to switch to generic readl()/writel() accessors
we see a missing declaration of those accessors in ehci-ppc4xx.
Something like that happens if applied
http://patchwork.ozlabs.org/patch/726714/:
---------------->8---------------
  CC      drivers/usb/host/ehci-ppc4xx.o
drivers/usb/host/ehci-ppc4xx.c: In function 'ehci_hcd_init':
drivers/usb/host/ehci-ppc4xx.c:23:3: warning: implicit declaration of function 'readl' [-Wimplicit-function-declaration]
   HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
   ^
---------------->8---------------

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agousb: musb: avoid out of bound access in udc_setup_ep
Heinrich Schuchardt [Sat, 15 Apr 2017 12:29:54 +0000 (14:29 +0200)]
usb: musb: avoid out of bound access in udc_setup_ep

For id = 15 an out of bound access occurs in udc_setup_ep().
Increase the size of epinfo[] from 30 to 32 to encompass
ids 0..15.

The problem was highlighted by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
7 years agomusb: properly detect failed initialization of controller
Heinrich Schuchardt [Sat, 15 Apr 2017 11:46:22 +0000 (13:46 +0200)]
musb: properly detect failed initialization of controller

We want to check the result of musb_init_controller
and not the address were the result is stored.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
7 years agoarm: socfpga: add cyclone5 based de10-nano board
Dalon Westergreen [Tue, 18 Apr 2017 15:11:16 +0000 (08:11 -0700)]
arm: socfpga: add cyclone5 based de10-nano board

Add support for the Terasic DE10-Nano board.  The board
is based on the DE0-Nano-Soc board but adds a larger FPGA
and an HDMI output.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
7 years agosunxi: fix the default value of CONS_INDEX on non-A23/A33 SUN8I
Icenowy Zheng [Mon, 24 Apr 2017 17:39:51 +0000 (01:39 +0800)]
sunxi: fix the default value of CONS_INDEX on non-A23/A33 SUN8I

Only A23/A33 in SUN8I want a default value of CONS_INDEX of 5, for other
chips the default value is 1 like other Allwinner SoCs.

Fix this default value.

The original wrong value has lead to wrong console on H3 Orange Pi
boards.

Fixes: 7095f8641863 ("sunxi: Convert CONS_INDEX to Kconfig")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-uniphier
Tom Rini [Tue, 25 Apr 2017 01:08:42 +0000 (21:08 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-mips
Tom Rini [Tue, 25 Apr 2017 01:08:10 +0000 (21:08 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips

7 years agoarmv8: layerscape: Fix DDR size calcuation for SPL build
York Sun [Thu, 20 Apr 2017 23:04:23 +0000 (16:04 -0700)]
armv8: layerscape: Fix DDR size calcuation for SPL build

Commit 088454cd dropped return value from initram(), setting
gd->ram_size directly. Three boards were missed for SPL boot.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarm: psci: make psci usable on single core socs
Yuantian Tang [Wed, 19 Apr 2017 05:27:39 +0000 (13:27 +0800)]
arm: psci: make psci usable on single core socs

PSCI can be used on both multiple and single core socs. Current
implementation only allows PSCI to work on multiple core socs.
This patch removes this restriction so that PSCI can work on
single core socs as well.

Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls104xardb: Secure Boot: enable PPA support for eMMC/SD and NAND boot
Sumit Garg [Wed, 19 Apr 2017 23:39:13 +0000 (05:09 +0530)]
armv8: ls104xardb: Secure Boot: enable PPA support for eMMC/SD and NAND boot

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: fsl-layerscape: Add validation of PPA image from NAND and SD
Sumit Garg [Wed, 19 Apr 2017 23:39:12 +0000 (05:09 +0530)]
armv8: fsl-layerscape: Add validation of PPA image from NAND and SD

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: fsl-layerscape: Support loading PPA header from eMMC/SD and NAND Flash
Sumit Garg [Wed, 19 Apr 2017 23:39:11 +0000 (05:09 +0530)]
armv8: fsl-layerscape: Support loading PPA header from eMMC/SD and NAND Flash

Add Kconfig option to support loading PPA header from eMMC/SD and
NAND Flash.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1046aqds: Integrate FSL PPA
Hou Zhiqiang [Fri, 14 Apr 2017 06:48:23 +0000 (14:48 +0800)]
armv8: ls1046aqds: Integrate FSL PPA

The PPA is a EL3 firmware, which support PSCI, hotplug,
power-management features etc.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1043aqds: enable FSL PPA
Hou Zhiqiang [Fri, 14 Apr 2017 06:48:22 +0000 (14:48 +0800)]
armv8: ls1043aqds: enable FSL PPA

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1043aqds: Integrate FSL PPA
Hou Zhiqiang [Fri, 14 Apr 2017 06:48:21 +0000 (14:48 +0800)]
armv8: ls1043aqds: Integrate FSL PPA

The PPA is a EL3 firmware, which support PSCI, hotplug,
power-management features etc.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls2080ardb: Add phy number for serdes1 protocol 0x4b
Santan Kumar [Thu, 13 Apr 2017 10:01:09 +0000 (15:31 +0530)]
armv8: ls2080ardb: Add phy number for serdes1 protocol 0x4b

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarm: ls1021atwr: Enable RGMII TX/RX clock internal delay for AR8033
Alison Wang [Tue, 11 Apr 2017 07:02:13 +0000 (15:02 +0800)]
arm: ls1021atwr: Enable RGMII TX/RX clock internal delay for AR8033

Since commit ce412b7, RGMII TX clock internal delay is not enabled
for AR8033 unconditionally. On LS1021ATWR board, the third port
eTSEC3 uses AR8033 in RGMII mode. The TX/RX internal delay needs to
be enabled.

This patch will set PHY_INTERFACE_MODE_RGMII_ID to enable RGMII TX/RX
clock internal delay for AR8033 on the third port.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agosunxi: Fix arm64 fdtfile variable
Andreas Färber [Fri, 14 Apr 2017 16:44:47 +0000 (18:44 +0200)]
sunxi: Fix arm64 fdtfile variable

Currently $fdtfile is constructed from CONFIG_DEFAULT_TREE, containing
the filename. However on arm64 that file is located in an allwinner
subdirectory.

To avoid the need for users/distros symlinking the .dtb files, prepend
the vendor directory for ARM64.

This aligns Pine64 with other boards such as Raspberry Pi 3.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agomips: qemu-mips/64: Expand malloc pool for CONFIG_SYS_BOOTPARAMS_LEN
Kyle Edwards [Thu, 13 Apr 2017 02:42:32 +0000 (22:42 -0400)]
mips: qemu-mips/64: Expand malloc pool for CONFIG_SYS_BOOTPARAMS_LEN

Before this patch, CONFIG_SYS_BOOTPARAMS_LEN was the same size as
CONFIG_SYS_MALLOC_LEN. So, if malloc() had previously been called, and
initr_malloc_bootparams() was called, it would fail with an out-of-
memory error. This patch fixes this issue by expanding the malloc pool
to 256KB.

Signed-off-by: Kyle Edwards <kyleedwardsny@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
7 years agomips: qemu-mips/64: Remove obsolete CONFIG_SYS_MONITOR_LEN from config
Kyle Edwards [Thu, 13 Apr 2017 02:42:31 +0000 (22:42 -0400)]
mips: qemu-mips/64: Remove obsolete CONFIG_SYS_MONITOR_LEN from config

This fixes an issue with the saveenv command causing U-Boot to no
longer work on the QEMU Mips pseudoboard. Because the offset of the
environment was being determined by CONFIG_SYS_MONITOR_LEN, and this
value was less than the actual size of U-Boot, saveenv was overwriting
parts of the U-Boot code. Because CONFIG_SYS_MONITOR_LEN is no longer
used on MIPS, this patch removes it and places the environment at the
end of the pseudoboard's 4MB flash.

Signed-off-by: Kyle Edwards <kyleedwardsny@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
7 years agosunxi: add support for Lichee Pi Zero
Icenowy Zheng [Sat, 8 Apr 2017 07:30:14 +0000 (15:30 +0800)]
sunxi: add support for Lichee Pi Zero

Lichee Pi Zero is a development board with a V3s SoC, which features
64MiB DRAM co-packaged within the SoC, a TF slot, a SPI NOR slot (not
soldered in production batch), a 40-pin RGB LCD connector and some extra
pins available as 2.54mm pins or stamp holes.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: add DTSI file for V3s
Icenowy Zheng [Sat, 8 Apr 2017 07:30:13 +0000 (15:30 +0800)]
sunxi: add DTSI file for V3s

As we have now V3s support in board code, the V3s DTSI file should also
be added.

Add also some CCU include headers to satisfy the DTSI file.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: add basic V3s support
Icenowy Zheng [Sat, 8 Apr 2017 07:30:12 +0000 (15:30 +0800)]
sunxi: add basic V3s support

Basic U-Boot support is now present for V3s.

Some memory addresses are changed specially for V3s, as the original
address map cannot fit into a so small DRAM.

As the DRAM controller code needs a big refactor, the SPL support is
disabled in this version.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agoARM: dts: uniphier: sync Device Tree with Linux
Masahiro Yamada [Thu, 20 Apr 2017 07:54:44 +0000 (16:54 +0900)]
ARM: dts: uniphier: sync Device Tree with Linux

- Use - instead of @ for OPP tables
 - Add input-delay properties to Cadence eMMC nodes
 - Restore full license text because code-diff is annoying
 - Fix NAND compatible strings

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: show STM (SCP) status on boot and pinmon command
Masahiro Yamada [Thu, 20 Apr 2017 07:54:43 +0000 (16:54 +0900)]
ARM: uniphier: show STM (SCP) status on boot and pinmon command

The SCP (System Control Processor) or what we call STM (Stand-by
MPU) is integrated in LD4, Pro4, sLD8, LD6b, LD11, and LD20.
For these SoCs, show the information if STM is enabled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: enable PSCI sysreset for uniphier_v8_defconfig
Masahiro Yamada [Thu, 20 Apr 2017 07:54:42 +0000 (16:54 +0900)]
ARM: uniphier: enable PSCI sysreset for uniphier_v8_defconfig

This configuration is supposed to be used with ARM Trusted Firmware,
so the SYSTEM_RESET is implemented in BL31.  Invoke PSCI instead of
U-Boot's own reset code because we need to coordinate with SCP
(System Control Processor) for the system-level power management.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: setup EHCI PHY paramters for LD11
Masahiro Yamada [Fri, 14 Apr 2017 02:30:05 +0000 (11:30 +0900)]
ARM: uniphier: setup EHCI PHY paramters for LD11

Set the same PHY parameters as the Boot ROM uses.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agosunxi: Add clock support for DE2/HDMI/TCON on newer SoCs
Jernej Skrabec [Mon, 27 Mar 2017 17:22:31 +0000 (19:22 +0200)]
sunxi: Add clock support for DE2/HDMI/TCON on newer SoCs

This is needed for HDMI, which will be added later.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: video: Convert lcdc to use struct display_timing
Jernej Skrabec [Mon, 27 Mar 2017 17:22:30 +0000 (19:22 +0200)]
sunxi: video: Convert lcdc to use struct display_timing

Video driver for older Allwinner SoCs uses cfb console framework which
in turn uses struct ctfb_res_modes to hold timing informations. However,
DM video framework uses different structure - struct display_timing.

It makes more sense to convert lcdc to use new timing structure because
all new drivers should use DM video framework and older drivers might be
rewritten to use new framework too.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: video: Split out TCON code
Jernej Skrabec [Mon, 27 Mar 2017 17:22:29 +0000 (19:22 +0200)]
sunxi: video: Split out TCON code

TCON unit has similar layout and functionality also on newer SoCs. This
commit splits out TCON code for easier reuse later.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Add support for Bananapi M2 Ultra
Chen-Yu Tsai [Fri, 2 Dec 2016 08:12:32 +0000 (16:12 +0800)]
sunxi: Add support for Bananapi M2 Ultra

The Bananapi M2 Ultra is the first publicly available development board
featuring the R40 SoC.

This patch add barebone dtsi/dts files for the R40 and Bananapi M2 Ultra,
as well as a defconfig for it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Add PSCI support for R40
Chen-Yu Tsai [Wed, 1 Mar 2017 03:03:15 +0000 (11:03 +0800)]
sunxi: Add PSCI support for R40

The R40's CPU controls are a combination of sun6i and sun7i.

All controls are in the CPUCFG block, and it seems the R40 does not
have a PRCM block. The core reset, power gating and clamp controls
are grouped like sun6i.

Last, the R40 does not have a secure SRAM block.

This patch adds a PSCI implementation for CPU bring-up and hotplug
for the R40.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Fix CPUCFG address for R40
Chen-Yu Tsai [Wed, 1 Mar 2017 05:52:09 +0000 (13:52 +0800)]
sunxi: Fix CPUCFG address for R40

The R40 has the CPUCFG block at the same address as the A20.
Fix it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Enable SPL for R40
Chen-Yu Tsai [Fri, 2 Dec 2016 08:09:49 +0000 (16:09 +0800)]
sunxi: Enable SPL for R40

Now that we can do DRAM initialization for the R40, we can enable
SPL support for it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Use H3/A64 DRAM initialization code for R40
Chen-Yu Tsai [Thu, 1 Dec 2016 11:09:57 +0000 (19:09 +0800)]
sunxi: Use H3/A64 DRAM initialization code for R40

The R40 seems to have a variant of the memory controller found in
the H3 and A64 SoCs. Adapt the code for use on the R40. The changes
are based on released DRAM code and comparing register dumps from
boot0.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agogpio: sunxi: Add compatible string for R40 PIO
Chen-Yu Tsai [Wed, 30 Nov 2016 09:23:52 +0000 (17:23 +0800)]
gpio: sunxi: Add compatible string for R40 PIO

The PIO on the R40 SoC is mostly compatible with the A20.
Only a few pin functions for mmc2 were added to the PC
pingroup, to support 8 bit eMMCs.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Provide defaults for R40 DRAM settings
Chen-Yu Tsai [Wed, 30 Nov 2016 08:58:35 +0000 (16:58 +0800)]
sunxi: Provide defaults for R40 DRAM settings

These values were taken from the Banana Pi M2 Ultra fex file
found in the released vendor BSP. This is the only publicly
available R40 device at the time of this writing.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Set PLL lock enable bits for R40
Chen-Yu Tsai [Wed, 30 Nov 2016 08:54:34 +0000 (16:54 +0800)]
sunxi: Set PLL lock enable bits for R40

According to the BSP released by Banana Pi, the R40 (sun8iw11p1) has
an extra "PLL lock control" register in the CCU, which controls whether
the individual PLL lock status bits in each PLL's control register work
or not.

This patch enables it for all the PLLs.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Add mmc[1-3] pinmux settings for R40
Chen-Yu Tsai [Wed, 30 Nov 2016 08:28:34 +0000 (16:28 +0800)]
sunxi: Add mmc[1-3] pinmux settings for R40

The PIO is generally compatible with the A20, except that it routes the
full 8 bits and eMMC reset pins for mmc2.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Fix watchdog reset function for R40
Chen-Yu Tsai [Wed, 30 Nov 2016 08:27:14 +0000 (16:27 +0800)]
sunxi: Fix watchdog reset function for R40

The watchdog found on the R40 SoC is the older variant found on the A20.
Add the proper "#if defines" to make it work.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Enable AXP221s in I2C mode with the R40 SoC
Chen-Yu Tsai [Wed, 30 Nov 2016 07:30:30 +0000 (15:30 +0800)]
sunxi: Enable AXP221s in I2C mode with the R40 SoC

The R40 SoC uses the AXP221s in I2C mode to supply power.

Some regulator's common usages have changed, and also the recommended
voltage for existing usages have changed. Update the defaults to match.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Add initial support for R40
Chen-Yu Tsai [Wed, 30 Nov 2016 06:57:32 +0000 (14:57 +0800)]
sunxi: Add initial support for R40

The R40 is the successor to the A20. It is a hybrid of the A20, A33
and the H3.

The R40's PIO controller is compatible with the A20,
Reuse the A20 UART and I2C muxing code by adding the R40's macro.

The display pipeline is the newer DE 2.0 variant.
Block enabling video on R40 for now.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Split up long Kconfig lines
Chen-Yu Tsai [Thu, 2 Mar 2017 08:03:06 +0000 (16:03 +0800)]
sunxi: Split up long Kconfig lines

Currently we have some lines in board/sunxi/Kconfig that are very long.
These line either provide default values for a set of SoCs, or limit
some option to a subset of sunxi SoCs.

Fortunately Kconfig makes it easy to split them. The Kconfig language
document states

    If multiple dependencies are defined, they are connected with '&&'.

This means we can split existing dependencies at "&&" symbols. This
applies to both the "depends on" lines and "if" expressions.

This patch splits them up to one symbol per line. This will make it
easier to add, remove, or modify one item at a time.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Convert CONS_INDEX to Kconfig
Mylène Josserand [Sun, 2 Apr 2017 10:59:11 +0000 (12:59 +0200)]
sunxi: Convert CONS_INDEX to Kconfig

Convert the CONS_INDEX configuration to Kconfig.
Update sunxi's defconfigs to remove SYS_EXTRA_OPTIONS variable not
needed anymore.
Default value is 1 except for sun5i (equals 2) and sun8i (equals 5).

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
[Maxime: Added a depends on ARCH_SUNXI to avoid build breakages]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Convert CONFIG_MACPWR to Kconfig
Mylène Josserand [Sun, 2 Apr 2017 10:59:10 +0000 (12:59 +0200)]
sunxi: Convert CONFIG_MACPWR to Kconfig

Convert the CONFIG_MACPWR to Kconfig and update all the sunxi defconfigs
that used it in SYS_EXTRA_OPTIONS.

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Convert CONFIG_SATAPWR to Kconfig
Mylène Josserand [Sun, 2 Apr 2017 10:59:09 +0000 (12:59 +0200)]
sunxi: Convert CONFIG_SATAPWR to Kconfig

Convert the CONFIG_SATAPWR into kconfig.
Thanks to that, many SYS_EXTRA_OPTIONS can be removed from some
defconfigs.

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Convert CONFIG_RGMII to Kconfig
Mylène Josserand [Sun, 2 Apr 2017 10:59:08 +0000 (12:59 +0200)]
sunxi: Convert CONFIG_RGMII to Kconfig

Convert CONFIG_RGMII to Kconfig. Thanks to that, it is possible to
update defconfig files of SYS_EXTRA_OPTIONS accordingly and
remove it when it is possible.

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Convert SUNXI_EMAC to Kconfig
Mylène Josserand [Sun, 2 Apr 2017 10:59:07 +0000 (12:59 +0200)]
sunxi: Convert SUNXI_EMAC to Kconfig

Convert the SUNXI_EMAC config to Kconfig. Remove it from SYS_EXTRA_OPTIONS
from many sunxi defconfig and renamed it into SUN4I_EMAC to not confuse it
with SUN8I_EMAC.

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: mk802_defconfig: Remove SYS_EXTRA_OPTIONS
Mylène Josserand [Sun, 2 Apr 2017 10:59:06 +0000 (12:59 +0200)]
sunxi: mk802_defconfig: Remove SYS_EXTRA_OPTIONS

The USB_EHCI configuration is already set in this defconfig
using kconfig's config. This configuration in SYS_EXTRA_OPTIONS
must be removed and so the SYS_EXTRA_OPTIONS.

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: icnova-a20-swac_defconfig: Remove CMD_BMP from
Mylène Josserand [Sun, 2 Apr 2017 10:59:05 +0000 (12:59 +0200)]
sunxi: icnova-a20-swac_defconfig: Remove CMD_BMP from

This configuration is not necessary in a defconfig file so
it is removed from the SYS_EXTRA_OPTIONS.

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: icnova-a20-swac_defconfig: Remove AXP209_POWER
Mylène Josserand [Sun, 2 Apr 2017 10:59:04 +0000 (12:59 +0200)]
sunxi: icnova-a20-swac_defconfig: Remove AXP209_POWER

Remove the AXP209_POWER option from SYS_EXTRA_OPTIONS.
As this configuration already exists on Kconfig, we just need
to remove it from defconfig.

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agosunxi: Move SUNXI_GMAC to Kconfig
Mylène Josserand [Sun, 2 Apr 2017 10:59:03 +0000 (12:59 +0200)]
sunxi: Move SUNXI_GMAC to Kconfig

Move the SUNXI_GMAC config option to Kconfig, remove it
from SYS_EXTRA_OPTIONS and rename it into SUN7I_GMAC.

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Tue, 18 Apr 2017 15:36:06 +0000 (11:36 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq

7 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Tue, 18 Apr 2017 14:31:46 +0000 (10:31 -0400)]
Merge git://git.denx.de/u-boot-x86

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-ubi
Tom Rini [Tue, 18 Apr 2017 14:31:39 +0000 (10:31 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-ubi

7 years agoboard: Remove orphan SPARC boards
Tom Rini [Tue, 18 Apr 2017 14:30:09 +0000 (10:30 -0400)]
board: Remove orphan SPARC boards

Since 936478e797a8 SPARC as been removed as an architecture.  Remove
these now orphan boards.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agorockchip: Print a message when returning to the bootrom
Simon Glass [Sat, 15 Apr 2017 19:11:31 +0000 (13:11 -0600)]
rockchip: Print a message when returning to the bootrom

At present if the return to bootrom fails (e.g. because you are not using
the Rockchip's bootrom's pointer table in MMC) then the board prints
SPL message and hangs. Print a message first if we can, to help in
understanding what happened when it hangs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
7 years agodrivers/crypto/fsl: remove redundant logical contraint
xypron.glpk@gmx.de [Sat, 15 Apr 2017 14:37:54 +0000 (16:37 +0200)]
drivers/crypto/fsl: remove redundant logical contraint

'A || (!A && B)' is equivalent to 'A || B'.
Let's reduce the complexity of the statement in start_jr0().

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agofsl/sata: correctly identify failed malloc
xypron.glpk@gmx.de [Sat, 15 Apr 2017 13:31:53 +0000 (15:31 +0200)]
fsl/sata: correctly identify failed malloc

After allocating sata->cmd_hdr_tbl_offset we have to check
this variable and not variable sata.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoddr: fsl: incorrect logical constraint in populate_memctl_options
xypron.glpk@gmx.de [Sat, 15 Apr 2017 13:23:49 +0000 (15:23 +0200)]
ddr: fsl: incorrect logical constraint in populate_memctl_options

(pdimm[0].data_width >= 32) || (pdimm[0].data_width <= 40)
is always true.

We should use && here.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>