]> git.sur5r.net Git - u-boot/log
u-boot
7 years agopowerpc/board/t1024rdb: enable board-level reset when issuing reset command
Shengzhou Liu [Mon, 10 Apr 2017 08:00:08 +0000 (16:00 +0800)]
powerpc/board/t1024rdb: enable board-level reset when issuing reset command

As board-specific reset logic, it needs to issue reset signal
via CPLD when issuing 'reset' command in u-boot, this patch
solves the issue of reset command not working on T1024RDB.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: e6500: Lock/unlock 1 cache instead of L1 as init_ram
Ruchika Gupta [Thu, 2 Mar 2017 08:42:41 +0000 (14:12 +0530)]
powerpc: e6500: Lock/unlock 1 cache instead of L1 as init_ram

For E6500 cores, L2 cache has been used as init_ram. L1 cache is a
write through cache on E6500.If lines are not locked in both L1 and
L2 caches, crashes are observed during secure boot. This patch locks/
unlocks both L1 and L2 cache to prevent the crash.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8/fsl-layerscape: fdt: avoid incorrect fixing with CONFIG_SYS_CLK_FREQ
Yangbo Lu [Mon, 10 Apr 2017 07:04:11 +0000 (15:04 +0800)]
armv8/fsl-layerscape: fdt: avoid incorrect fixing with CONFIG_SYS_CLK_FREQ

Current sysclk fixing would fix all clocks with 'fixed-clock' compatible.
This patch is to fix sysclk by path to avoid any incorrect fixing.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: fsl-lsch3: Instantiate TZASC configuration in 2 groups
Ashish kumar [Fri, 7 Apr 2017 06:10:32 +0000 (11:40 +0530)]
armv8: fsl-lsch3: Instantiate TZASC configuration in 2 groups

Number of TZASC instances may vary across NXP SoCs.
So put TZASC configuration under instance specific defines.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls2080a: Add serdes2 protocol 0x51 support
Santan Kumar [Wed, 5 Apr 2017 09:04:32 +0000 (14:34 +0530)]
armv8: ls2080a: Add serdes2 protocol 0x51 support

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarm64/ls1046a: Enable ERRATUM_A008850 for ls1046a SoC
Shengzhou Liu [Thu, 23 Mar 2017 10:14:40 +0000 (18:14 +0800)]
arm64/ls1046a: Enable ERRATUM_A008850 for ls1046a SoC

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1046aqds: enable ppa in default config
tang yuantian [Fri, 10 Mar 2017 06:49:25 +0000 (14:49 +0800)]
armv8: ls1046aqds: enable ppa in default config

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv7: ls1021a: Drop macro CONFIG_LS102XA
York Sun [Mon, 27 Mar 2017 18:41:03 +0000 (11:41 -0700)]
armv7: ls1021a: Drop macro CONFIG_LS102XA

Use CONFIG_ARCH_LS1021A instead.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1043a: Drop macro CONFIG_LS1043A
York Sun [Mon, 27 Mar 2017 18:41:02 +0000 (11:41 -0700)]
armv8: ls1043a: Drop macro CONFIG_LS1043A

Use CONFIG_ARCH_LS1043A instead.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls2080a: Drop macro CONFIG_LS2080A
York Sun [Mon, 27 Mar 2017 18:41:01 +0000 (11:41 -0700)]
armv8: ls2080a: Drop macro CONFIG_LS2080A

Use CONFIG_ARCH_LS2080A instead.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarm: ls1046ardb: Add SD secure boot target
Ruchika Gupta [Mon, 17 Apr 2017 12:37:19 +0000 (18:07 +0530)]
arm: ls1046ardb: Add SD secure boot target

- Add SD secure boot target for ls1046ardb.
- Change the u-boot size defined by a macro for copying the main
  U-Boot by SPL to also include the u-boot Secure Boot header size
  as header is appended to u-boot image. So header will also be
  copied from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM
  (128K) where 32K are reserved for use by boot ROM and 6K for the
  header.
- Reduce the size of CAAM driver for SPL Blobification functions
  and descriptors, that are not required at the time of SPL are
  disabled. Further error code conversion to strings is disabled
  for SPL build.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarm: ls1043ardb: Add NAND secure boot target
Ruchika Gupta [Mon, 17 Apr 2017 12:37:18 +0000 (18:07 +0530)]
arm: ls1043ardb: Add NAND secure boot target

Add NAND secure boot target for ls1043ardb.

- Change the u-boot size defined by a macro for copying the main
  U-Boot by SPL to also include the u-boot Secure Boot header size as
  header is appended to u-boot image. So header will also be copied
  from SD to DDR.
- MACRO for CONFIG_BOOTSCRIPT_COPY_RAM is enabled to copy Bootscript
  from NAND to DDR. Offsets for Bootscript on NAND and DDR have been
  also defined.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarm: ls1043ardb: Add SD secure boot target
Ruchika Gupta [Mon, 17 Apr 2017 12:37:17 +0000 (18:07 +0530)]
arm: ls1043ardb: Add SD secure boot target

- Add SD secure boot target for ls1043ardb.
- Implement FSL_LSCH2 specific spl_board_init() to setup CAAM stream
  ID and corresponding stream ID in SMMU.
- Change the u-boot size defined by a macro for copying the main
  U-Boot by SPL to also include the u-boot Secure Boot header size as
  header is appended to u-boot image. So header will also be copied
  from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM
  (128K) where 32K are reserved for use by boot ROM and 6K for secure
  boto header.
- Error messages during SPL boot are limited to error code numbers
  instead of strings to reduce the size of SPL image.

Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: LS1012ARDB: Add QSPI Secure Boot target
Vinitha Pillai-B57223 [Thu, 23 Mar 2017 08:18:20 +0000 (13:48 +0530)]
armv8: LS1012ARDB: Add QSPI Secure Boot target

Add QSPI Secure Boot target to enable chain of trust

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: SECURE_BOOT: Enable chain of trust on LS1012A platform
Vinitha Pillai-B57223 [Thu, 23 Mar 2017 08:18:19 +0000 (13:48 +0530)]
armv8: SECURE_BOOT: Enable chain of trust on LS1012A platform

Define bootscript and its header addresses for QSPI target
Also add PPA header address in Kconfig

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: LS1046ARDB: Add QSPI Secure Boot target
Vinitha Pillai-B57223 [Thu, 23 Mar 2017 08:18:18 +0000 (13:48 +0530)]
armv8: LS1046ARDB: Add QSPI Secure Boot target

Add QSPI Secure Boot target. Also enable sec init.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: LS1046AQDS: Add NOR Secure Boot Target
Sumit Garg [Thu, 23 Mar 2017 08:18:17 +0000 (13:48 +0530)]
armv8: LS1046AQDS: Add NOR Secure Boot Target

Add NOR secure boot target. Also enable sec init.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: SECURE_BOOT: Enable chain of trust on LS1046A platform
Vinitha Pillai-B57223 [Thu, 23 Mar 2017 08:18:16 +0000 (13:48 +0530)]
armv8: SECURE_BOOT: Enable chain of trust on LS1046A platform

Define bootscript and its header addresses for QSPI target. Also
define PPA header address to enable PPA validation.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
7 years agoarmv8: LS1043ARDB: Enable PPA in Secure boot defconfig
Vinitha Pillai-B57223 [Thu, 23 Mar 2017 08:18:15 +0000 (13:48 +0530)]
armv8: LS1043ARDB: Enable PPA in Secure boot defconfig

Enable PPA in secure boot by defining FSL_LS_PPA macro in its
defconfig file.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: fsl-layerscape: SECURE BOOT: Add header address of PPA in kconfig
Vinitha Pillai-B57223 [Thu, 23 Mar 2017 08:18:14 +0000 (13:48 +0530)]
armv8: fsl-layerscape: SECURE BOOT: Add header address of PPA in kconfig

The header address of PPA defined in Kconfig.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agopowerpc: T1042RDB: SECURE BOOT: Remove CONFIG_CMD_BLOB from SPL compilation
VINITHA PILLAI [Fri, 31 Mar 2017 05:20:02 +0000 (10:50 +0530)]
powerpc: T1042RDB: SECURE BOOT: Remove CONFIG_CMD_BLOB from SPL compilation

BLOB feature is not required during SPL compilation.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1046ardb: SPL size reduction
Sumit Garg [Thu, 30 Mar 2017 04:23:13 +0000 (09:53 +0530)]
armv8: ls1046ardb: SPL size reduction

Using changes in this patch we were able to reduce approx 4k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1046ardb/Makefile to remove
   compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep
   only ddr_init and board_early_init_f funcations in case of SPL
   build.
3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver
   specific macros due to which static data was being compiled in
   case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
   build and NAND driver from bieng compiled in case of SPL MMC build.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1043ardb: SPL size reduction
Sumit Garg [Thu, 30 Mar 2017 04:22:38 +0000 (09:52 +0530)]
armv8: ls1043ardb: SPL size reduction

Using changes in this patch we were able to reduce approx 10k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1043ardb/Makefile to remove
   compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1043ardb/ls1043ardb.c to keep
   only ddr_init and board_early_init_f funcations in case of SPL
   build.
3. Changes in ls1043a_common.h & ls1043ardb.h to remove driver
   specific macros due to which static data was being compiled in
   case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
   build and NAND driver from bieng compiled in case of SPL MMC build.
5. Remove I2C driver support from SPL in case of LS1043ARDB.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agodrivers: ddr: fsl: fix unused-const-variable warnings
Thomas Schaefer [Tue, 28 Mar 2017 18:29:56 +0000 (11:29 -0700)]
drivers: ddr: fsl: fix unused-const-variable warnings

Depending on DDR configuration, gcc-6.x will show up unused-const-
variable messages. Use __maybe_unused specifier for all dynamic_odt
variable definitions to remove these warnings.

Memory footprint will not increase as gcc will optimize out unused
constants.

Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Sat, 15 Apr 2017 02:05:17 +0000 (22:05 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-video

7 years agobuildman: Translate more strings to latin-1
Tom Rini [Fri, 14 Apr 2017 14:06:28 +0000 (10:06 -0400)]
buildman: Translate more strings to latin-1

When writing out some of our results we may now have UTF-8 characters
in there as well.  Translate these to latin-1 and ignore any errors (as
this is for diagnostic and given the githash anything else can be
reconstructed by the user.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Fri, 14 Apr 2017 14:58:49 +0000 (10:58 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

7 years agousb: return 0 from usb_stor_get_info even if removable media
Troy Kisky [Tue, 11 Apr 2017 01:23:11 +0000 (18:23 -0700)]
usb: return 0 from usb_stor_get_info even if removable media

This fixes a regression caused by

commit 07b2b78ce4bc8ae25e066c65245eaf58c0d9a67c
    dm: usb: Convert USB storage to use driver-model for block devs

which caused part_init to be called when it was not previously.
Without this patch, the following happens when a USB sd card reader is used.

=> usb start
starting USB...
USB0:   Port not available.
USB1:   USB EHCI 1.00
scanning bus 1 for devices... 3 USB Device(s) found
       scanning usb for storage devices... Device NOT ready
   Request Sense returned 02 3A 00
 ### ERROR ### Please RESET the board ###

This happens because dev_desc->blksz is 0.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
7 years agousb: dwc2: invalidate the dcache before starting the DMA
Eddie Cai [Thu, 6 Apr 2017 03:37:04 +0000 (11:37 +0800)]
usb: dwc2: invalidate the dcache before starting the DMA

We should invalidate the dcache before starting the DMA. In case there are
any dirty lines from the DMA buffer in the cache, subsequent cache-line
replacements may corrupt the buffer in memory while the DMA is still going on.
Cache-line replacement can happen if the CPU tries to bring some other memory
locations into the cache while the DMA is going on.

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
7 years agousb: dwc3: gadget: make cache-maintenance on event buffers more robust
Philipp Tomsich [Thu, 6 Apr 2017 14:58:53 +0000 (16:58 +0200)]
usb: dwc3: gadget: make cache-maintenance on event buffers more robust

Merely using dma_alloc_coherent does not ensure that there is no stale
data left in the caches for the allocated DMA buffer (i.e. that the
affected cacheline may still be dirty).

The original code was doing the following (on AArch64, which
translates a 'flush' into a 'clean + invalidate'):
  # during initialisation:
      1. allocate buffers via memalign
        => buffers may still be modified (cached, dirty)
  # during interrupt processing
      2. clean + invalidate buffers
        => may commit stale data from a modified cacheline
      3. read from buffers

This could lead to garbage info being written to buffers before
reading them during even-processing.

To make the event processing more robust, we use the following sequence
for the cache-maintenance:
  # during initialisation:
      1. allocate buffers via memalign
      2. clean + invalidate buffers
        (we only need the 'invalidate' part, but dwc3_flush_cache()
  always performs a 'clean + invalidate')
  # during interrupt processing
      3. read the buffers
        (we know these lines are not cached, due to the previous
  invalidation and no other code touching them in-between)
      4. clean + invalidate buffers
        => writes back any modification we may have made during event
    processing and ensures that the lines are not in the cache
    the next time we enter interrupt processing

Note that with the original sequence, we observe reproducible
(depending on the cache state: i.e. running dhcp/usb start before will
upset caches to get us around this) issues in the event processing (a
fatal synchronous abort in dwc3_gadget_uboot_handle_interrupt on the
first time interrupt handling is invoked) when running USB mass
storage emulation on our RK3399-Q7 with data-caches on.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
7 years agousb: dwc3: ensure consistent types for dwc3_flush_cache
Philipp Tomsich [Thu, 6 Apr 2017 14:58:52 +0000 (16:58 +0200)]
usb: dwc3: ensure consistent types for dwc3_flush_cache

The dwc3_flush_cache() call was declared and used inconsistently:
 * The declaration assumed 'int' for addresses (a potential issue
   when running in a LP64 memory model).
 * The invocation cast the address to 'long'.

This change ensures that both the declaration and usage of this
function consistently uses 'uintptr_t' for correct behaviour even
when the allocated buffers (to be flushed) reside outside of the
lower 32bits of memory.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
7 years agousb: gadget: g_dnl: don't set iProduct nor iSerialNumber
Felipe Balbi [Wed, 22 Feb 2017 15:12:41 +0000 (17:12 +0200)]
usb: gadget: g_dnl: don't set iProduct nor iSerialNumber

Both these numbers are calculated in runtime and dynamically assigned
to the device descriptor during bind().

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
7 years agousb: gadget: g_dnl: only set iSerialNumber if we have a serial#
Felipe Balbi [Wed, 22 Feb 2017 15:12:40 +0000 (17:12 +0200)]
usb: gadget: g_dnl: only set iSerialNumber if we have a serial#

We don't want to claim that we support a serial number string and
later return nothing. Because of that, if g_dnl_serial is an empty
string, let's skip setting iSerialNumber to a valid number.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
7 years agousb: gadget: g_dnl: hold maximum string descriptor
Felipe Balbi [Wed, 22 Feb 2017 15:12:39 +0000 (17:12 +0200)]
usb: gadget: g_dnl: hold maximum string descriptor

A USB String descriptor can be up to 255 characters long and it's not
NULL terminated according to the USB spec. This means our
MAX_STRING_SERIAL should be 256 (to cope with NULL terminator).

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
7 years agovideo: Fix crash when scroll screen
eric.gao@rock-chips.com [Mon, 10 Apr 2017 02:02:20 +0000 (10:02 +0800)]
video: Fix crash when scroll screen

After enabling log printing to lcd, when the screen starts
scrolling, system crashes. Log is shown as bellow:

    "Synchronous Abort" handler, esr 0x96000045
    "Synchronous Abort" handler, esr 0x96000045

Checking the source code, we found that the variable "pixels"
gets a wrong value:

    int pixels = VIDEO_FONT_HEIGHT * vid_priv->line_length;

"pixels" here means the value of pixels for a character, rather
than the bytes for a character. So the variable "pixels" is 4
times bigger than it's exact value, which will cause the memory
overflow when the cpu runs the following code:

    for (i = 0; i < pixels; i++)
        *dst++ = clr; <<----

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
7 years agoat91: video: DT binding for HLCDC driver
Songjun Wu [Tue, 11 Apr 2017 08:33:31 +0000 (16:33 +0800)]
at91: video: DT binding for HLCDC driver

DT binding documentation for atmel HLCDC driver.

Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Fri, 14 Apr 2017 13:05:57 +0000 (09:05 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-mmc
Tom Rini [Fri, 14 Apr 2017 13:05:46 +0000 (09:05 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc

7 years agoat91: video: Support driver-model for the HLCD driver
Songjun Wu [Tue, 11 Apr 2017 08:33:30 +0000 (16:33 +0800)]
at91: video: Support driver-model for the HLCD driver

Add driver-model support to this driver.

Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
7 years agousb: dwc2: add support for external vbus supply
Kever Yang [Fri, 10 Mar 2017 04:05:14 +0000 (12:05 +0800)]
usb: dwc2: add support for external vbus supply

Some board do not use the dwc2 internal VBUS_DRV signal, but
use a gpio pin to enable the 5.0V VBUS power, add interface to
enable the power in dwc2 driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoarm: socfpga: sr1500 use environment in common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:36 +0000 (07:30 -0700)]
arm: socfpga: sr1500 use environment in common header

This removes the default environment from the sr1500 header
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.

This board has no upstream devicetree in the kernel source,
so set to socfpga_cyclone5_sr1500.dtb.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in v2:
 - Remove unneeded CONFIG_BOOTFILE
 - set devicetree name to match socfpga_{fpga model}_{board model}.dts
   pattern

7 years agoarm: socfpga: Socrates use environment in common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:35 +0000 (07:30 -0700)]
arm: socfpga: Socrates use environment in common header

This removes the default environment from the socrates headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.

Change default devicetree name to match devicetree name in
upstream kernel source.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in v2:
 - Remove unneeded CONFIG_BOOTFILE

7 years agoarm: socfpga: SoCKit use environment in common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:34 +0000 (07:30 -0700)]
arm: socfpga: SoCKit use environment in common header

This removes the default environment from the SoCKit headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.

Change default devicetree name to match devicetree name in
upstream kernel source.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in v2:
 - Remove unneeded CONFIG_BOOTFILE

7 years agoarm: socfpga: DE1 use environment in common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:33 +0000 (07:30 -0700)]
arm: socfpga: DE1 use environment in common header

This removes the default environment from the de1 headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.

This board does not have a devicetree in the upstream kernel
source so set devicetree to socfpga_cyclone5_de1_soc.dtb.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in V2:
 - Remove unneeded CONFIG_BOOTFILE
 - set devicetree name to match socfpga_{fpga model}_{board model}.dts
   pattern

7 years agoarm: socfpga: C5 SoCDK use environment in common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:32 +0000 (07:30 -0700)]
arm: socfpga: C5 SoCDK use environment in common header

This removes the default environment from the C5 SoCDK headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.

In addition to the above, add support to boot from the custom
a2 type partition.

Change default devicetree name to match devicetree name in
upstream kernel source.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in v2:
 - Remove unneeded CONFIG_BOOTFILE

7 years agoarm: socfpga: A5 SoCDK use environment in common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:31 +0000 (07:30 -0700)]
arm: socfpga: A5 SoCDK use environment in common header

This removes the default environment from the A5 socdk headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.

Add support to boot from the custom a2 type partition.

Change default devicetree name to match devicetree name in
upstream kernel source.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in v3:
 - Fix small typo in defconfig, missing "C"
Changes in v2:
 - Remove unneeded CONFIG_BOOTFILE
 - Fix dtb name

a5config test

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
7 years agoarm: socfpga: DE0 use environment in common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:30 +0000 (07:30 -0700)]
arm: socfpga: DE0 use environment in common header

This removes the default environment from the de0 headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.

In addition to the above, add support to boot from the custom
a2 type partition

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in v2:
 - Remove unneeded CONFIG_BOOTFILE

7 years agoarm: socfpga: Add distro boot to socfpga common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:29 +0000 (07:30 -0700)]
arm: socfpga: Add distro boot to socfpga common header

This adds a common environment and support for distro boot
in the common socfpga header.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in v5:
 - Per Frank, to support OpenSuse the ENV must be after the GPT
Changes in v4:
 - Move env back to being right after the MBR
Changes in v3:
 - fix spacing between asterix
 - remove verify=n as a default setting

Changes in v2:
 - Remove unneeded CONFIG_BOOTFILE and fdt_addr
 - cleanup spacing in MMC env size

common

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
7 years agoarm: socfpga: Convert Altera DDR SDRAM driver to use Kconfig
Ley Foon Tan [Wed, 5 Apr 2017 09:32:51 +0000 (17:32 +0800)]
arm: socfpga: Convert Altera DDR SDRAM driver to use Kconfig

Convert Altera DDR SDRAM driver to use Kconfig method.
Enable ALTERA_SDRAM by default if it is on Gen5 target.
Arria 10 will have different driver.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agofdt: Add compatible strings for Arria 10
Ley Foon Tan [Wed, 5 Apr 2017 09:32:47 +0000 (17:32 +0800)]
fdt: Add compatible strings for Arria 10

Add compatible strings for Intel Arria 10 SoCFPGA device.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoARM: socfpga: Disable OC on MCVEVK
Marek Vasut [Mon, 5 Dec 2016 17:17:52 +0000 (18:17 +0100)]
ARM: socfpga: Disable OC on MCVEVK

Disable the OC test on MCVEVK as the old PHY version does not provide
this information. This fixes the USB OTG operation.

Signed-off-by: Marek Vasut <marex@denx.de>
7 years agoARM: socfpga: mcvevk: Add default dfu_alt_info
Marek Vasut [Sat, 29 Oct 2016 20:08:39 +0000 (22:08 +0200)]
ARM: socfpga: mcvevk: Add default dfu_alt_info

Add default DFU altinfo for eMMC.

Signed-off-by: Marek Vasut <marex@denx.de>
7 years agoARM: socfpga: Reduce the DFU buffer size
Marek Vasut [Sat, 29 Oct 2016 19:15:56 +0000 (21:15 +0200)]
ARM: socfpga: Reduce the DFU buffer size

There is no point in having such gargantuan buffer, it only requires
huge malloc area. Reduce the DFU buffer size.

Signed-off-by: Marek Vasut <marex@denx.de>
7 years agoARM: socfpga: Rename MCVEVK
Marek Vasut [Wed, 5 Apr 2017 11:17:03 +0000 (13:17 +0200)]
ARM: socfpga: Rename MCVEVK

The board is now manufactured by Aries Embedded GmbH , rename it.

Signed-off-by: Marek Vasut <marex@denx.de>
7 years agoARM: socfpga: boot0 hook: remove macro from boot0 header file
Chee, Tien Fong [Wed, 29 Mar 2017 03:49:16 +0000 (11:49 +0800)]
ARM: socfpga: boot0 hook: remove macro from boot0 header file

Commit ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole
header file") miss out cleaning macro in this header file, and this
has broken implementation of a boot header capability in socfpga
SPL. Remove the macro in this file, and recovering it back
to proper functioning.

Fixes: ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole
header file")

Signed-off-by: Chee, Tien Fong <tien.fong.chee@intel.com>
7 years agoARM: socfpga: cyclone5-socdk: Enable ports A & C
Georges Savoundararadj [Tue, 28 Mar 2017 05:56:04 +0000 (22:56 -0700)]
ARM: socfpga: cyclone5-socdk: Enable ports A & C

With the port C enabled, we can read the GPI input state of:
* the DIP switches (USER_DIPSW_HPS[3:0]/HPS_GPI[7:4])
* the push buttons (USER_PB_HPS[3:0]/HPS_GPI[11:8])

Signed-off-by: Georges Savoundararadj <savoundg@gmail.com>
Signed-off by: Sid-Ali Teir <git.syedelec@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Marek Vasut <marex@denx.de>
7 years agoARM: socfpga: add fpga build and bsp handoff instructions to readme
Stephen Arnold [Fri, 24 Mar 2017 01:58:08 +0000 (18:58 -0700)]
ARM: socfpga: add fpga build and bsp handoff instructions to readme

This patch adds the steps to manually (re)build a Quartus FPGA project,
generate the required BSP glue, and update u-boot handoff files for
mainline SPL support. Requires Quartus toolchain and current U-Boot.

Signed-off-by: Steve Arnold <stephen.arnold42@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
7 years agoboard: toradex: colibri_vf: Add DCU support for Colibri Vybrid
Stefan Agner [Tue, 11 Apr 2017 05:42:14 +0000 (11:12 +0530)]
board: toradex: colibri_vf: Add DCU support for Colibri Vybrid

The Vybrid SoC family has the same display controller unit (DCU)
like the LS1021A SoC. This patch adds platform data, pinmux defines
and clock control to enable the driver for Toradex Colibri Vybrid
module.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
7 years agovideo: fsl_dcu_fb: add additional modes for DCU
Stefan Agner [Tue, 11 Apr 2017 05:42:13 +0000 (11:12 +0530)]
video: fsl_dcu_fb: add additional modes for DCU

Add common widescreen modes 800x480 and 1024x600.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
7 years agovideo: fsl_dcu_fb: Fix DCU_MODE_BLEND_ITER setting
Stefan Agner [Tue, 11 Apr 2017 05:42:12 +0000 (11:12 +0530)]
video: fsl_dcu_fb: Fix DCU_MODE_BLEND_ITER setting

DCU_LAYER_MAX_NUM is currently used for DCU_MODE_BLEND_ITER and it
actually overflows the maximum value of BLEND_ITER for Vybrid and
LS102XA. Fix this by using a default value of 2.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
7 years agovideo: fsl_dcu_fb: Enable pixel clock after initialization
Stefan Agner [Tue, 11 Apr 2017 05:42:11 +0000 (11:12 +0530)]
video: fsl_dcu_fb: Enable pixel clock after initialization

When enabling the DCU and pixel clock, the test mode is activated
since this is the reset configuration. The test mode immediately
shows a red screen on a LCD. A moment later, the DCU gets
initialized properly.

This patch enables the pixel clock after initialization of the DCU
control register. This avoids this initial flicker on LCD screens.

While at it change the polarity of pixel clock to display samples
data on the rising edge.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
7 years agovideo: fsl_dcu_fb: fix framebuffer to the end of memory
Stefan Agner [Tue, 11 Apr 2017 05:42:10 +0000 (11:12 +0530)]
video: fsl_dcu_fb: fix framebuffer to the end of memory

Fix the framebuffer location to the very end of the available memory.
This allows to remove the area from available memory for the kernel,
which in turn allows to display the splash screen through the Linux
kernel boot process.

Ideas has been taken from the sunxi display driver, e.g.
20779ec3a5 ("sunxi: video: Dynamically reserve framebuffer memory")

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
7 years agoConvert CONFIG_FSL_DCU_FB to Kconfig
Sanchayan Maity [Tue, 11 Apr 2017 05:42:09 +0000 (11:12 +0530)]
Convert CONFIG_FSL_DCU_FB to Kconfig

Rename CONFIG_FSL_DCU_FB to CONFIG_VIDEO_FSL_DCU_FB
and convert it to Kconfig.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
7 years agommc: sdhci: Wait for SDHCI_INT_DATA_END when transferring.
Alex Deymo [Sun, 2 Apr 2017 08:24:34 +0000 (01:24 -0700)]
mmc: sdhci: Wait for SDHCI_INT_DATA_END when transferring.

sdhci_transfer_data() function transfers the blocks passed up to the
number of blocks defined in mmc_data, but returns immediately once all
the blocks are transferred, even if the loop exit condition is not met
(bit SDHCI_INT_DATA_END set in the STATUS word).

When doing multiple writes to mmc, returning right after the last block
is transferred can cause the write to fail when sending the
MMC_CMD_STOP_TRANSMISSION command right after the
MMC_CMD_WRITE_MULTIPLE_BLOCK command, leaving the mmc driver in an
unconsistent state until reboot. This error was observed in the rpi3
board.

This patch waits for the SDHCI_INT_DATA_END bit to be set even after
sending all the blocks.

Test: Reliably wrote 2GiB of data to mmc in a rpi3.

Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agommc: bcm2835_sdhci: Speed up mmc writes.
Jocelyn Bohr [Sun, 2 Apr 2017 08:24:33 +0000 (01:24 -0700)]
mmc: bcm2835_sdhci: Speed up mmc writes.

The linux kernel driver for this module does not use a delay when
writing to the SDHCI_BUFFER register. This patch mimics that behavior
in order to speed up the mmc writes on the Raspberry Pi.

Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agommc: gen_atmel_mci: add driver model support for mci
Wenyou Yang [Thu, 13 Apr 2017 02:29:22 +0000 (10:29 +0800)]
mmc: gen_atmel_mci: add driver model support for mci

Add the driver model support for Atmel mci while retaining the
existing legacy code. This allows the driver to support boards
that have converted to driver model as well as those that have not.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoodroid-c2: enable new Meson GX MMC driver in board defconfig
Heiner Kallweit [Wed, 12 Apr 2017 18:32:06 +0000 (20:32 +0200)]
odroid-c2: enable new Meson GX MMC driver in board defconfig

Enable new Meson GX MMC driver in Odroid C2 defconfig.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
7 years agommc: meson: add MMC driver for Meson GX (S905)
Carlo Caione [Wed, 12 Apr 2017 18:30:42 +0000 (20:30 +0200)]
mmc: meson: add MMC driver for Meson GX (S905)

This driver implements MMC support on Meson GX (S905) based systems.
It's based on Carlo Caione's work, changes:
- BLK support added
- general refactoring

Signed-off-by: Carlo Caione <carlo@caione.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
7 years agoarm: dts: update Meson GXBB / Odroid-C2 DT with recent Linux version
Heiner Kallweit [Wed, 12 Apr 2017 18:28:36 +0000 (20:28 +0200)]
arm: dts: update Meson GXBB / Odroid-C2 DT with recent Linux version

As a prerequisite for adding a Meson GX MMC driver update the
Meson GXBB / Odroid-C2 device tree in Uboot with the latest
version from Linux.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
7 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Thu, 13 Apr 2017 21:31:06 +0000 (17:31 -0400)]
Merge git://git.denx.de/u-boot-dm

Here with some DM changes as well as the long-standing AT91 DM/DT
conversion patches which I have picked up via dm.

7 years agoboard: sama5d4ek: enable early debug UART
Wenyou Yang [Thu, 13 Apr 2017 02:31:21 +0000 (10:31 +0800)]
board: sama5d4ek: enable early debug UART

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoboard: sama5d4ek: clean up code
Wenyou Yang [Thu, 13 Apr 2017 02:31:20 +0000 (10:31 +0800)]
board: sama5d4ek: clean up code

Due to the introduction of the pinctrl and clk driver, and using
device tree files, remove the unneeded hardcoded pin configuration
and clock enabling code from the board file.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoboard: sama5d4ek: update to support DM/DT
Wenyou Yang [Thu, 13 Apr 2017 02:31:19 +0000 (10:31 +0800)]
board: sama5d4ek: update to support DM/DT

Update the configuration files to support the device tree and driver
model, so do SPL. The device clock and pins configuration are handled
by the clock and the pinctrl drivers respectively.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoboard: sama5d4_xplained: enable early debug UART
Wenyou Yang [Thu, 13 Apr 2017 02:31:18 +0000 (10:31 +0800)]
board: sama5d4_xplained: enable early debug UART

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoboard: sama5d4_xplained: clean up code
Wenyou Yang [Thu, 13 Apr 2017 02:31:17 +0000 (10:31 +0800)]
board: sama5d4_xplained: clean up code

Due to the introduction of the pinctrl and clk driver, and using
device tree files, remove the unneeded hardcoded pin configuration
and clock enabling code from the board file.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoboard: sama5d4_xplained: update to support DM/DT
Wenyou Yang [Thu, 13 Apr 2017 02:31:16 +0000 (10:31 +0800)]
board: sama5d4_xplained: update to support DM/DT

Update the configuration files to support the device tree and
driver model, so do SPL. The device clock and pins configuration
are handled by the clock and the pinctrl drivers respectively.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoconfigs: at91-sama5_common: fix for CONFIG_AT91_GPIO
Wenyou Yang [Thu, 13 Apr 2017 02:31:15 +0000 (10:31 +0800)]
configs: at91-sama5_common: fix for CONFIG_AT91_GPIO

Add #ifndef CONFIG_DM_GPIO for CONFIG_AT91_GPIO define to avoid
the redefine compilation error.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoARM: at91: lds: use "_image_binary_end" for DT location
Wenyou Yang [Fri, 24 Mar 2017 03:34:06 +0000 (11:34 +0800)]
ARM: at91: lds: use "_image_binary_end" for DT location

The MMC SPL locates the BSS section to a different memory region
from text, then use "_image_binary_end" variable to point to the
correct device tree location.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: spl: atmel: move mem_init() advance in SPL init.
Wenyou Yang [Fri, 24 Mar 2017 03:34:05 +0000 (11:34 +0800)]
ARM: spl: atmel: move mem_init() advance in SPL init.

Because the MMC SPL puts the bbs section in the ddr memory, move
calling mem_init() before calling spl_init().

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: spl: atmel: bring in serial device before init
Wenyou Yang [Fri, 24 Mar 2017 03:34:04 +0000 (11:34 +0800)]
ARM: spl: atmel: bring in serial device before init

Before setting up the serial communications, bring in the serial
device from the device tree file.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: at91: spl: specify MMC and NAND boot device
Wenyou Yang [Fri, 24 Mar 2017 03:34:03 +0000 (11:34 +0800)]
ARM: at91: spl: specify MMC and NAND boot device

When OF_CONTROL is enabled, MMC boot device should not be detected
automatically, it should be MMC1 fixedly only the status "enabled"
is available.

Add NAND Flash boot device as well.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: dts: at91: add dts file for sama5d4ek
Wenyou Yang [Fri, 24 Mar 2017 01:18:44 +0000 (09:18 +0800)]
ARM: dts: at91: add dts file for sama5d4ek

Add the device tree file for sama5d4ek board.

The dts file is copied from Linux-4.4, do the following changes.
 - add the "u-boot,dm-pre-reloc" property to determine which nodes
   which are needed by SPL and by the board_init_f stage.
 - fix the compilation warning.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: dts: at91: add dts files for sama5d4 Xplained
Wenyou Yang [Fri, 24 Mar 2017 01:18:43 +0000 (09:18 +0800)]
ARM: dts: at91: add dts files for sama5d4 Xplained

Add the device tree files for sama5d4 Xplained board.

The dts files are copied from Linux-4.4, do the following changes.
 - add reg property for pinctrl node.
 - move the gpio nodes(pioA, pioB, pioC ...) from the pinctrl child's
   nodes to its slibling nodes.
 - add the "u-boot,dm-pre-reloc" property to determine which nodes
   which are needed by SPL and by the board_init_f stage.
 - fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: at91: dt: add dts file for sama5d3 Xplained
Wenyou Yang [Fri, 24 Mar 2017 01:18:42 +0000 (09:18 +0800)]
ARM: at91: dt: add dts file for sama5d3 Xplained

Add the device tree file for sama5d3 Xplained board.

The dts files are copied from the Linux-4.9, do changes as below.
 - add the "u-boot,dm-pre-reloc" property to determine which nodes
   which are needed by SPL and by the board_init_f stage.
 - fix the compile warning.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: at91: dt: add dts files for sama5d3xek board
Wenyou Yang [Fri, 24 Mar 2017 01:18:41 +0000 (09:18 +0800)]
ARM: at91: dt: add dts files for sama5d3xek board

Add the device tree files for sama5d3xek board.

The dts files are copied from Linux-4.9, do the changes as below.
 - add reg property for the pinctrl node.
 - move the gpio nodes (pioA, pioB, pioC ...) as the pinctrl's
   slibling nodes.
 - add the "u-boot,dm-pre-reloc" property to determine which nodes
   which are needed by SPL and by the board_init_f stage.
 - fix the compile warning.
 - add spi0 node aliases.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agogpio: at91_gpio: add the clock support
Wenyou Yang [Thu, 23 Mar 2017 04:46:21 +0000 (12:46 +0800)]
gpio: at91_gpio: add the clock support

Add the clock support.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agogpio: at91_gpio: add the device tree support
Wenyou Yang [Thu, 23 Mar 2017 04:46:20 +0000 (12:46 +0800)]
gpio: at91_gpio: add the device tree support

Add the device tree support.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agogpio: Kconfig: add CONFIG_AT91_GPIO option
Wenyou Yang [Thu, 23 Mar 2017 04:46:19 +0000 (12:46 +0800)]
gpio: Kconfig: add CONFIG_AT91_GPIO option

The CONFIG_AT91_GPIO option is used to select AT91 PIO GPIO driver.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agopinctrl: at91: add pinctrl driver
Wenyou Yang [Thu, 23 Mar 2017 04:44:37 +0000 (12:44 +0800)]
pinctrl: at91: add pinctrl driver

AT91 PIO controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.

Each SoC will have to describe the its limitation and pin
configuration via device tree. This will allow to do not need
to touch the C code when adding new SoC if the IP version is
supported.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agogpio: at91_gpio: remove CPU_HAS_PIO3 macro
Wenyou Yang [Thu, 23 Mar 2017 04:44:36 +0000 (12:44 +0800)]
gpio: at91_gpio: remove CPU_HAS_PIO3 macro

The intention of the removal is the preparation to introduce the
new AT91 PIO pinctrl driver.

Use the union to make the PIO3 and PIO2's registers be together
and make their offset aligned.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomtd: nand: atmel: use another functions to set gpio value
Wenyou Yang [Thu, 23 Mar 2017 04:55:21 +0000 (12:55 +0800)]
mtd: nand: atmel: use another functions to set gpio value

Because there isn't the implementation of gpio_set/get_value()
and gpio_set/get_value() after the at91 gpio driver is converted
to support the driver model, use at91_set_gpio_value() and
at91_get_gpio_value()

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoARM: at91: gpio: fix at91_set_gpio_value() define
Wenyou Yang [Thu, 23 Mar 2017 04:55:20 +0000 (12:55 +0800)]
ARM: at91: gpio: fix at91_set_gpio_value() define

When the CONFIG_ATMEL_LEGACY is undefined, according to the following
defines, at91_set_gpio_value() references to at91_set_pio_value(x, y)
with two parameters.
 #define at91_set_gpio_value(x, y)      at91_set_pio_value(x, y)
 #define at91_get_gpio_value(x)         at91_get_pio_value(x)

But there isn't the implementation of at91_set_pio_value(x, y) with
two parameters in U-Boot. This is an error.

Same as at91_get_gpio_value(x) define.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agobuildman: Handle commit subjects containing unicode
Simon Glass [Thu, 13 Apr 2017 00:23:26 +0000 (18:23 -0600)]
buildman: Handle commit subjects containing unicode

One of these has crept in in this commit:

40a808f1 ARCv2: SLC: Make sure busy bit is set properly on SLC flushing

Adjust buildman to handle it.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agotools: allow to override python
Stefano Babic [Wed, 5 Apr 2017 15:46:41 +0000 (17:46 +0200)]
tools: allow to override python

Not force to use python from PATH. Issue was noted when building with
Yocto, because python from the distro is always taken instead of
python-native built during Yocto process.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodm: core: Ensure DMA regions start up with the cache clean
Simon Glass [Tue, 4 Apr 2017 19:00:19 +0000 (13:00 -0600)]
dm: core: Ensure DMA regions start up with the cache clean

There is a strange interaction with drivers which use DMA if the cache
starts off in a dirty state. Buffer space which the driver reads (but has
not previously written) can contain zero bytes from alloc_priv(). This can
cause corruption of the memory used by DMA for incoming data.

Fix this and add a comment to explain the problem.

This allows the dwc2 driver to work correctly with driver model, for
example.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agocore/uclass: Print name of device in uclass_find_device_by_seq()
Alexandru Gagniuc [Tue, 4 Apr 2017 17:46:56 +0000 (10:46 -0700)]
core/uclass: Print name of device in uclass_find_device_by_seq()

uclass_find_device_by_seq() prints seq and req_seq when debugging is
enabled, but this information is not very useful by itself. Add the
name of he driver to this information. This improves debugging as it
shows which devices are being considered.

Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agofdtgrep: Cope with the /aliases node being last
Simon Glass [Sun, 2 Apr 2017 18:26:44 +0000 (12:26 -0600)]
fdtgrep: Cope with the /aliases node being last

With skeleton.dtsi being dropped it is more likely that the /aliases node
will be last in the device tree. Update fdtgrep to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agodtoc: Decode val if it's a byte string
George McCollister [Thu, 30 Mar 2017 14:44:25 +0000 (09:44 -0500)]
dtoc: Decode val if it's a byte string

With Python 3.5.2 encode will throw an exception if val is a byte array.
Decode it to a string first. This assumes it's utf-8, if it's not valid
utf-8 it will throw an exception.

Signed-off-by: George McCollister <george.mccollister@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agopatman: Convert byte arrays to strings
George McCollister [Thu, 30 Mar 2017 14:44:24 +0000 (09:44 -0500)]
patman: Convert byte arrays to strings

os.read() returns a byte array in Python 3.5.2 and needs to be converted
into a string. Check if the returned value is an instance of bytes and
if it is decode it as a utf-8 string. If it is not a utf-8 encoded string
the decoding may fail with an exception.

Prior to this fix the comparisions check data == "" would fail when data
was b'' and would cause an infinite memory leaking loop. joins would
also fail with an exception below but due to the infinite loop it never
made it that far.

Signed-off-by: George McCollister <george.mccollister@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agoserial: ns16550: Link in the DM driver when when using platdata
Alexandru Gagniuc [Mon, 27 Mar 2017 19:54:19 +0000 (12:54 -0700)]
serial: ns16550: Link in the DM driver when when using platdata

Do not condition the compilation of the U_BOOT_DRIVER by !OF_PLATDATA.
This is inconsistent with the majority of other drivers. This also
blocks OF_PLATDATA boards with an 16550-compatible serial from using
serial in SPL.

Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added tweak for rock to avoid a TPL build failure:
Signed-off-by: Simon Glass <sjg@chromium.org>