Wolfgang Denk [Tue, 30 May 2006 21:32:44 +0000 (23:32 +0200)]
Fix PCI to memory window size problems on PM82x boards
We use the "automatic" mode that was used for the MPC8266ADS and
MPC8272 boards. Eventually this should be used on all boards?]
Patch by Wolfgang Grandegger, 17 Jan 2006
Wolfgang Denk [Tue, 30 May 2006 13:56:48 +0000 (15:56 +0200)]
* Update Intel IXP4xx support
- Add IXP4xx NPE ethernet MAC support
- Add support for Intel IXDPG425 board
- Add support for Prodrive PDNB3 board
- Add IRQ support
Patch by Stefan Roese, 23 May 2006
[This patch does not include cpu/ixp/npe/IxNpeMicrocode.c which still
sufferes from licensing issues. Blame Intel.]
Stefan Roese [Wed, 10 May 2006 09:49:37 +0000 (11:49 +0200)]
OMAP 5912/OSK: update EMIFS CS1 timings:
Problems have been seen in the linux kernel's smc91x network driver
due to improper bus timings. The latest 2.6 OMAP kernels currently
have a workaround, but this fix belongs in u-boot.
Patch by Kevin Hilman, 13 Oct 2005
Stefan Roese [Wed, 10 May 2006 08:55:16 +0000 (10:55 +0200)]
Update omap5912osk board support
- Fix OMAP support that omap5912osk compiles in current source tree
- Update with code from "http://omap.spectrumdigital.com/osk5912"
to fix problems with DDR initialization
- Fix timer setup
- Use CFI flash driver and support complete 32MB of onboard flash
- Add "print_cpuinfo()" and "checkboard()" functions to display
CPU (with frequency) and Board infos
Patch by Stefan Roese, 10 May 2006
Kumar Gala [Thu, 20 Apr 2006 18:45:32 +0000 (13:45 -0500)]
Merged MPC8349ADS and MPC8349EMDS ports into MPC8349EMDS port:
- Removed MPC8349ADS port
- Added PCI support to MPC8349ADS
- reworked memory map to allow mapping of all regions with BATs
Patch by Kumar Gala 20 Apr 2006
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Wolfgang Denk [Tue, 18 Apr 2006 09:05:03 +0000 (11:05 +0200)]
MPC5200: enable snooping of DMA transactions on XLB even if no PCI
is configured; othrwise DMA accesses aren't cache coherent which
causes for example USB to fail.
* Fix dbau1x00 Board
- Fix dbau1x00 boards broken by dbau1550 patch
PLL:s were not set for boards other than 1550.
Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST.
Default boot is now bootp for cards other than 1550.
Patch by Thomas Lange Aug 10 2005
- fix some compiler/parser error, if using m68k tool chain
- optical fix for protect on/off all messages, if using more
then one bank
Patch by Jens Scharsig, 28 July 2005
Remove dependencies between DoC code and old legacy NAND driver.
Necessary defines and data structures were copied to DoC specific files
so that legacy NAND code could be entirely removed from u-boot tree
in the near future.
Stefan Roese [Sat, 1 Apr 2006 11:41:03 +0000 (13:41 +0200)]
* Changes/fixes for drivers/cfi_flash.c:
- Add Intel legacy lock/unlock support to common CFI driver
On some Intel flash's (e.g. Intel J3) legacy unlocking is
supported, meaning that unlocking of one sector will unlock
all sectors of this bank. Using this feature, unlocking
of all sectors upon startup (via env var "unlock=yes") will
get much faster.
- Fixed problem with multiple reads of envronment variable
"unlock" as pointed out by Reinhard Arlt & Anders Larsen.
- Removed unwanted linefeeds from "protect" command when
CFG_FLASH_PROTECTION is enabled.
- Changed p3p400 board to use CFG_FLASH_PROTECTION
Patch by Stefan Roese, 01 Apr 2006
* Changes/fixes for drivers/cfi_flash.c:
- Correctly handle the cases where CFG_HZ != 1000 (several
XScale-based boards)
- Fix the timeout calculation of buffered writes (off by a
factor of 1000)
Patch by Anders Larsen, 31 Mar 2006
Stefan Roese [Fri, 17 Mar 2006 09:28:24 +0000 (10:28 +0100)]
Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)
405 SDRAM: - The SDRAM parameters can now be defined in the board
config file and the 405 SDRAM controller values will
be calculated upon bootup (see PPChameleonEVB).
When those settings are not defined in the board
config file, the register setup will be as it is now,
so this implementation should not break any current
design using this code.
Thanks to Andrea Marson from DAVE for this patch.
440 DDR: - Added function sdram_tr1_set to auto calculate the
TR1 value for the DDR.
- Added ECC support (see p3p440).