Matthias Fuchs [Thu, 17 Jan 2008 06:45:05 +0000 (07:45 +0100)]
net: add 'ethrotate' environment variable
[PATCH] net: add 'ethrotate' environment variable
This patch replaces the buildtime configuration option
CONFIG_NET_DO_NOT_TRY_ANOTHER through the 'ethrotate' runtime
configuration veriable. See README.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
drivers/net/rtl8139.c: rx_status should be le32_to_cpu(rx_status).
rx_status on the memory is basically in LE, but needs to be handled in CPU
endian. le32_to_cpu() takes up this mission. Even if on the sane hardware,
it'll work fine.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Cc: Masami Komiya <mkomiya@sonare.it> Cc: Lucas Jin <lucasjin@gmail.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
"to = (currticks() + RTL_TIMEOUT)" has possibilities to wrap around. If it
does, the condition "(currticks() < to)" becomes invalid and immediately
leads to tx timeout error. This patch introduces the fine-graded udely(10)
loops to ease the impact of wrapping around.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Cc: Masami Komiya <mkomiya@sonare.it> Cc: Lucas Jin <lucasjin@gmail.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Joakim Tjernlund [Wed, 16 Jan 2008 08:40:41 +0000 (09:40 +0100)]
Remove annoying debug printout for PHY less boards.
PHY less board prints out lots of "read wrong ...":
read wrong value : mii_id 3,mii_reg 2, base e0102320
read wrong value : mii_id 3,mii_reg 3, base e0102320
UEC: PHY is Generic MII (ffffffff)
read wrong value : mii_id 3,mii_reg 4, base e0102320
read wrong value : mii_id 3,mii_reg 0, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 5, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 5, base e0102320
FSL UEC0: Full Duplex
FSL UEC0: Speed 100BT
FSL UEC0: Link is up
Using FSL UEC0 device
Make this printout depend on UEC_VERBOSE_DEBUG and
remove its definition in uec_phy.c
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Kim Phillips [Tue, 15 Jan 2008 20:11:00 +0000 (14:11 -0600)]
net: reduce boot latency on QE UEC based boards
actually polling for PHY autonegotiation to finish enables us to remove the
5 second boot prompt latency present on QE based boards.
call to qe_set_mii_clk_src in init_phy, and mv call to init_phy from
uec_initialize to uec_init by Joakim Tjernlund; autonegotiation wait
code shamelessly stolen from tsec driver.
also rm unused CONFIG_RMII_MODE code.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
TSEC driver: Change MDIO support to allow access to any PHYs on the MDIO bus
The current TSEC driver limits MDIO access to the devices that have been configured as attached
to a TSEC MAC. This patch allows access to any PHY device on the MDIO bus through the 'mii' commands.
Signed-off-by: Michael Firth <michael.firth@bt.com> Acked-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
David Saada [Tue, 15 Jan 2008 08:40:24 +0000 (10:40 +0200)]
QE UEC: Extend number of supported UECs to 4
This patch extends the number of supported UECs to 4. Note that the
problem of QE thread resources exhaustion is resolved by setting the
correct number of QE threads according to Ethernet type (GBE or FE).
Signed-off-by: David Saada <david.saada@ecitele.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Dave Liu [Mon, 14 Jan 2008 03:12:01 +0000 (11:12 +0800)]
QE: fix compile warning
qe.c: In function 'qe_upload_firmware':
qe.c:390: warning: pointer targets in passing argument 2
uec.c: In function 'uec_initialize':
uec.c:1236: warning: 'uec_info' may be used uninitialized
Stefan Roese [Mon, 14 Jan 2008 09:05:05 +0000 (10:05 +0100)]
ppc4xx: Update Kilauea CPLD configuration with USB PHY reset bit
Now that bit 29 is the USB PHY reset bit, update the Kilauea port
to remove the USB PHY reset after powerup. The CPLD will keep the
USB PHY in reset (active low) until the bit is set to 1 in
board_early_init_f().
- get rid of "version" target whichdidn't really work
- make autoconf.mk depend on version_autogenerated.h to make sure
to rebuild files as needed
- add XECHO macro to allow for silent build using "make -s"
Larry Johnson [Fri, 11 Jan 2008 03:23:39 +0000 (22:23 -0500)]
Fix "i2c sdram" command for DDR2 DIMMs
Many of the SPD bytes for DDR2 SDRAM are not interpreted correctly by the
"i2c sdram" command. This patch provides correct alternative
interpretations when DDR2 memory is detected.
Wolfgang Denk [Sat, 12 Jan 2008 19:31:39 +0000 (20:31 +0100)]
Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections
With recent toolchain versions, some boards would not build because
or errors like this one (here for ocotea board when building with
ELDK 4.2 beta):
ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab]
For many boards, the .bss section is big enough that it wraps around
at the end of the address space (0xFFFFFFFF), so the problem will not
be visible unless you use a 64 bit tool chain for development. On
some boards however, changes to the code size (due to different
optimizations) we bail out with section overlaps like above.
The fix is to add the NOLOAD attribute to the .bss and .sbss
sections, telling the linker that .bss does not consume any space in
the image.
Add support for the TK885D baseboard from TELE-DATA
The TK885D board uses a TQM885D module from TQ, this port adds an
own configuration file and adds a last_stage_init() method to
configure the two PHYs, depending on the phy_auto_nego environment
variable.
Fix video console newline and carriage return handling
Lines of the lenght CONSOLE_COLS or greater than CONSOLE_COLS
are not displayed correctly. This is an attempt to fix
this issue. Also add carriage return handling.
Dave Liu [Thu, 10 Jan 2008 15:05:00 +0000 (23:05 +0800)]
mpc83xx: Fix the typo in mpc83xx.h
The SPCR about TSEC priority is wrong.
Signed-off-by: Michael Barkowski <Michael.Barkowski@freescale.com> Signed-off-by: Joe D'Abbraccio <Joe.D'abbraccio@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Wed, 9 Jan 2008 17:57:47 +0000 (20:57 +0300)]
mpc83xx: add support for the MPC8360E-RDK
This is MPC8360E based board with:
- 256MB fixed SDRAM;
- 8MB Intel Strata NOR flash;
- StMICRO 64MiB NAND flash;
- two 10/100/1000 ethernet ports connected via Broadcom
BCM5481 PHYs;
- two 10/100 ethernet ports connected via National
DP83848 PHYs;
- one PCI and one miniPCI slots;
- four serial ports (two NS16550-compatible, two UCCs);
- four USB ports working through MPC8360E "FHCI" USB controller;
- Fujitsu MB86277 graphics controller;
- Analog to Digital Converter/Touchscreen controller, AD7843
connected to SPI.
Features not supported in this patch are:
- StMICRO 64MiB NAND flash (patch sent);
- MINT framebuffer initialization (patch is pending);
- Fetching production information from the EEPROM via I2C;
- FHCI USB;
- Two slow UCCs used as RS-485 UARTs.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Becky Bruce [Thu, 10 Jan 2008 20:00:28 +0000 (14:00 -0600)]
86xx: Support 2GB DIMMs
Configure the number of bits used to address the banks inside the SDRAM
device. The default register value of 0 means 2 bits to address 4 banks.
Higher capacity devices like a 2GB DIMM require 3 bits to address 8 banks.
Ben Warren [Wed, 9 Jan 2008 23:15:53 +0000 (18:15 -0500)]
Fix Ethernet init() return codes
Change return values of init() functions in all Ethernet drivers to conform
to the following:
>=0: Success
<0: Failure
All drivers going forward should return 0 on success. Current drivers that
return 1 on success were left as-is to minimize changes.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-By: Timur Tabi <timur@freescale.com>
Timur Tabi [Mon, 7 Jan 2008 19:31:19 +0000 (13:31 -0600)]
85xx: add ability to upload QE firmware
Define the layout of a binary blob that contains a QE firmware and instructions
on how to upload it. Add function qe_upload_firmware() to parse the blob and
perform the actual upload. Add command-line command "qe fw" to take a firmware
blob in memory and upload it. Update ft_cpu_setup() on 85xx to create the
'firmware' device tree node if U-Boot has uploaded a firmware. Fully define
'struct rsp' in immap_qe.h to include the actual RISC Special Registers.
Kumar Gala [Wed, 19 Dec 2007 07:18:15 +0000 (01:18 -0600)]
Reworked FSL Book-E TLB macros to be more readable
The old macros made it difficult to know what WIMGE and perm bits
were set for a TLB entry. Actually use the bit masks for these items
since they are only a single bit.
Also moved the macros into mmu.h out of e500.h since they aren't specific
to e500.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>