Chen-Yu Tsai [Tue, 5 Dec 2017 06:00:07 +0000 (14:00 +0800)]
sunxi: Fix UART console index for A33-OLinuXino
The A33-OLinuXino defconfig was using the default CONS_INDEX value for
A33, which actually points to the R_UART, which is routed to the GPIO
header without proper pull-ups or diodes. The board has a separate
header for UART0, which are routed to pins PB0 and PB1. This header
is properly marked and is likely the first pins any user would try
to get a console.
Fix CONS_INDEX in the defconfig so the console appears on UART0.
Fixes: ca5c37026be4 ("sunxi: Add support for A33-OLinuXino board") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Maxime Ripard [Tue, 14 Nov 2017 20:37:35 +0000 (21:37 +0100)]
fastboot: Enable flashing by default on sunxi
Now that more and more devices are built using eMMC, providing a way to
easily flash the system without too much hassle seems like a right thing to
do.
Since fastboot is the most deployed tool to do that these days, we can just
rely on it to provide a way to flash the various components in the system
(SPL, U-Boot and the system itself) easily, especially since you can upload
the U-Boot hosting the fastboot "server" through FEL.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 14 Nov 2017 20:24:00 +0000 (21:24 +0100)]
sunxi: Add default partition scheme
The partitions variable is especially useful to create a partition table
from U-Boot, either directly from the U-Boot shell, or through flashing
tools like fastboot and its oem format command.
This is especially useful on devices with an eMMC you can't take out to
flash from another system, and booting a Linux system first to flash our
system then is not really practical.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 14 Nov 2017 20:07:51 +0000 (21:07 +0100)]
part: efi: Add default number of partition entries for sunxi
The SPL must be located at 8kB (16 sectors) offset. That's right in the
middle of the GPT, so we need to define a smaller amount of partitions to
accomodate for that location.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 14 Nov 2017 19:50:04 +0000 (20:50 +0100)]
part: efi: Add a Kconfig option for the number of partition entries
On some SoCs, the SPL needs to be located right in the middle of the GPT
partition entries.
One way to work around that is to create partition entries for a smaller
number of partitions to accomodate with where the SPL will be. Create a
Kconfig option to allow to do that.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>From revision J the board uses new phy chip LAN8710. Compared
with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
not to work. To fix this PA17 is muxed with GMAC function. This
makes the pin output-low.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
sunxi: video: HDMI: split VSYNC and HSYNC polarity settings
These are actually different bits, and since some monitors (Benq BL2420PT)
have modes with different HSYNC and VSYNC polarity, we should set them
independently
Tested on Pine64-LTS with Benq BL2420PT monitor.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Icenowy Zheng [Mon, 30 Oct 2017 23:36:28 +0000 (07:36 +0800)]
sunxi: set the default CPUx frequency of H5 to 816MHz
Some H5 boards are designed to start at 1.1V CPUx voltage (e.g. Nano Pi
NEO2), which may not work properly at 1008MHz if the chip's quality is
not so good.
Lower the default CPUx frequency of H5 to 816MHz.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com>
Tom Rini [Mon, 6 Nov 2017 23:15:11 +0000 (18:15 -0500)]
Kconfig: Introduce USE_BOOTCOMMAND and migrate BOOTCOMMAND
We first introduce CONFIG_USE_BOOTCOMMAND, similar to
CONFIG_USE_BOOTARGS. We then migrate CONFIG_BOOTCOMMAND for most
CONFIG_DISTRO_DEFAULT users. In some cases platforms have a complex
scheme around this usage, and these have been defered for the moment so
that platform maintainers can work on a migration plan.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
Dongjin Kim [Sat, 28 Oct 2017 04:22:27 +0000 (00:22 -0400)]
arm: config: fix default console only to specify the device
Since CONFIG_DEFAULT_CONSOLE is already started with "console=",
the console argument in CONFIG_EXTRA_ENV_SETTINGS is expanded to
"console=console=ttySAC1,115200n8" and this causes the wrong
console device.
Minghuan Lian [Fri, 20 Oct 2017 02:45:50 +0000 (10:45 +0800)]
dm: pci: change bus number register setting compliant with Linux
This patch is to change U-Boot PCI bus assignement compliant with Linux.
It means each PCIe controller's bus number is 0, not the current maximum
PCI bus number, when start to scan this controller.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Wilson Lee [Fri, 3 Nov 2017 06:39:51 +0000 (23:39 -0700)]
serial: nulldev: Implement "pending" function to fix tstc return "true"
In U-boot, serial_tstc was use to determine is there have a character in
serial console that pending for read. If there is no "pending" function
implemented in serial driver, the serial-uclass will return "true(1)"
to indicate there have a character pending to read.
Thus, read a character from nulldev serial will result in continuous
getting -EAGAIN return which might lead system to hang.
This commit is to fix a bug in nulldev serial which implement "pending"
function in nulldev serial to always indicate there is no character in
console that pending for read.
Signed-off-by: Wilson Lee <wilson.lee@ni.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Keng Soon Cheah <keng.soon.cheah@ni.com> Cc: Chen Yee Chew <chen.yee.chew@ni.com> Cc: Bin Meng <bmeng.cn@gmail.com>
Stephen Warren [Fri, 3 Nov 2017 00:11:27 +0000 (18:11 -0600)]
arm64: support running at addr other than linked to
This is required in the case where U-Boot is typically loaded and run at
a particular address, but for some reason the RAM at that location is not
available, e.g. due to memory fragmentation loading other boot binaries or
firmware, splitting an SMP complex between various different OSs without
using e.g. the EL2 second-stage page tables to hide the memory asignments,
or due to known ECC failures.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Fri, 27 Oct 2017 17:04:08 +0000 (11:04 -0600)]
test/py: add timestamps to log
It can be useful to record how long tests take; this can help debug slow
running test systems or track changes in performance over time. Enhance
the test system to record timestamps while running test:
- Whenever a new log file section is started.
- After U-Boot is started and communication has been established.
- After each host or U-Boot command is executed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Patrice Chotard [Thu, 26 Oct 2017 11:23:19 +0000 (13:23 +0200)]
clk: clk_stm32f7: fix PLL clock division factor
Fix clock division factor initialization for RCC_PLLCFGR
registers.
PLLR bits (bit 31-28) in RCC_PLLCFGR must not be cleared,
it's a forbidden value. So update RCC_PLLCFGR using
clrsetbits_le32() to set only necessary bits fields.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Update arm_pl180_mmci_init() prototype by adding struct mmc**
param. This is needed before converting this driver to driver model
in order to use arm_pl180_mmci_init() in driver model and in none
driver model implementation
Masahiro Yamada [Tue, 17 Oct 2017 13:30:20 +0000 (22:30 +0900)]
lib: libfdt: wrap scripts/dtc/libfdt/* where possible
lib/libfdt/ and scripts/dtc/libfdt have the same copies for the
followings 6 files:
fdt.c fdt_addresses.c fdt_empty_tree.c fdt_overlay.c fdt_strerr.c
fdt_sw.c
Make them a wrapper of scripts/dtc/libfdt/*. This is exactly what
Linux does to sync libfdt. In order to make is possible, import
<linux/libfdt.h> and <linux/libfdt_env.h> from Linux 4.14-rc5.
Unfortunately, U-Boot locally modified the following 3 files:
fdt_ro.c fdt_wip.c fdt_rw.c
The fdt_region.c is U-Boot own file.
I did not touch them in order to avoid unpredictable impact.
Masahiro Yamada [Tue, 17 Oct 2017 13:30:18 +0000 (22:30 +0900)]
tools: use files from scripts/dtc/libfdt where possible
Prior to this commit, tools/Makefile pulls all libfdt files from
lib/libfdt.
lib/libfdt/ and scripts/dtc/libfdt have the same copies for the
followings 6 files:
fdt.c fdt_addresses.c fdt_empty_tree.c fdt_overlay.c fdt_strerr.c
fdt_sw.c
This commit changes them to #include ones from scripts/dtc/libfdt.
Unfortunately, U-Boot locally modified the following 3 files:
fdt_ro.c fdt_wip.c fdt_rw.c
I did not touch them in order to avoid unpredictable impact.
The fdt_region.c is U-Boot own file. This is also borrowed from
lib/libfdt/.
Masahiro Yamada [Tue, 17 Oct 2017 04:42:44 +0000 (13:42 +0900)]
pylibfdt: compile pylibfdt only when dtoc/binman is necessary
Currently, pylibfdt is always compiled if swig is installed on your
machine. It is really annoying because most of targets (excepts
x86, sunxi, rockchip) do not use dtoc or binman.
"checkbinman" and "checkdtoc" are wrong. It is odd that the final
build stage checks if we have built necessary tools. If your platform
depends on dtoc/binman, you must be able to build pylibfdt. If swig
is not installed, it should fail immediately.
I added PYLIBFDT, DTOC, BINMAN entries to Kconfig. They should be
property select:ed by platforms that need them. Kbuild will descend
into scripts/dtc/pylibfdt/ only when CONFIG_PYLIBFDT is enabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 17 Oct 2017 04:42:43 +0000 (13:42 +0900)]
pylibfdt: move pylibfdt to scripts/dtc/pylibfdt and refactor makefile
The pylibfdt is used by dtoc (and, indirectly by binman), but there
is no reason why it must be generated in the tools/ directory.
Recently, U-Boot switched over to the bundled DTC, and the directory
structure under scripts/dtc/ now mirrors the upstream DTC project.
So, scripts/dtc/pylibfdt is the best location.
I also rewrote the Makefile in a cleaner Kbuild style.
The scripts from the upstream have been moved as follows:
Keerthy [Thu, 12 Oct 2017 04:48:45 +0000 (10:18 +0530)]
board: ti: dra71x-evm: Hook LDO1 of LP8733 to EN_PIN
All regulators are hooked to EN_Pin at reset so that EN Pin controls
their state. Hook the LDO1 regulator to EN pin which at reset is not
hooked. This applies only to LP8733.
Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Felix Brack [Wed, 11 Oct 2017 16:42:23 +0000 (18:42 +0200)]
am33xx: Add a function to query MPU voltage in uV
For the DM TPS65910 driver I'm working on, querying the MPU voltage
should return a value in uV. This value can then be used by the
regulator's standard function set_value to set the MPU voltage.
Signed-off-by: Felix Brack <fb@ltec.ch> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Jon Nettleton [Mon, 13 Nov 2017 05:04:30 +0000 (07:04 +0200)]
arm: mvebu: clearfog: Fix SPI-NOR flash access
The production variant of the SPI flash used by the clearfog
devices are based on winbond chips. Additionally enable
SPI_FLASH_BAR since some variants will have 16MB of flash
that requires this to be enabled.
Remove the default speed and mode; these values are taken from the
device tree when CONFIG_DM_SPI_FLASH is enabled.
Add default bus, so that 'sf' detects the SPI flash by default.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: remove speed/mode; add bus; move winbond to defconfig] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
Jon Nettleton [Mon, 6 Nov 2017 08:33:21 +0000 (10:33 +0200)]
arm: mvebu: clearfog: enable XHCI USB
Enable the driver by default for the clearfog boards since the external
port is configured for XHCI.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: split from the SoC setup patch] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
Jon Nettleton [Mon, 6 Nov 2017 08:33:20 +0000 (10:33 +0200)]
arm: mvebu: Add board_setup for xhci hardware
This fixes the USB 3.0 support for the a38x SOC.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: use fdt_addr_t] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
Jon Nettleton [Mon, 6 Nov 2017 08:33:19 +0000 (10:33 +0200)]
mvebu: usb: xhci: a38x support
This makes the initial changes need to support the
a38x series of SOCs. It adds the device-tree identifier
as well as changing the board_support function to take
the IO address designated by device-tree.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: use fdt_addr_t; update 37xx and 8K implementations] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
Ashish Kumar [Mon, 6 Nov 2017 07:49:28 +0000 (13:19 +0530)]
armv8: ls1088ardb: Add distro boot support
Distro boot support gives flexibility to run distro RFS like Ubuntu
being deployed from SD card or SATA drive. If it fails to detect
external storage, fall back to qspi/sd boot.
Enable this by default in RDB's defconfig by selecting
CONFIG_DISTRO_DEFAULTS
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Zhang Ying <zhangying@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Kurt Kanzenbach [Fri, 20 Oct 2017 09:44:25 +0000 (11:44 +0200)]
mtd: nand: fsl-ifc: fix support of multiple NAND devices
Currently the chipselect used to identify the corresponding NAND chip
is stored at the controller and only set during fsl_ifc_chip_init().
This way, only the last NAND chip is working, as the previous value
of cs_nand gets overwritten.
In order to solve this issue the chipselect is computed on demand by
evaluating the bank variable. Thus, the correct chipselect for each
NAND chip operation is used.
Tested on hardware with two NAND chips connected to the IFC
controller.
Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de> Acked-by: Scott Wood <oss@buserror.net>
[YS: reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
After adding the "mdelay(500);"
line that was lost in the path the error is gone.
Signed-off-by: Werner Böllmann <Werner.Boellmann@fh-dortmund.de>
[Rebased and updated change and commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Jagan Teki [Fri, 10 Nov 2017 11:48:44 +0000 (17:18 +0530)]
rockchip: configs: vyasa: Update falcon offsets
Update the falcon offsets for args to 16MB and kernel to 17MB
Since the below commit updated U-Boot proper location along
with rockchip boot image offsets
"spl: set SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x4000 for rockchip"
(sha1: 8f4d62b403db45dfa8b1cadb9da9096c79b7df47)
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Jagan Teki [Fri, 10 Nov 2017 11:48:43 +0000 (17:18 +0530)]
rockchip: doc: Fix U-Boot proper location for falcon
This patch fixed U-Boot proper location has been
missed to update in bewlo commit
"rockchip: doc: update U-Boot location info"
(sha1: 73e6dbe855f357a8330cfd53ff3033303611c1ad)
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The U-Boot location has been moved to block 16384.
This is 8MB, not 4MB.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The following error has been observed on i.MX25 with a high-speed SDSC
card:
Data Write Failed in PIO Mode.
It was caused by the timeout set on PRSSTAT.BWEN, which was triggered
because this bit takes 15 ms to be set after writing the first block to
DATPORT with this card. Without this timeout, all the blocks are
properly written.
This timeout was implemented by decrementing a variable, so it was
depending on the CPU frequency. Fix this issue by setting this timeout
to a long enough absolute duration (500 ms).
Fabio Estevam [Fri, 3 Nov 2017 15:40:10 +0000 (13:40 -0200)]
mx51: Select the ESDHC_A001 erratum
When a high speed card is connected to mx51evk the following error is seen:
U-Boot 2017.11-rc2 (Oct 18 2017 - 13:49:26 -0200)
CPU: Freescale i.MX51 rev3.0 at 800 MHz
Reset cause: POR
Board: MX51EVK
DRAM: 512 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - read failed, using default environment
In: serial
Out: serial
Err: serial
Net: FEC
Hit any key to stop autoboot: 0
=> saveenv
Saving Environment to MMC...
Writing to MMC(0)... failed
The root cause for the failure is the eSDHC-A001 erratum:
"eSDHC-A001 : Data timeout counter (SYSCTL[DTOCV]) is not reliable for
values of 0x4,0x8, and 0xC" that is listed
on some PowerArchitecture chips:
https://www.nxp.com/files-static/32bit/doc/errata/MPC8379ECE.pdf
Even though eSDHC-A001 is not documented on the i.MX51 errata document,
I have confirmed with the NXP design team that this erratum does affect
i.MX51, so fix the problem by selecting SYS_FSL_ERRATUM_ESDHC_A001
at SoC level.
The i.MX51 ts4800 board already selects this option, but it is better
to move this selection to the i.MX51 SoC level instead.
Successfully tested with a high speed SD card on a mx51evk board.
CPU: Freescale i.MX25 rev1.2 at 399 MHz
Reset cause: POR
Board: MX25PDK
I2C: ready
DRAM: 64 MiB
No arch specific invalidate_icache_all available!
MMC: FSL_SDHC: 0
*** Warning - read failed, using default environment
In: serial
Out: serial
Err: serial
Net: FEC
Hit any key to stop autoboot: 0
=> saveenv
Saving Environment to MMC...
Writing to MMC(0)... failed
, which prevents any usage of the SD card.
The root cause for the failure is the eSDHC-A001 erratum:
"eSDHC-A001 : Data timeout counter (SYSCTL[DTOCV]) is not reliable for
values of 0x4,0x8, and 0xC" that is listed
on some PowerArchitecture chips:
https://www.nxp.com/files-static/32bit/doc/errata/MPC8379ECE.pdf
Even though eSDHC-A001 is not documented on the i.MX25 errata document,
I have confirmed with the NXP design team that this erratum does affect
i.MX25, so fix the problem by selecting SYS_FSL_ERRATUM_ESDHC_A001
at SoC level.
Successfully tested with a high speed SD card on a mx25pdk board.
Fabio Estevam [Fri, 3 Nov 2017 15:40:08 +0000 (13:40 -0200)]
mx25: Move MX25 selection to Kconfig
The motivation for moving MX25 selection to Kconfig is to be
able to better handle MX25 specific errata, so that an errata option
can be selected at SoC level instead of board level.
This selection method also aligns with the way other i.MX SoCs are
selected in U-Boot.
Kever Yang [Thu, 2 Nov 2017 07:16:36 +0000 (15:16 +0800)]
rockchip: remove SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR from defconfig
Use default value 0x4000 for SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR instead
of define a new one.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Thu, 2 Nov 2017 07:16:35 +0000 (15:16 +0800)]
rockchip: doc: update U-Boot location info
Update rockchip U-Boot location to 0x4000/16384.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
projects / u-boot / log