Tomas Vanek [Thu, 23 Nov 2017 08:18:24 +0000 (09:18 +0100)]
target, flash: prepare infrastructure for multi-block blank check
'flash erase_check' command runs a check algorithm on a target
if possible. The algorithm is run repeatedly for each flash sector.
Unfortunately every start and stop of the algorithm impose not negligible
overhead.
In practice it means checking is faster than plain read only for
sectors of size approx 4 kByte or bigger. And checking sectors
as short as 512 bytes runs approx 4 times slower than plain read.
The patch changes API call target_blank_check_memory() and related
to take an array of sectors (or arbitrary memory blocks).
Changes in target-specific checking routines are kept minimal.
They use only the first block from the array and process it by
the unchanged algorithm.
default_flash_blank_check() routine repeats target_blank_check_memory()
until all blocks are checked, so it works with both multi-block
and single-block based checkers.
Change-Id: I0e6c60f2d71364c9c07c09416b04de9268807f5e Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4297 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Structures rtos_standard_Cortex_M4F_stacking and
rtos_standard_Cortex_M4F_FPU_stacking in rtos_standard_stackings.c
where using rtos_standard_Cortex_M3_stack_align for the stack-align
function. This function calls rtos_Cortex_M_stack_align with
XPSR_OFFSET = 0x3c. This offset is correct for cortex-M3 but not for
cortex-M4F and cortex-M4F with fpu. This patch adds stack_align
functions for M4F an M4F_FPU
Change-Id: If6a90b1898fccbb85619a10f3aef5277dd88ce47 Signed-off-by: Armin van der Togt <armin@otheruse.nl>
Reviewed-on: http://openocd.zylin.com/4037 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
On SMP targets, the "target smp" command creates a list of targets
that belong to the SMP cluster. Free this list when a target gets
destroyed on shutdown. For simplicity, the complete list is free'd as
soon as the first target of the SMP cluster is destroyed instead of
individually removing targets from the list.
Tim Newsome [Tue, 6 Mar 2018 22:10:04 +0000 (14:10 -0800)]
Add gdb_report_register_access_error command
With this option enabled (it's disabled by default) errors accessing
registers are returned to gdb. Otherwise they are ignored and success is
reported to gdb. (This is the current behavior.)
We want this for RISC-V, but there's still some cleanup that needs to be
done before that can be upstreamed.
Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I7e56109ea52d18b780c14a07fb35f9e6e8979da4
Reviewed-on: http://openocd.zylin.com/4452 Reviewed-by: Steven Stallion <sstallion@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Tested-by: jenkins
arm_adi_v5: Add ability to ignore the CSYSPWRUPACK bit
The CTRL/STAT register in the ARM DAP DP has a debug power up
ack bit and a system power up ack bit. Some devices do not set
the system power up ack bit until sometime later. To avoid having
the initial target examination fail due to this or to have a
sticky bit error report claim power failure due to this a user
can now specify that this bit should be ignored.
Stefan Arnold [Tue, 17 Oct 2017 08:50:13 +0000 (10:50 +0200)]
flash/nor/at91samd: Add "nvmuserrow" command.
Add option "nvmuserrow" to "at91samd" for changing and reading the register at 0x804000 which represents various fuses.
Change-Id: I6382cc4ac15e6b9681e2f30b0ae60397a6289c3b Signed-off-by: Stefan Arnold <sarnold@sh-sw.de>
Reviewed-on: http://openocd.zylin.com/4260 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tomas Vanek [Wed, 21 Feb 2018 21:19:58 +0000 (22:19 +0100)]
drivers/kitprog: workaround KitProg firmware bug of missing ZLP
KitProg firmware does not send a zero length packet at the end of the bulk-in
transmission of a length divisible by a bulk packet size. This is inconsistent
with the USB specification and results in jtag_libusb_bulk_read()
waits forever when a transmission of specific size is received.
Limit bulk read size to expected number of bytes for problematic tranfer sizes.
Use 1 second timeout as the last resort.
Cody P Schafer [Wed, 7 Mar 2018 16:31:35 +0000 (11:31 -0500)]
target/cortex_m: avoid dwt comparator overflow
Avoid ever overflowing the DWT_COMPARATOR array by allocating space for
16 comparators (the field is masked by 0xf).
On a stm32f767zi chip (on a nucleo-767zi board) I've been seeing crashes
with address sanitizer enabled due to its (apparent) 10 present
comparators. This appears to be due to
https://sourceforge.net/p/openocd/tickets/178/.
In non-address sanitizer builds, this would likely cause some random
memory to be written to in some cases. (see above bug for observations).
Change-Id: I2b7d599eb326236dbc93f74b350c442c9a502c4b Signed-off-by: Cody P Schafer <openocd@codyps.com>
Reviewed-on: http://openocd.zylin.com/4458 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Robert Jordens [Mon, 5 Feb 2018 11:54:29 +0000 (11:54 +0000)]
xilinx-dna.cfg: generic tools for reading Xilinx Device DNA
Most Xilinx FPGA devices contain an embedded, unique device identifier.
The identifier is nonvolatile, permanently programmed into the FPGA, and is
unchangeable providing a great serial / tracking number.
This commit adds generic support for reading the Xilinx Spartan 6 and 7
Series (Kintex, Artix, Ultrascale) Device DNA. The code is similar to
the function in fpga/xilinx-xc6s.cfg for Spartan 6 but the register
addresses are different and the logic has been simplified.
The code was not placed in xilinx-xc7.cfg. The approach of defining taps
in the same file as library code to use them is fundamentally broken on
boards that have more than one FPGA or other chips. This commit (like
the addition of support for Xilinx XADC) starts to remedy that by
splitting library code from board-specific fixed definitions.
The support code is sourced in the Kasli and KC705 board support files
as it was tested on these boards.
Robert Jordens [Mon, 29 Jan 2018 20:12:37 +0000 (21:12 +0100)]
tcl/fpga/xilinx-xadc.cfg: add support for XADC
The 7 Series FPGAs contain an on-chip 12 bit ADC that can probe die
temperature, internal power supply rail voltages as well as external
voltages. The XADC is available both from fabric as well as through the
JTAG TAP.
This code implements access throught the JTAG TAP.
Robert Jordens [Mon, 15 Jan 2018 10:53:48 +0000 (10:53 +0000)]
tcl/board: add support for Kasli
Kasli is an open hardware FPGA board. It is part of the Sinara family of
devices designed to control quantum physics experiments (see Sayma_AMC
for other boards already suppported by openocd).
Kasli was developed as part of the opticlock project. It features a
Xilinx Artix 7 100T FPGA, DDR3 RAM, a clock reconstruction and
distribution network, four 6 Gb/s transceiver links (three SFP and
one SATA) as well as interfaces to up to 12 Eurocard Extension Modules
(EEMs).
Robert Jordens [Thu, 3 Aug 2017 10:25:07 +0000 (12:25 +0200)]
xilinx-xcu: add Xilinx Ultrascale tap data
The Ultrascale series is a bit more complicated to handle since with the
stacked and interconnected dies the IR gets longer. This adds support
for all currently known chips from the Ultrascale family.
- add 'dap create' command to create dap instances
- move all dap subcmmand into the dap instance commands
- keep 'dap info' for convenience
- change all armv7 and armv8 targets to take a dap
instance instead of a jtag chain position
- restructure tap/dap/target relations, jtag tap no
longer references the dap, daps are now independently
created and initialized.
- clean up swd connect
- re-initialize DAP also on JTAG errors (e.g. after reset,
power cycle)
- update documentation
- update target files
Extend the CTI abstraction to be accessible from TCL and
change the 'target' command to accept a cti 'object' instead of a
base address. This also allows accessing CTI instances that are not
related to a configured target.
If we enter debug state from EL0, some registers are not accessible.
Temporarily move to EL1H and back to gain access. Also, fix
armv8_dpm_modeswitch() to not immediately restore the previous state
on elevating the privilege level.
gdb_server: fake step if thread is not current rtos thread
gdb assumes that a rtos can make any thread active at will in response
to a 'Hg' packet. It further assumes that it needs to step-over after
setting a breakpoint on frame #0 of any non-current thread. Both
assumptions are not valid for an actual rtos. We fake the step-over to
not trigger an internal error in gdb. See
https://sourceware.org/bugzilla/show_bug.cgi?id=22925 for details.
gdb_server: fix ignored interrupt request from gdb during stepping
Normally, when a ctrl-c is received from gdb, a SIGINT is reported back
unconditionally to tell gdb that the target has stopped in response.
However when a rtos support was configured, the rtos awareness overwrote
the signal with an actual thread state, which gdb then ignored and got
stuck without the user able to interrupt.
Tomas Vanek [Fri, 16 Feb 2018 08:13:36 +0000 (09:13 +0100)]
drivers/ftdi: free allocated memory
Also uses calloc() for mpsse_ctx->write_buffer to prevent a false
positive valgrind report
"Syscall param ioctl(USBDEVFS_SUBMITURB).buffer points to uninitialised bytes(s)"
Change-Id: I91963371d15c21ea0fee4c40c1da86174db44520 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4418 Tested-by: jenkins
Tomas Vanek [Wed, 14 Feb 2018 21:53:14 +0000 (22:53 +0100)]
openocd.c: call server_quit() for cmd line with -c shutdown
If OpenOCD command line contains -c shutdown, server_quit() is not called.
Though if -c init is also on command line, gdb_server is already initialized.
Call server_quit() on both successful and failure exit from command line.
Change-Id: I6df41c5df045b61d84a5515d1abaa5dc96bc30ac Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4409 Tested-by: jenkins
Paul Fertser [Sat, 13 Jan 2018 14:15:29 +0000 (17:15 +0300)]
target: hla: check return value of hl_dcc_read
This should fix "Assigned value is garbage or undefined" warning
reported by clang:
http://build.openocd.org/job/openocd-clang/doclinks/1/report-391318.html
Change-Id: Ib9488fadca871814328501e415f88822291e0c96 Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4332 Tested-by: jenkins
This is a second try for this patch. I removed the queues from the
previous version. I made it compatible with SRST reset and added
support for those features that could be supported in raw binary
mode.
Change-Id: I96fc06abbea9873e98b414f34afd9043fd9c2a41 Signed-off-by: Mateusz Manowiecki <segmentation@fault.pl>
Reviewed-on: http://openocd.zylin.com/3960 Tested-by: jenkins Reviewed-by: Eric Work <work.eric@gmail.com> Reviewed-by: Thomas Jarosch <thomas.jarosch@intra2net.com> Reviewed-by: Jacob Alexander <haata@kiibohd.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tomas Vanek [Sun, 4 Mar 2018 11:05:15 +0000 (12:05 +0100)]
doc: update openocd.texi after change of gdb-attach default value
While on it
- change some occurrences of gdb to GDB if it refers GDB software
(as oposed to a gdb command)
- add some xrefs
- give more meaningful example of target event definition
- remove obsoleted example of GDB hook-step
Cody P Schafer [Wed, 7 Mar 2018 16:27:02 +0000 (11:27 -0500)]
helper/types: cast to uint32_t,uint16_t to avoid UB by shifting int too far
Without this, we have some types promoted to `int` when they need to be
`unsigned int`.
Here's some ubsan output hitting this:
Unfortunately, what happens is that things get promoted to `int`, but
need to be `unsigned int`. Here's the ubsan output:
src/helper/types.h:126:65: runtime error: left shift of 255 by 24 places cannot be represented in type 'int'
#0 0x55978a612060 in le_to_h_u32 src/helper/types.h:126
#1 0x55978a61ff9e in stlink_usb_read_reg src/jtag/drivers/stlink_usb.c:1539
#2 0x55978a8cfd45 in adapter_load_core_reg_u32 src/target/hla_target.c:67
#3 0x55978a9f48e3 in armv7m_read_core_reg src/target/armv7m.c:236
#4 0x55978a8d24fc in adapter_load_context src/target/hla_target.c:372
#5 0x55978a8d261b in adapter_debug_entry src/target/hla_target.c:396
#6 0x55978a8d3123 in adapter_poll src/target/hla_target.c:457
#7 0x55978a528357 in target_poll src/target/target.c:535
#8 0x55978a539fd4 in target_wait_state src/target/target.c:2914
#9 0x55978a556e20 in jim_target_wait_state src/target/target.c:5256
#10 0x55978a5cca62 in command_unknown src/helper/command.c:1030
#11 0x55978aaed894 in JimInvokeCommand /home/cody/d/openocd-code/jimtcl/jim.c:10364
Change-Id: I24f6abfd26b6980100657397d69c84f2b80a005a Signed-off-by: Cody P Schafer <openocd@codyps.com>
Reviewed-on: http://openocd.zylin.com/4455 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com>
armv7a: cache ttbcr and ttb0/1 on debug state entry
Instead of re-reading ttbcr and ttb0/1 whenever a virt2phys translation
is done, cache the values once when entering debug state. Use the cached
values in armv7a_mmu_translate_va().
Omair Javaid [Thu, 15 Feb 2018 22:08:51 +0000 (03:08 +0500)]
Support for Arm VFP v3 registers read/write
This patch adds support in openOCD to read/write Arm vector/floating
point registers. This is compatible with Arm vfp v3 target xml in GDB.
Please refer to binutils-gdb/gdb/features/arm/arm-vfpv3.xml
Omair Javaid [Mon, 5 Mar 2018 11:25:21 +0000 (16:25 +0500)]
Support for AArch32 SIMD/Floating-point registers
This patch adds support for read/write of SIMD and floating-point register in AArch32 mode.
This patch is tested using Raspberry Pi3 halted in AArch32 mode with FP/SIMD enabled.
Software need to make sure floating-point and SIMD unit is enabled.
Omair Javaid [Sun, 21 Jan 2018 22:26:01 +0000 (03:26 +0500)]
Support AArch64 SIMD/FP registers read/write
This patch adds support in openOCD to read/write AArch64 SIMD/FP registers.
This patch depends on a previous patch which adds support to generation
of target xml by openOCD with nested architecture defined types. AArch64
SIMD/FP registers assumes various types and to support all types we
implement them as architecture defined type aarch64v which in turn
consists of various architecture defined types. This is compatible with
AArch64-FPU target xml in GDB. Please refer to
binutils-gdb/gdb/features/aarch64-fpu.xml
Omair Javaid [Sun, 21 Jan 2018 21:57:19 +0000 (02:57 +0500)]
Allow generation of nested target defined types in gdb target xml
This patch adds support to generate multiple nested architecture defined
data types in gdb target xml generated by openOCD. Architecture defined
structs, unions, vectors nested in one or more architecture defined
types can be generated now.
Marc Schink [Sat, 7 Jan 2017 16:43:49 +0000 (17:43 +0100)]
server/server: Remove all connections on shutdown
This patch fixes a memory leak in the internal server. Steps for
reproduction:
* valgrind --leak-check=full --show-reachable=yes ./build/src/openocd
* Establish more than one connection to OpenOCD (e.g. telnet)
* Shutdown OpenOCD
* Check for memory leaks in add_connection()
Change-Id: I0ae6fcf2918fd9bdec350446d3e26742d08ff698 Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4053 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Luca Dariz [Fri, 9 Feb 2018 15:58:25 +0000 (16:58 +0100)]
Fix ChibiOS FPU detection.
This is needed for Cortex-M7 devices, which have newer FPU.
This issue caused the registry integrity check to fail if FPU was enabled.
Currently the code must use FPUv4_SP anyway, since other configurations are not
supported by ChibiOS.
Change-Id: Ie8a2cb8282ccff6c2a3eb0ffeaddaf149d55d685 Signed-off-by: Luca Dariz <luca.dariz@gmail.com>
Reviewed-on: http://openocd.zylin.com/4398 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tomas Vanek [Tue, 21 Nov 2017 21:57:39 +0000 (22:57 +0100)]
target: use correct target in target-prefixed commands and event handlers
This change contains an alternative to Matthias Welwarsky's #4130
(target-prefixed commands) and to #4293 (event handlers).
get_current_target() must retrieve the target associated to the current
command. If no target associated, the current target of the command
context is used as a fallback.
Many Tcl event handlers work with the current target as if it were
the target issuing the event.
current_target in command_context is a number and has to be converted
to a pointer in every get_current_target() call.
The solution:
- Replace current_target in command_context by a target pointer
- Add another target pointer current_target_override
- get_current_target() returns current_target_override if set, otherwise
current_target
- Save, set and restore current_target_override to the current prefix
in run_command()
- Save, set and restore current_target_override to the event invoking
target in target_handle_event()
While on it use calloc when allocating a new command_context.
A previous fix avoiding multiple calls to the
rtos_create function had a side effect if rtos
support was configured explicitly. It affected
all rtos' that rely on symbol resolution from
gdb.
Tomas Vanek [Fri, 23 Feb 2018 18:27:28 +0000 (19:27 +0100)]
gdb_server: run control fixes for vCont
this patch contains several changes to run control and state
handling together with gdb:
- graceful handling of target/gdb desync on resume, step and halt
- a default gdb-attach event executing the "halt" command, to meet gdb
expectation of target state when it attaches
- call target_poll() after Ctrl-C command from gdb
- call target_poll() after resume and step through a vCont packet
- fix log message forwarding on vCont stepping, also move an aarch64
log message from INFO to DEBUG level to prevent messing up the gdb
console during source-line stepping
- fix oversight in vCont support that messes up breakpoint handling
during stepping
Christopher Head [Mon, 26 Feb 2018 22:51:35 +0000 (14:51 -0800)]
Fix incorrect comment
target_start_algorithm does not download the algorithm. It only starts
it. It expects someone else to have already written the algorithm code
into the proper location before calling it.
Change-Id: I5e04406eed0ebb1c23e550dbf8d9f1204c432603 Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4435 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tomas Vanek [Thu, 8 Feb 2018 13:44:10 +0000 (14:44 +0100)]
flash/nor/core: fix Segmentation fault during flash write of bad formed img
flash_write_unlock() sorts sections by base address but does not check
if they overlap. In case of overlapped sections an item of padding[]
array can get negative and padding loop writes out of allocated buffer.
How to replicate: cat two copies of an ihex file to one file and try
to flash it.
Check for overlapped sections and abort write in such case.
Change-Id: I43eee7dc290a8d18faa59567b2118b88ad4bedca Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4397 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
rtos: run rtos create hook only once on autodetect
Whenever a "qSymbol" from gdb is received, the rtos "create"
function was called. Make sure this happens only once and only
if rtos autodetection is used.
The RTOS handlers present OS threads to gdb but the openocd
target layer only knows about CPU cores (hardware threads).
This patch allows closing this gap inside the RTOS handler.
The default implementation just returns the current core, but
a RTOS handler can provide its own function that associates a
an OS thread with a core.
cortex_a: fix handling of Thumb-2 32bit breakpoints
When debugging Thumb-2 code, Gdb will at times send a
breakpoint packet 'Z0,<addr>,3', the number 3 denoting that
the instruction to break on is 32 bits long. Handle this by
replacing it with two consecutive 16bit Thumb BKPTs and make
sure to save and restore the full, original 32bit
instruction.
Note that this fix is only applicable if you debug a bare-metal program
(like the linux kernel) with the 'wrong' gdb, e.g. use an
"arm-linux" gdb instead of an "arm-eabi" gdb. But since most people
may not know about the subtle differences between gdb configurations
regarding thumb2 breakpoints it's still valid.
The ICEPick-D jtag router has core control registers
that provide the same (or similar) functionality as
the tap control register, for individual cores
accessible through the same tap (e.g. through a DAP).
Core control registers are located at address "0x60 +
core-id" of the ROUTER address space (IR=ROUTER).
It is sometimes helpful or even necessary to modify the
core control register. This patch renames the
"icepick_d_coreid" function to the more appropriate
"icepick_d_core_control" and adds a "value" argument
that allows writing of arbitrary value.
"icepick_d_tapenable" is extended by an optional value
argument so that core control can be written as the tap
is enabled.
Jonas Norling [Tue, 17 Oct 2017 06:57:06 +0000 (08:57 +0200)]
efm32: Refactor EFM32 chip family data, add more chips
Add support for more EFM32/EFR32 Series 1 families. The family IDs
come from the DEVICE_FAMILY list in the EFM32GG11 reference manual,
which is the most up to date source I could find. Register locations
have been checked against SiLab's header files.
No datasheets or headers were available for EFR32MG2, EFR32xG14 and
EFM32TG11B, so they are just assumed to follow the pattern. EFM32GG11B
has the MSC registers on a different address compared to other chips.
This commit attempts not to change current behavior when detecting
chips. One detail that has changed is that PAGE_SIZE is read before
applying the workaround for old Giant and Leopard Gecko revisions, but
this is believed to be OK because the register exists but just has an
invalid value in it.
The manuals disagree on which of 120 and 121 is WG, so this commit
leaves it as is.
Change-Id: Ia152b0b9e323defc5158cb02d9a6b04a27008f2a Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4263 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Andreas Bolsch [Sat, 28 Oct 2017 17:39:35 +0000 (19:39 +0200)]
Handle improperly build image files gracefully
Images build improperly (by simply concatenating separate images) were accepted,
but anything after the first end-of-file record *silently* ignored. Now emit warning
for intel and motorola images upon non-whitespace after first end-of-file record but
continue reading anyway.
ST ships some images broken that way in their CubeMX packages ...
Change-Id: I0c5d08fa90070fed11fb805c5f0dc39817048176 Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4281 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tomas Vanek [Fri, 26 Aug 2016 19:03:27 +0000 (21:03 +0200)]
psoc4: update for 4x00BLE, L, M, S and PRoC BLE devices
Flash ROM API command PSOC4_CMD_SET_IMO48 is now optional on new devices.
Also code tidy up:
- improved system ROM call error detection
- probe does not require the target to be halted
- default_padded_value and erased_value set to 0
- fixed endianess problem in flash write and protection setting
- removed fancy chip detection table as it would be updated too often
- psoc4 flash_autoerase is now on by default to ease programming
psoc4.cfg distinguishes chip family and uses either proprietary acquire
function of a KitProg adapter or TEST_MODE workaround to "reset halt"
Change-Id: I2c75ec46ed0a95e09274fad70b62d6eed7b9ecdf Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3807 Tested-by: jenkins Reviewed-by: David Girault <david.f.girault@gmail.com>
Tomas Vanek [Mon, 30 Oct 2017 16:59:06 +0000 (17:59 +0100)]
flash/nor/at91samd: add SAM R30 family
Microchip SAM R30 consist of a MCU SAM L21 and a radio.
Similarly SAM R21 = SAM D21 + radio. Therefore SAM R devices
was incorporated into SAM D21 and L21 device groups.
Change-Id: I3448d784cae888070b57c2f504583760ddffc97f Suggested-by: Martin Deicke <martin.deicke@an-solutions.de> Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4282 Tested-by: jenkins
projects / openocd / log