]> git.sur5r.net Git - openocd/commitdiff
tcl/board: add support for Kasli
authorRobert Jordens <jordens@gmail.com>
Mon, 15 Jan 2018 10:53:48 +0000 (10:53 +0000)
committerMatthias Welwarsky <matthias@welwarsky.de>
Fri, 30 Mar 2018 09:08:21 +0000 (10:08 +0100)
Kasli is an open hardware FPGA board. It is part of the Sinara family of
devices designed to control quantum physics experiments (see Sayma_AMC
for other boards already suppported by openocd).

Kasli was developed as part of the opticlock project. It features a
Xilinx Artix 7 100T FPGA, DDR3 RAM, a clock reconstruction and
distribution network, four 6 Gb/s transceiver links (three SFP and
one SATA) as well as interfaces to up to 12 Eurocard Extension Modules
(EEMs).

https://github.com/m-labs/sinara/wiki/Kasli
http://www.opticlock.de/en/

Change-Id: I88b5e9f16b79e1e731056c45da6b5e1448d2c0e7
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4341
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
tcl/board/kasli.cfg [new file with mode: 0644]

diff --git a/tcl/board/kasli.cfg b/tcl/board/kasli.cfg
new file mode 100644 (file)
index 0000000..caa294f
--- /dev/null
@@ -0,0 +1,13 @@
+interface ftdi
+ftdi_device_desc "Quad RS232-HS"
+ftdi_vid_pid 0x0403 0x6011
+ftdi_channel 0
+ftdi_layout_init 0x0008 0x000b
+# ftdi_location 1:8
+
+reset_config none
+transport select jtag
+adapter_khz 25000
+
+source [find cpld/xilinx-xc7.cfg]
+source [find cpld/jtagspi.cfg]