Minghuan Lian [Thu, 22 Jan 2015 05:21:55 +0000 (13:21 +0800)]
drivers/pci/pci_rom.c: fix compile warning under 64bit mode
Fix this:
drivers/pci/pci_rom.c:95:15: warning: cast to pointer from
integer of different size [-Wint-to-pointer-cast]
rom_header = (struct pci_rom_header *)rom_address;
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Stephen Warren [Mon, 19 Jan 2015 23:39:11 +0000 (16:39 -0700)]
distro_bootcmd: read DHCP boot script name from a variable
Modify $bootcmd_dhcp to read the downloaded script filename from an
environment variable rather than hard-coding it. This allows the user
(or another script) to select a different script name if they want,
without editing the whole value of $bootcmd_dhcp.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
tools: do not print error messages in verify_header() functions
default_image.c and socfpgaimage.c are the only image modules that print error
messages during header verification. The verify_header() is used to query if a
given image file is processed by the image format. Thus, if the image format
can't handle the file, it must simply return an error. Otherwise we pollute the
screen with errors messages until we find the image format that handle a given
image file.
The dumpimage is able to extract components contained in a FIT image:
$ ./dumpimage -T flat_dt -i CONTAINER.ITB -p INDEX FILE
The CONTAINER.ITB is a regular FIT container file. The INDEX is the poisition
of the sub-image to be retrieved, and FILE is the file (path+name) to save the
extracted sub-image.
For example, given the following kernel.its to build a kernel.itb:
dumpimage: add 'T' option to explicitly set the image type
Some image types, like "KeyStone GP", do not have magic numbers to
distinguish them from other image types. Thus, the automatic image
type discovery does not work correctly.
imagetool: make the image_save_datafile() available to all image types
Move the image_save_datafile() function from an U-Multi specific file
(default_image.c) to a file common to all image types (image.c). And rename it
to genimg_save_datafile(), to make clear it is useful for any image type.
Sjoerd Simons [Mon, 5 Jan 2015 17:13:39 +0000 (18:13 +0100)]
distro_distro_bootcmd: use CONFIG_BOOTCOMMAND instead of setting bootcmd=
Move the bootcmd commands into a seperate distro_bootcmd environment
variable. Allowing a user to easily launch the distro boot sequence if
the default bootcmd did not default to distro boot commands.
Also set CONFIG_BOOTCOMMAND to "run distro_bootcmd" if it hasn't been
configured yet rather then putting it directly in the environment. This
allows boards to make the distro boot commands available without
necessarily default to them or to use them as a fallback after running
some board specific commands instead.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Sjoerd Simons [Mon, 5 Jan 2015 17:13:38 +0000 (18:13 +0100)]
config_distro_bootcmd: Scan all partitions for boot files
Not all devices use the convention that the boot scripts are on the
first partition. For example on chromebooks it seems common for the
first two partitions to be ChromeOS kernel partitions.
So instead of just the first partition scan all partitions on a device
with a filesystem u-boot can recognize.
Sjoerd Simons [Mon, 5 Jan 2015 17:13:37 +0000 (18:13 +0100)]
part: let list put the list in an environment variable
Add an optional third argument to the "part list" command which puts a
space seperated list of valid partitions into the given environment
variable. This is useful for allowing boot scripts to iterate of all
partitions of a device.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Stefan Roese [Tue, 27 Jan 2015 15:45:09 +0000 (16:45 +0100)]
spl: Change printf to puts for "Unsupported boot-device"
Microblaze currently doesn't use printf in SPL. So this one line was the only
reference to it and resulted in the printf functionality to be pulled in.
Exceeding the 4k size limit. Lets change the printf back to puts so that
Microblaze is fixed again. The only drawback is that the detected boot-device
number will not be printed. But this message alone should be helpful enough
to get an idea where the boot process is broken.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
ARM: zynq: Add USB lthor download protocol support
updated the zynq config to support the lthor
download protocol.
This lthor functionality helps us to load linux
images on to DDR/MMC and can boot linux using bootm.
In order to load images the user should run lthor
command run "thor_ram" from u-boot prompt and
then send the images from host using lthor utility.
Define g_dnl_bind_fixup for zynq so that correct vendor
and product ids assigned incase of DFU and lthor.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable DFU functionality in zynq.
This DFU functionality helps us to load linux
images on to DDR and can boot linux using bootm.
In order to load images the user should run dfu
command "dfu 0 ram 0" from u-boot prompt and then
send the images from host.
The malloc size has been increased to match the DFU
buffer requirements.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 5 Sep 2013 06:41:19 +0000 (08:41 +0200)]
ARM: zynq: ddrc: Setup half of memory only for ECC case
Setup half of memory from ram_size for ECC case.
All the time the same board can be configured
with or without ECC. Based on ECC case detection
use half of memory with the same configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 23 Jan 2015 08:45:12 +0000 (09:45 +0100)]
ARM: zynq: Enable the Neon instructions
Added the lowlevel_init to enable the Neon instructions.
Initially the u-boot was causing undefined instruction
exception if loaded through tcl, and working fine if loaded
through FSBL. The exception was causing in convertion formula
of given time to ticks. It was because, the Neon instructions
were disabled and hence causing the undefined exception. In
FSBL case, the FSBL was enabling the Neon instructions. Hence,
added the lowlevel_init to enable the Neon instructions.
Also enable neon instructions for non-xilinx toolchain.
<INTERRUPT>
Marvell>> nand erase.part root
Marvell>> ubi part root
Marvell>> ubi remove rootfs
Marvell>> ubi create rootfs
Marvell>> usb reset
Marvell>> fatload usb 2:1 0x800000 guruplug/openwrt/openwrt-kirkwood-guruplug-rootfs.ubifs
Marvell>> ubi write 0x800000 rootfs ${filesize}
Marvell>> reset
Changes in v1:
- ADD generic board define
- ADD FDT support
- ADD HUSH interpreter
- Define new NAND partition mapping
Luka Perkov [Mon, 11 Nov 2013 06:27:53 +0000 (07:27 +0100)]
kirkwood: define empty CONFIG_MVGBE_PORTS by default
Each board with defines it's own set of values. If we do not define
CONFIG_MVGBE_PORTS we will hit following error:
mvgbe.c: In function 'mvgbe_initialize':
mvgbe.c:700:34: error: 'CONFIG_MVGBE_PORTS' undeclared (first use in this function)
u8 used_ports[MAX_MVGBE_DEVS] = CONFIG_MVGBE_PORTS;
This patch fixes above described problem.
Signed-off-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Simon Glass [Tue, 20 Jan 2015 05:16:14 +0000 (22:16 -0700)]
x86: Implement a cache for Memory Reference Code parameters
The memory reference code takes a very long time to 'train' its SDRAM
interface, around half a second. To avoid this delay on every boot we can
store the parameters from the last training sessions to speed up the next.
Add an implementation of this, storing the training data in CMOS RAM and
SPI flash.
Simon Glass [Tue, 20 Jan 2015 05:16:13 +0000 (22:16 -0700)]
x86: dts: Add SPI flash MRC details for chromebook_link
Correct the SPI flash compatible string, add an alias and specify the
position of the MRC cache, used to store SDRAM training settings for the
Memory Reference Code.
Simon Glass [Tue, 20 Jan 2015 05:16:07 +0000 (22:16 -0700)]
net: Add a separate file for IP checksumming
Move the checksum code out into its own file so it can be used elsewhere.
Also use a new version which supports a length which is not a multiple of
2 and add a new function to add two checksums.
Alison Wang [Fri, 26 Dec 2014 05:14:01 +0000 (13:14 +0800)]
ls102xa: fdt: Disable QSPI and DSPI in NOR/NAND/SD boot
As QSPI/DSPI and IFC are pin multiplexed, QSPI and DSPI are
only enabled in QSPI boot, and disabled in other boot modes.
IFC is enabled in NOR/NAND/SD boot, and disabled in QSPI boot.
This patch will add fdt support for the above rules.
Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Alison Wang [Thu, 15 Jan 2015 09:29:29 +0000 (17:29 +0800)]
arm: ls102xa: Update snoop settings for CCI-400
CAAM is connected to CCI-400 S0 slave interface. Disable snooping for
S0 will cause CAAM self test failure. This patch is to enable snooping
for S0 slave interface. These CCI-400 operations are moved to
board_early_init_f() to be initialized earlier. For S4 slave interface,
issuing of snoop requests and DVM message requests are enabled.
Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
tang yuantian [Wed, 17 Dec 2014 04:58:04 +0000 (12:58 +0800)]
ARM: HYP/non-sec: Make variable gic_dist_addr as a local one
Defining variable gic_dist_addr as a globe one prevents some
functions, which use it, from being used before relocation
which is the case in the deep sleep resume process on Freescale
SoC platforms.
Besides, we can always get the GIC base address by calling
get_gicd_base_address() without referring gic_dist_addr.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Xiubo Li [Tue, 16 Dec 2014 06:50:33 +0000 (14:50 +0800)]
ls102xa: dcu: Add platform support for DCU on LS1021AQDS board
This patch adds the CH7301 HDMI options and the common configuration
for DCU on LS1021AQDS board.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Alison Wang <alison.wang@freescale.com> Cc: Jason Jin <Jason.Jin@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Mon, 15 Dec 2014 06:00:36 +0000 (11:30 +0530)]
crypto/fsl: Add fixup for crypto node
Era property is added in the crypto node in device tree.
Move the code to do so from arch/powerpc/mpc8xxx/fdt.c to
drivers/sec/sec.c so that it can be used across arm and
powerpc platforms having crypto node.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
[York Sun: Fix commit message indentation] Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Wed, 10 Dec 2014 06:17:03 +0000 (11:47 +0530)]
arm: ls102xa: Add dummy gpio.h to enable CONFIG_OF_CONTROL
If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled.
It includes <asm/gpio.h> and then <asm/gpio.h> includes
<asm/arch/gpio.h>. As a result, all the SoCs that enable
CONFIG_OF_CONTROL must have <asm/arch/gpio.h> even if they
do not support GPIO.
The right fix would be to split the lib/fdtdec.c to remove
dependency on GPIO.This commit adds a dummy <asm/arch/gpio.h>
to support OF_CONTROL for LS102x platform. This dummy header
will be removed after FDT-GPIO stuff is fixed correctly.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Alison Wang [Tue, 9 Dec 2014 09:38:23 +0000 (17:38 +0800)]
ls102xa: etsec: Select ge0_clk125 for eTSEC clock muxing as default
This patch reverts to use ge0_clk125 for eTSEC clock muxing. For SAI and
CAN which are pin multiplexed with RGMII1 in EC1 of RCW, ge2_clk125 will
be used via hwconfig.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Sjoerd Simons [Tue, 20 Jan 2015 17:06:53 +0000 (18:06 +0100)]
pci: tegra: Fix port information parsing
commit a62e84d7b1824a202dd incorrectly changed the tegra pci code to the
new fdtdec pci helpers. To get the device index of the root port, the
"reg" property should be parsed from the dtb (as was previously the
case).
With this patch i can successfully network boot my jetson tk1
Bin Meng [Tue, 20 Jan 2015 03:25:44 +0000 (11:25 +0800)]
x86: Fix various code format issues in start16.S
Various minor code format issues are fixed in start16.S:
- U-boot -> U-Boot
- 32bit -> 32-bit
- Use TAB instead of SPACE to indent
- Move the indention location of the GDT comment block
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 22 Jan 2015 03:29:41 +0000 (11:29 +0800)]
x86: Test mtrr support flag before accessing mtrr msr
On some x86 processors (like Intel Quark) the MTRR registers are not
supported. This is reflected by the CPUID (EAX 01H) result EDX[12].
Accessing the MTRR registers on such processors will cause #GP so we
must test the support flag before accessing MTRR MSRs.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 1 Jan 2015 23:17:58 +0000 (16:17 -0700)]
x86: config: Always scroll the display by 5 lines, for speed
Scrolling a line at a time is very slow for reasons that I don't understand.
It seems to take about 100ms to copy 4MB of RAM in the frame buffer. To cope
with this, scroll 5 lines each time.
Simon Glass [Thu, 1 Jan 2015 23:17:57 +0000 (16:17 -0700)]
x86: video: Add support for CONFIG_CONSOLE_SCROLL_LINES
Some machines are very slow to scroll their displays. To cope with this,
support the CONFIG_CONSOLE_SCROLL_LINES option. Setting this to 5 allows
the display to operate at an acceptable speed by scrolling 5 lines at
a time.
This same option is available for LCDs so when these systems are unified
this code can be unified also.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
Sebastien Ronsse [Mon, 12 Jan 2015 17:17:25 +0000 (17:17 +0000)]
x86: Fix out of bounds irq handlers access
Using coreboot-x86_defconfig, the following error occurred prior to this modification:
CC arch/x86/lib/interrupts
arch/x86/lib/interrupts.c: In function ‘do_irqinfo’:
arch/x86/lib/interrupts.c:134:24: error: iteration 16u invokes undefined behavior [-Werror=aggressive-loop-optimizations]
if (irq_handlers[irq].handler != NULL) {
^
arch/x86/lib/interrupts.c:133:2: note: containing loop
for (irq = 0; irq <= CONFIG_SYS_NUM_IRQS; irq++) {
^
cc1: all warnings being treated as errors
scripts/Makefile.build:275: recipe for target 'arch/x86/lib/interrupts.o' failed
make[1]: *** [arch/x86/lib/interrupts.o] Error 1
Makefile:1093: recipe for target 'arch/x86/lib' failed
make: *** [arch/x86/lib] Error 2
Change-Id: I3572a822081b72ab760f1eb99442e1161d3d167e Signed-off-by: Sebastien Ronsse <sronsse@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 31 Dec 2014 09:18:39 +0000 (17:18 +0800)]
x86: ahci: Make sure interface is not busy after enabling the port
Each time U-Boot boots on Intel Crown Bay board, the displayed hard
drive information is wrong. It could be either wrong capacity or just
a 'Capacity: not available' message. After enabling the debug switch,
we can see the scsi inquiry command did not execute successfully.
However, doing a 'scsi scan' in the U-Boot shell does not expose
this issue.
SCSI: Target spinup took 0 ms.
SATA link 1 timeout.
AHCI 0001.0100 32 slots 2 ports 3 Gbps 0x3 impl SATA mode
flags: ncq stag pm led clo only pmp pio slum part ccc apst
scanning bus for devices...
ahci_device_data_io: 0 byte transferred. <--- scsi inquiry fails
ahci_device_data_io: 512 byte transferred.
ahci_device_data_io: 512 byte transferred.
ahci_device_data_io: 512 byte transferred.
Device 0: (0:0) Vendor: ATA Prod.: Rev: ?8
Type: Hard Disk
Capacity: 912968.3 MB = 891.5 GB (1869759264 x 512)
Found 1 device(s).
So uninitialized contents on the stack were passed to dev_print() to
display those wrong information.
The symptom were observed on two hard drives (one is Seagate, the
other one is Western Digital). The fix is to make sure the AHCI
interface is not busy by checking the error and status information
from task file register after enabling the port in ahci_port_start()
before proceeding other operations like scsi_scan().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 30 Dec 2014 02:32:29 +0000 (19:32 -0700)]
x86: Drop the x86_fb driver
Now that we have a full VESA driver we may as well use that. We need to
support the VESA layer being set up by early start-up code or by
running a VGA ROM.
Simon Glass [Tue, 30 Dec 2014 02:32:28 +0000 (19:32 -0700)]
x86: Add a VESA video driver
Add a driver intended to cope with any VESA-compatible x86 graphics
adapter. It will not support ROMs which use OpenFirmware (Forth) since
there is no support for that in U-Boot. This means that MAC OS cards
will not work.
projects / u-boot / log