]> git.sur5r.net Git - u-boot/log
u-boot
12 years agomx3: Fix typo on IPU_CONF_CSI_EN
Benoît Thébaudeau [Tue, 14 Aug 2012 03:33:52 +0000 (03:33 +0000)]
mx3: Fix typo on IPU_CONF_CSI_EN

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agomx35: Fix typo on EDIO
Benoît Thébaudeau [Tue, 14 Aug 2012 03:28:24 +0000 (03:28 +0000)]
mx35: Fix typo on EDIO

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agomx5: Enable dcache
Benoît Thébaudeau [Tue, 14 Aug 2012 03:17:52 +0000 (03:17 +0000)]
mx5: Enable dcache

Now that the main i.MX features work fine with dcache enabled, enabled it by
default if CONFIG_SYS_DCACHE_OFF is not defined.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agomx25: Enable dcache
Benoît Thébaudeau [Tue, 14 Aug 2012 03:17:33 +0000 (03:17 +0000)]
mx25: Enable dcache

Now that the main i.MX features work fine with dcache enabled, enabled it by
default if CONFIG_SYS_DCACHE_OFF is not defined.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agomxc_spi: Round up clock divider
Benoît Thébaudeau [Fri, 10 Aug 2012 08:51:50 +0000 (08:51 +0000)]
mxc_spi: Round up clock divider

Since the input frequency of the API is a maximum that should not be exceeded in
order for the devices to operate properly, the SPI clock divider should be
rounded up, not truncated.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agortc: add support of mx27 rtc
trem [Wed, 8 Aug 2012 07:04:46 +0000 (07:04 +0000)]
rtc: add support of mx27 rtc

This driver has been tested on board armadeus apf27.

Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agoMX28: Shuffle around the power management code
Marek Vasut [Mon, 6 Aug 2012 11:34:55 +0000 (11:34 +0000)]
MX28: Shuffle around the power management code

Move some function calls to a more appropriate place, so they're
called only when needed.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agoMX28: Drop the cp15 reconfiguration from SPL
Marek Vasut [Mon, 6 Aug 2012 11:34:54 +0000 (11:34 +0000)]
MX28: Drop the cp15 reconfiguration from SPL

The SPL doesn't need the CP15 reconfiguration, as that's what the
BootROM does for us already. Moreover, when the CP15 is reconfigured
and the code returns control to BootROM, the USB boot works no more.

Remove the code and allow [1] to work properly as well.

[1] http://git.bfuser.eu/?p=marex/mxsldr.git;a=summary

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agotx25: Use generic gpio_* calls
Vikram Narayanan [Sat, 16 Jun 2012 07:16:17 +0000 (07:16 +0000)]
tx25: Use generic gpio_* calls

Instead of manipulating gpio registers directly, use the calls
from the gpio library.

Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agomxs: Convert sys_proto.h prefixes to 'mxs'
Otavio Salvador [Mon, 13 Aug 2012 09:53:12 +0000 (09:53 +0000)]
mxs: Convert sys_proto.h prefixes to 'mxs'

The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
12 years agomxs: rename regs-clkctrl.h to regs-clkctrl-mx28.h
Otavio Salvador [Mon, 13 Aug 2012 09:53:11 +0000 (09:53 +0000)]
mxs: rename regs-clkctrl.h to regs-clkctrl-mx28.h

The CLKCTRL registers are SoC specific so we ought to have it clear on
filename.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
12 years agomxs: Remove not required include of iomux-mx28.h
Otavio Salvador [Mon, 13 Aug 2012 09:53:10 +0000 (09:53 +0000)]
mxs: Remove not required include of iomux-mx28.h

The iomux-mx28.h include is not required on spl_mem_init.c so it has
been droped.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
12 years agomxs: Remove not required explicit iomux-mx28.h include
Otavio Salvador [Mon, 13 Aug 2012 09:53:09 +0000 (09:53 +0000)]
mxs: Remove not required explicit iomux-mx28.h include

The iomux header is included on sys_proto.h so to avoid SoC specific
header inclusion.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>
12 years agoapx4devkit: Turn on caches
Fabio Estevam [Sun, 5 Aug 2012 06:18:00 +0000 (06:18 +0000)]
apx4devkit: Turn on caches

Turn on data and instruction caches.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
 include/configs/apx4devkit.h |    2 --
 1 files changed, 0 insertions(+), 2 deletions(-)
Acked-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
12 years agom28evk: Turn on caches
Fabio Estevam [Sun, 5 Aug 2012 06:17:59 +0000 (06:17 +0000)]
m28evk: Turn on caches

Turn on data and instruction caches.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agoarm:cache:trats: Enable PL310 L2 Cache Controller at TRATS Samsung board
Łukasz Majewski [Tue, 7 Aug 2012 05:42:14 +0000 (05:42 +0000)]
arm:cache:trats: Enable PL310 L2 Cache Controller at TRATS Samsung board

Enable the PL310 L2 cache controller at TRATS Samsung board.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoarm:exynos: Enable data cache at exynos based processors.
Łukasz Majewski [Tue, 7 Aug 2012 03:24:03 +0000 (03:24 +0000)]
arm:exynos: Enable data cache at exynos based processors.

This patch enables the L1 data cache for systems based on Samsung
Exynos processor.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agovideo: support exynos pwm backlight driver
Donghwa Lee [Mon, 2 Jul 2012 01:16:13 +0000 (01:16 +0000)]
video: support exynos pwm backlight driver

This patch support exynos pwm backlight driver. It can control backlight
power and brightness by using pwm.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agovideo: exynos fb driver supports display port feature
Donghwa Lee [Mon, 2 Jul 2012 01:16:08 +0000 (01:16 +0000)]
video: exynos fb driver supports display port feature

If dp_enabled was set, exynos fb driver support display port feature.
This patch depends on [PATCH] video: support exynos fimd driver
for various exynos series.

http://marc.info/?l=u-boot&m=134119605104467&w=2

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agovideo: add dp_enabled variable in vidinfo structure
Donghwa Lee [Mon, 2 Jul 2012 01:16:05 +0000 (01:16 +0000)]
video: add dp_enabled variable in vidinfo structure

To support display port in exynos fb driver, added dp_enabled variable
in vidinfo structure that set in board file.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agovideo: support exynos display port drivers
Donghwa Lee [Mon, 2 Jul 2012 01:16:02 +0000 (01:16 +0000)]
video: support exynos display port drivers

This patch set supports exynos display port drivers.

DisplayPort is an industry standard device to accommodate the increasing board
adoption of digital display technology within the PC and consumer electronics.
The interface supports internal chip-to-chip and external box-to-box digital
display connections.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoEXYNOS5: add display port base address
Donghwa Lee [Mon, 2 Jul 2012 01:15:59 +0000 (01:15 +0000)]
EXYNOS5: add display port base address

This patch add display port base address for EXYNOS5. In case of EXYNOS4,
use DEVICE_NOT_AVAILABLE macro because DP is not supported.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoEXYNOS5: support display port phy control function
Donghwa Lee [Mon, 2 Jul 2012 01:15:56 +0000 (01:15 +0000)]
EXYNOS5: support display port phy control function

This patch support display port phy control function.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoEXYNOS5: support display system register control
Donghwa Lee [Mon, 2 Jul 2012 01:15:53 +0000 (01:15 +0000)]
EXYNOS5: support display system register control

This patch supports display block system regisger control.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoEXYNOS5: support exynos5 lcd clock control
Donghwa Lee [Mon, 2 Jul 2012 01:15:49 +0000 (01:15 +0000)]
EXYNOS5: support exynos5 lcd clock control

This patch support exynos5 lcd clock control.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agovideo: support exynos fimd driver for various exynos series
Donghwa Lee [Thu, 26 Jul 2012 15:30:49 +0000 (15:30 +0000)]
video: support exynos fimd driver for various exynos series

This patch supports exynos fimd driver for various exynos series different from
existing it supports only exynos4 chip.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoARM: EXYNOS: fixed compiler warning message
Jaehoon Chung [Mon, 9 Jul 2012 21:20:34 +0000 (21:20 +0000)]
ARM: EXYNOS: fixed compiler warning message

Removed [-Wuninitialized] warning message.
The fout_sel is assigned to "-1" by default.
And start, gpio_func is initialized to 0.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoarm/s5pxx: Fix get_timer_masked to get the time.
Zhong Hongbo [Mon, 2 Jul 2012 13:50:49 +0000 (13:50 +0000)]
arm/s5pxx: Fix get_timer_masked to get the time.

In general, The get_timer_masked function get the system time,
no the number of ticks. Such as the nand_wait_ready will use
get_timer_masked to delay the operations. And change the system
time to adopt to the CONFIG_SYS_HZ.

Signed-off-by: Hongbo Zhong <bocui107@gmail.com>
Tested-by: Jaehoon Chung<jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoarm:trats: loaduimage environment variable defied for TRATS target
Łukasz Majewski [Mon, 2 Jul 2012 23:41:15 +0000 (23:41 +0000)]
arm:trats: loaduimage environment variable defied for TRATS target

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoSMDK5250: Enable UART and MMC for Exynos5250 Rev 1.0
Rajeshwari Shinde [Tue, 3 Jul 2012 20:03:00 +0000 (20:03 +0000)]
SMDK5250: Enable UART and MMC for Exynos5250 Rev 1.0

This patch sets UART3 and MMC channle 0 for Exynos5250 Rev 1.0

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoEXYNOS5 : Modify pinnumx settings as per Exynos5250 Rev 1.0
Rajeshwari Shinde [Tue, 3 Jul 2012 20:02:59 +0000 (20:02 +0000)]
EXYNOS5 : Modify pinnumx settings as per Exynos5250 Rev 1.0

This patch modifies the pinmux settings of MMC and UART as per
Exynos5250 Rev 1.0.
It also corrects the gpio offset calculations.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoEXYNOS5: CLOCK: Add BPLL support
Rajeshwari Shinde [Tue, 3 Jul 2012 20:02:58 +0000 (20:02 +0000)]
EXYNOS5: CLOCK: Add BPLL support

This patch adds support for BPLL clock.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoEXYNOS5: CLOCK: Modify MPLL clock out for Exynos5250 Rev 1.0
Rajeshwari Shinde [Tue, 3 Jul 2012 20:02:57 +0000 (20:02 +0000)]
EXYNOS5: CLOCK: Modify MPLL clock out for Exynos5250 Rev 1.0

MPLL clock-out of Exynos5250 Rev 1.0 is always at 1.6GHz.
Adjust the divisor value to get 800MHz as needed by devices
like UART etc

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoExynos5: DDR3: Add DDR3 memory setup for Exynos5250 Rev 1.0
Rajeshwari Shinde [Tue, 3 Jul 2012 20:02:56 +0000 (20:02 +0000)]
Exynos5: DDR3: Add DDR3 memory setup for Exynos5250 Rev 1.0

The patch adds the memory initialization sequence of DDR3.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoEXYNOS5: CLOCK: Add clock support for Exynos5250 Rev 1.0
Rajeshwari Shinde [Tue, 3 Jul 2012 20:02:55 +0000 (20:02 +0000)]
EXYNOS5: CLOCK: Add clock support for Exynos5250 Rev 1.0

Add new clock values for Exynos5250 Rev 1.0

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoEXYNOS5: CLOCK: define additional clock registers for Exynos5250 Rev 1.0
Rajeshwari Shinde [Tue, 3 Jul 2012 20:02:54 +0000 (20:02 +0000)]
EXYNOS5: CLOCK: define additional clock registers for Exynos5250 Rev 1.0

Define additional registers for clock control in Exynos5250 Rev 1.0

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoSMDK5250: Add smdk5250-uboot-spl.lds
Rajeshwari Shinde [Tue, 3 Jul 2012 20:02:53 +0000 (20:02 +0000)]
SMDK5250: Add smdk5250-uboot-spl.lds

Default spl/u-boot-spl.lds created by spl/Makefile resolves
the spl text load addr to 0x0. As 0x0 belongs to iROM addr so
Global variables can not be used.

Adding specific smdk5250-uboot-spl.lds makes possible to use Global Variables
in spl.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoSMDK5250: SPL: Define parametric board initializer
Rajeshwari Shinde [Tue, 3 Jul 2012 20:02:52 +0000 (20:02 +0000)]
SMDK5250: SPL: Define parametric board initializer

Define table-driven configuration mechanism for SMDK5250
rather than hard-coding board initialization parameters.

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoARCH: SPL: Add parametric board initializer
Rajeshwari Shinde [Tue, 3 Jul 2012 20:02:51 +0000 (20:02 +0000)]
ARCH: SPL: Add parametric board initializer

Add a structure for table-driven configuration mechanism such that no recompilation
is needed to update the configuration parameters, rather than hard-coding
board initialization parameters.

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoARM: Remove unused stack and irq config defines
Rob Herring [Fri, 13 Jul 2012 09:44:01 +0000 (09:44 +0000)]
ARM: Remove unused stack and irq config defines

CONFIG_STACKSIZE is not referenced anywhere except on AVR32, but present
in most ARM board config files.

IRQs are only enabled for 1 config, so remove the unused config options
for IRQ and FIQ stack size as well.

Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
12 years agoarm: bugfix: save_boot_params_default accesses uninitalized stack when -O0
Tetsuyuki Kobayashi [Fri, 6 Jul 2012 21:14:20 +0000 (21:14 +0000)]
arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0

save_boot_params_default() in cpu.c accesses uninitialized stack area
when it compiled with -O0 (not optimized).
This patch removes save_boot_params_default() and put the equivalent in start.S

Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Acked-by: Tom Rini <trini@ti.com>
12 years agotegra20: Remove armv4t build flags
Allen Martin [Fri, 31 Aug 2012 08:30:15 +0000 (08:30 +0000)]
tegra20: Remove armv4t build flags

These flags were necessary when building tegra20 as a single binary
that supported ARM7TDMI and Cortex A9.  Now that the ARM7TDMI support
is split into a separate SPL, this is no longer necessary.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agospl: fix SPL build of private libgcc
Allen Martin [Fri, 31 Aug 2012 08:30:14 +0000 (08:30 +0000)]
spl: fix SPL build of private libgcc

This fixes the SPL build to link with the SPL version of libgcc if
USE_PRIVATE_LIBGCC is set to "yes".  Previously it was linking with
the libgcc from the normal u-boot build because it gets set in
PLATFORM_LIBS and passed down the to the SPL build.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agoarm: enable libgcc build for SPL
Allen Martin [Fri, 31 Aug 2012 08:30:13 +0000 (08:30 +0000)]
arm: enable libgcc build for SPL

Enable the building of private libgcc for SPL

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agotegra20: enable SPL for tegra20 boards
Allen Martin [Fri, 31 Aug 2012 08:30:12 +0000 (08:30 +0000)]
tegra20: enable SPL for tegra20 boards

Add SPL options to tegra20 config files and enable SPL build for
tegra20 boards.  Also remove redundant code from u-boot that is not
contained in SPL.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agotegra20: move SDRAM param save to later in boot
Allen Martin [Fri, 31 Aug 2012 08:30:11 +0000 (08:30 +0000)]
tegra20: move SDRAM param save to later in boot

Move warmboot_save_sdram_params() to later in the boot sequence.  This
code relies on devicetree to get the address of the memory controller
and with upcoming changes for SPL boot it gets called early in the
boot process when devicetree is not initialized yet.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agotegra20: add u-boot-*-tegra.bin targets
Allen Martin [Fri, 31 Aug 2012 08:30:10 +0000 (08:30 +0000)]
tegra20: add u-boot-*-tegra.bin targets

Add target for tegra20 u-boot image.  This is a concatenation of tegra
spl and normal u-boot binaries.  For non-devicetree builds this is
named "u-boot-nodtb-tegra.bin" for devicetree builds is named
"u-boot-dtb-tegra.bin".

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agoARM: add tegra20 support to arm720t
Allen Martin [Fri, 31 Aug 2012 08:30:09 +0000 (08:30 +0000)]
ARM: add tegra20 support to arm720t

Add support for tegra20 arm7 boot processor.  This processor is used
to power on the Cortex A9 and transfer control to it.  In tegra this
processor is an ARM7TDMI not an ARM720T, but since we don't use cache
it was easier to just reuse the ARM720T code as the processors are
otherwise identical except for cache and MMU.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agotegra20: remove timer_init from SPL build
Allen Martin [Fri, 31 Aug 2012 08:30:08 +0000 (08:30 +0000)]
tegra20: remove timer_init from SPL build

Don't use timer_init from tegra board.c.  This comes out of arm720t
for the SPL build.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agoARM: Fix arm720t SPL build
Allen Martin [Fri, 31 Aug 2012 08:30:07 +0000 (08:30 +0000)]
ARM: Fix arm720t SPL build

Take a few SPL fixes from armv7 and apply them to arm720t:
-Use dummy exception handlers for SPL build
-Initialize relocation register r9 to 0 for the case of no relocation
-ifdef out interrupt handler code

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agoMAKEALL: update to work with new boards.cfg syntax
Allen Martin [Fri, 31 Aug 2012 08:30:06 +0000 (08:30 +0000)]
MAKEALL: update to work with new boards.cfg syntax

Update MAKEALL to handle the optional SPL CPU field that was added to
boards.cfg.  This impacts the cases in MAKEALL that have to match
against CPU type (field 3).  In these cases use ':' as a field
separator to split the u-boot CPU from the SPL CPU.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agomkconfig: remove bashisms and cleanup config.mk generation
Allen Martin [Fri, 31 Aug 2012 08:30:05 +0000 (08:30 +0000)]
mkconfig: remove bashisms and cleanup config.mk generation

This adds some cleanup to mkconfig related to SPL support.  Bash
specific script has been replaced with awk for better shell
compatibility.  config.mk generation is done through a subshell and
single redirect to improve readability.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agotegra20: make board mkdir commands unconditional
Allen Martin [Fri, 31 Aug 2012 08:30:04 +0000 (08:30 +0000)]
tegra20: make board mkdir commands unconditional

Change the mkdir commands for the object directories to be
unconditional.  This fixes an issue when building for SPL where
SRCTREE and OBJTREE are the same, but $(obj) is under SPLTREE.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agotegra20: tec: add tegra20-common-post.h
Allen Martin [Fri, 31 Aug 2012 08:30:03 +0000 (08:30 +0000)]
tegra20: tec: add tegra20-common-post.h

Add tegra20-common-post.h to be consistent with other tegra20 boards.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agotegra20: rename CONFIG_MACH_TEGRA_GENERIC
Allen Martin [Fri, 31 Aug 2012 08:30:02 +0000 (08:30 +0000)]
tegra20: rename CONFIG_MACH_TEGRA_GENERIC

Rename CONFIG_MACH_TEGRA_GENERIC to the less confusing CONFIG_TEGRA.
The meaning of the config options is now:

CONFIG_TEGRA - Any tegra chip
CONFIG_TEGRA20 - A tegra20 family chip
CONFIG_TEGRA30 - A tegra30 family chip (not added yet)

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agotegra20: move tegra20 SoC code to arch/arm/cpu/tegra20-common
Allen Martin [Fri, 31 Aug 2012 08:30:01 +0000 (08:30 +0000)]
tegra20: move tegra20 SoC code to arch/arm/cpu/tegra20-common

In preparation for splitting out the armv4t code from tegra20, move
the tegra20 SoC code to arch/arm/cpu/tegra20-common.  This code will
be compiled armv4t for the arm7tdmi and armv7 for the cortex A9.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agotegra20: rename tegra2 -> tegra20
Allen Martin [Fri, 31 Aug 2012 08:30:00 +0000 (08:30 +0000)]
tegra20: rename tegra2 -> tegra20

This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
12 years agoARM: add Raspberry Pi model B board, using BCM2835 SoC
Stephen Warren [Sun, 5 Aug 2012 16:07:22 +0000 (16:07 +0000)]
ARM: add Raspberry Pi model B board, using BCM2835 SoC

The Raspberry Pi model B uses the BCM2835 SoC, has 256MB of RAM,
contains an SMSC 9512 USB LAN/Hub chip, and various IO connectors.
For more details, see http://www.raspberrypi.org/.

Various portions (cache enable, MACH_TYPE setup, RAM size limit, stack
relocation to top of RAM) extracted from work by:
Oleksandr Tymoshenko <gonzo@bluezbox.com>.

GPIO driver enablement by Vikram Narayanan <vikram186@gmail.com>.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Tom Rini <trini@ti.com>
12 years agoARM: add basic support for the Broadcom BCM2835 SoC
Stephen Warren [Sun, 5 Aug 2012 16:07:21 +0000 (16:07 +0000)]
ARM: add basic support for the Broadcom BCM2835 SoC

This SoC is used in the Raspberry Pi, for example.

For more details, see:
http://www.broadcom.com/products/BCM2835
http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf.

Initial support is enough to boot to a serial console, execute a minimal
set of U-Boot commands, download data over a serial port, and boot a
Linux kernel. No storage or network drivers are implemented.

GPIO driver originally by Vikram Narayanan <vikram186@gmail.com>
with many fixes from myself.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
12 years agoARM: arm1176: enable instruction cache in arch_cpu_init()
Stephen Warren [Sun, 5 Aug 2012 16:07:20 +0000 (16:07 +0000)]
ARM: arm1176: enable instruction cache in arch_cpu_init()

Note that this affects all users of the ARM1176 CPU that enable
CONFIG_ARCH_CPU_INIT, not just the BCM2835 SoC, potentially such as
tnetv107x.

Cc: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
12 years agoREADME: fix references to config_cmd_default.h
Stephen Warren [Sun, 5 Aug 2012 16:07:19 +0000 (16:07 +0000)]
README: fix references to config_cmd_default.h

All usage of config_cmd_default.h uses <> for the include statement.
Update the README to do the same, rather than using "".

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
12 years agosnowball: Adding board specific cache cleanup routine
Mathieu J. Poirier [Tue, 31 Jul 2012 08:59:33 +0000 (08:59 +0000)]
snowball: Adding board specific cache cleanup routine

Following ARM's reference manuel for initializing the cache - the
kernel won't boot otherwise.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
12 years agoarmv7: Adding cpu specific cache managmenent
Mathieu J. Poirier [Tue, 31 Jul 2012 08:59:32 +0000 (08:59 +0000)]
armv7: Adding cpu specific cache managmenent

Some CPU (i.e u8500) need more cache management before launching
the Linux kernel.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
12 years agou8500: Separating mmc config parameters from driver
John Rigby [Tue, 31 Jul 2012 08:59:31 +0000 (08:59 +0000)]
u8500: Separating mmc config parameters from driver

Configuration in vexpress and u8500.v1 is different from what
is needed in u8500.v2.  As such, card configuration specifics need
to reside in the board file rather than the driver.

Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
12 years agou8500: Enabling power to MMC device on AB8500 V2
Mathieu J. Poirier [Tue, 31 Jul 2012 08:59:30 +0000 (08:59 +0000)]
u8500: Enabling power to MMC device on AB8500 V2

Register mapping has changed on power control chip between
the first and second revision.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
12 years agou8500: Moving processor-specific functions to cpu area.
Mathieu J. Poirier [Tue, 31 Jul 2012 08:59:29 +0000 (08:59 +0000)]
u8500: Moving processor-specific functions to cpu area.

Functions such as providing power to the MMC device and reading
the processor version register should be in the cpu area for
access by multiple u8500-based boards.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
12 years agosnowball: applying power to LAN and GBF controllers
Mathieu J. Poirier [Tue, 31 Jul 2012 08:59:28 +0000 (08:59 +0000)]
snowball: applying power to LAN and GBF controllers

LAN and GBF need to be powered explicitely, doing so with
interface to AB8500 companion chip.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
12 years agosnowball: Moving to ux500.v2 addess scheme for PRCMU access
Mathieu J. Poirier [Tue, 31 Jul 2012 08:59:27 +0000 (08:59 +0000)]
snowball: Moving to ux500.v2 addess scheme for PRCMU access

Addresses between ux500.v1 and ux500.v2 have changed slightly,
hence mandating a review of the PRCMU access methods.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
12 years agosnowball: Adding CPU clock initialisation
Mathieu J. Poirier [Tue, 31 Jul 2012 08:59:26 +0000 (08:59 +0000)]
snowball: Adding CPU clock initialisation

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
12 years agosnowball: Adding architecture dependent initialisation
Mathieu J. Poirier [Tue, 31 Jul 2012 08:59:25 +0000 (08:59 +0000)]
snowball: Adding architecture dependent initialisation

Enabling timers and clocks in PRCMU and cleaning up mailbox.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
12 years agou8500: Moving prcmu to cpu directory
Mathieu J. Poirier [Tue, 31 Jul 2012 08:59:24 +0000 (08:59 +0000)]
u8500: Moving prcmu to cpu directory

This is to allow the prcmu functions to be used by multiple
u8500-based processors.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
12 years agosnowball: Add support for ux500 based snowball board
Mathieu J. Poirier [Fri, 3 Aug 2012 11:05:12 +0000 (11:05 +0000)]
snowball: Add support for ux500 based snowball board

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Conflicts:

drivers/gpio/Makefile

12 years agodavinci, c6x: Always use C version of reset code
Tom Rini [Wed, 27 Jun 2012 05:27:05 +0000 (05:27 +0000)]
davinci, c6x: Always use C version of reset code

We can safely use the same reset code written in C for both Davinci and
C6X platforms.  In addition the C version of the code is marginally
smaller on Davinci.

Tested-by: Matt Porter <mporter@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
12 years agoarm: omap: Fix switching back to nandecc sw.
Jeroen Hofstee [Tue, 14 Aug 2012 10:39:29 +0000 (10:39 +0000)]
arm: omap: Fix switching back to nandecc sw.

Orjan Friberg wrote at [1]:

"For the beagleboard, ecc.size is not explicitly set when doing 'nandecc
sw'. If it's not set for the NAND_ECC_SOFT case in nand_scan_tail, it's
set to 256 bytes.

When doing 'nandecc hw', ecc.size is set to 512 bytes. Hence, when
changing back to 'nandecc sw' ecc.size remains at 512 bytes and suddenly
the format has changed."

No patch has been submitted and the issue was still present. This patch
adds the mentioned solution. Tested on a tam3517 board.

[1] http://lists.denx.de/pipermail/u-boot/2012-February/119002.html

cc: Orjan Friberg <of@flatfrog.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
12 years agodavinci: enbw_cmc: change switch init behaviour
Heiko Schocher [Mon, 13 Aug 2012 23:51:04 +0000 (23:51 +0000)]
davinci: enbw_cmc: change switch init behaviour

change the behaviour of switch initialization:

- rename "pwl" to "lan" in hwconfig parameter
  "lan" = port 1 with phy addr 2
  "lmn" = port 2 with phy addr 3

- if we have a valid switch config file in flash, do not
  evaluate the settings in the hwconfig "lan" or "lmn"
  subcommand.

- if we have no valid switch config file in flash, start
  the switch with default values, if we have a "lan" or
  a "lmn" hwconfig subcommand. If no "lan" or "lmn" is
  found in hwconfig, do nothing with the switch.

Signed-off-by: Heiko Schocher <hs@denx.de>
12 years agoam33xx evm: Update secure_emif_sdram_config during ddr init
Satyanarayana, Sandhya [Thu, 9 Aug 2012 18:29:57 +0000 (18:29 +0000)]
am33xx evm: Update secure_emif_sdram_config during ddr init

This patch updates secure_emif_sdram_config with the
same value written to sdram_config during ddr3 initialization.

During suspend/resume, this value is copied into sdram_config.
With this, a write to sdram_config at the end of resume sequence
which triggers an init sequence can be avoided.

Without this register write in place, the DDR_RESET line goes
low for a few cycles during resume which is a violation of the
JEDEC spec.

Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
12 years agoda8xx/hawkboard: Add support for ohci host controller
Sughosh Ganu [Thu, 9 Aug 2012 10:45:20 +0000 (10:45 +0000)]
da8xx/hawkboard: Add support for ohci host controller

Also enable the ohci port on hawkboard. These additions result in an
increased u-boot size -- adjust the same accordingly in the board's
config.

Move the usb header for da8xx platforms under arch-davinci.

Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
12 years agoarmv7: Make lowlevel_init.S's lowlevel_init do ABI compatible stack
Tom Rini [Thu, 9 Aug 2012 15:22:06 +0000 (08:22 -0700)]
armv7: Make lowlevel_init.S's lowlevel_init do ABI compatible stack

Make sure that when we setup the stack before calling s_init() we have
the stack have 8-byte alignment for ABI compliance.

Tested-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@ti.com>
12 years agoomap4/5/am33xx: Make lowlevel_init available to all armv7 platforms
Tom Rini [Thu, 9 Aug 2012 00:03:10 +0000 (17:03 -0700)]
omap4/5/am33xx: Make lowlevel_init available to all armv7 platforms

Make the lowlevel_init function that these platforms have which just
sets up the stack and calls a C function available to all armv7
platforms.  As part of this we change some of the macros that are used
to be more clear.  Previously (except for am335x evm) we had been
setting CONFIG_SYS_INIT_SP_ADDR to a series of new defines that are
equivalent to simply referencing NON_SECURE_SRAM_END.  On am335x evm we
should have been doing this initially and do now.

Cc: Sricharan R <r.sricharan@ti.com>
Tested-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam335x evm: Enable support for spi0
Tom Rini [Wed, 8 Aug 2012 21:35:55 +0000 (14:35 -0700)]
am335x evm: Enable support for spi0

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Add support, update omap3 McSPI driver
Tom Rini [Wed, 8 Aug 2012 21:29:51 +0000 (14:29 -0700)]
am33xx: Add support, update omap3 McSPI driver

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam335x evm: Enable MMC1 pinmux
Tom Rini [Wed, 8 Aug 2012 17:32:09 +0000 (10:32 -0700)]
am335x evm: Enable MMC1 pinmux

MMC1 is available in profile 2 on the GP EVM and is exposed on the
expansion header on beaglebone.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam33xx: Correct MMC1, remove MMC2 support
Tom Rini [Wed, 8 Aug 2012 17:31:08 +0000 (10:31 -0700)]
am33xx: Correct MMC1, remove MMC2 support

- Correct the MMC1 base offset
- Remove MMC2 (that area is reserved and not MMC2).
- Add the real BOOT_DEVICE_MMC2 value

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoam335x evm: Initial support for AM335x GP EVM Profiles
Tom Rini [Wed, 8 Aug 2012 16:03:07 +0000 (09:03 -0700)]
am335x evm: Initial support for AM335x GP EVM Profiles

The AM335x GP EVM can have one of 8 different profiles selected.  Each
profile has a different set of peripherals and requires different pinmux
configurations that conflict with other profiles.  i2c1 is an example of
a conflicted mux currently.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agosc_sps_1: Adjust board config to use 'mxs' SoC code
Otavio Salvador [Thu, 9 Aug 2012 04:12:44 +0000 (04:12 +0000)]
sc_sps_1: Adjust board config to use 'mxs' SoC code

Fix build failure due the move of mx28 code to 'mxs' SoC.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agortc: imxdi: Initial support
Benoît Thébaudeau [Wed, 8 Aug 2012 04:52:47 +0000 (04:52 +0000)]
rtc: imxdi: Initial support

Add support for Freescale's i.MX DryIce RTC, present on i.MX25.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agoMX28: Add SchulerControl SC_SPS_1 platform
Marek Vasut [Tue, 7 Aug 2012 00:01:52 +0000 (00:01 +0000)]
MX28: Add SchulerControl SC_SPS_1 platform

This i.MX28 platform supports the following:
* 2x FEC ethernet
* USB on USBH0
* I2C EEPROM
* SPI NVRAM
* LEDs

Signed-off-by: Marek Vasut <marex@denx.de>
12 years agoi.MX28: bug fixes in PMU configuration code
Stathis Voukelatos [Tue, 7 Aug 2012 14:56:14 +0000 (15:56 +0100)]
i.MX28: bug fixes in PMU configuration code

Signed-off-by: Stathis Voukelatos <stathis.voukelatos@linn.co.uk>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
12 years agoMX28: Move the u-boot.bd info CPUDIR/SOCDIR
Marek Vasut [Sun, 5 Aug 2012 00:36:16 +0000 (00:36 +0000)]
MX28: Move the u-boot.bd info CPUDIR/SOCDIR

This gets us rid of duplication of the same file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agovision2: do not overwrite the console
Fabio Estevam [Sun, 5 Aug 2012 07:31:34 +0000 (07:31 +0000)]
vision2: do not overwrite the console

On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agomx51evk: do not overwrite the console
Fabio Estevam [Sun, 5 Aug 2012 07:31:33 +0000 (07:31 +0000)]
mx51evk: do not overwrite the console

On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agoMX5: mx53loco: do not overwrite the console
Stefano Babic [Sun, 5 Aug 2012 00:18:53 +0000 (00:18 +0000)]
MX5: mx53loco: do not overwrite the console

On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agoMX28: Fix MXS MMC DMA issues
Marek Vasut [Fri, 6 Jul 2012 21:25:57 +0000 (21:25 +0000)]
MX28: Fix MXS MMC DMA issues

The DMA didn't work properly because the DMA descriptor wasn't
properly cleaned after it was used once. Also, the DMA_ENABLE bit
was enabled/disabled too late.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
12 years agoMX28: Transfer small blocks via PIO in MXS MMC
Marek Vasut [Fri, 6 Jul 2012 21:25:56 +0000 (21:25 +0000)]
MX28: Transfer small blocks via PIO in MXS MMC

Large blocks (> 512b) shall be transfered via DMA to make
things a bit faster.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
12 years agoMX28: Split out the PIO and DMA transfer functions
Marek Vasut [Fri, 6 Jul 2012 21:25:55 +0000 (21:25 +0000)]
MX28: Split out the PIO and DMA transfer functions

Move DMA and PIO data transfer parts into separate functions.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
12 years agoMX28: Fix up the MMC driver DMA mode
Marek Vasut [Fri, 6 Jul 2012 21:25:54 +0000 (21:25 +0000)]
MX28: Fix up the MMC driver DMA mode

The DMA mode didn't properly configure the DMA_ENABLE bit in CTRL1.
Also, it was using SSP0 DMA channel for all SSP devices.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
12 years agomxs: rename mx28.c to mxs.c as it is common to i.MX233 and i.MX28 SoCs
Otavio Salvador [Sun, 5 Aug 2012 09:05:34 +0000 (09:05 +0000)]
mxs: rename mx28.c to mxs.c as it is common to i.MX233 and i.MX28 SoCs

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
12 years agomxs: Clarify why we poweroff in case of brownout in 5v conflict
Otavio Salvador [Sun, 5 Aug 2012 09:05:33 +0000 (09:05 +0000)]
mxs: Clarify why we poweroff in case of brownout in 5v conflict

If VDDIO has a brownout, then the VDD5V_GT_VDDIO becomes unreliable
but this wasn't clear on code so a comment has been added to clarify
it.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
12 years agomxs: Reowork SPL to use 'mxs' prefix for methods
Otavio Salvador [Sun, 5 Aug 2012 09:05:32 +0000 (09:05 +0000)]
mxs: Reowork SPL to use 'mxs' prefix for methods

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
12 years agomxs: prefix register structs with 'mxs' prefix
Otavio Salvador [Sun, 5 Aug 2012 09:05:31 +0000 (09:05 +0000)]
mxs: prefix register structs with 'mxs' prefix

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>