Masahiro Yamada [Fri, 15 Aug 2014 17:50:12 +0000 (02:50 +0900)]
kconfig: remove DEFCONFIG_LIST
CONFIG_DEFCONFIG_LIST specifies the default defconfig.
It is used by "make savedefconfig" when .config is missing.
But that's it. I could not find other useful cases.
As a side effect, CONFIG_DEFCONFIG_LIST="configs/sandbox_defconfig"
is contained in .config of every target board, which some people
think is odd. So, let's remove it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
Vasili Galka [Thu, 14 Aug 2014 09:40:55 +0000 (12:40 +0300)]
Makefile: Use Kbuild style for system_map.o generation step
The command generating the "common/system_map.o" file was always shown
during the build making the output messy. Now it is called using the
Kbuild "cmd" macro, so that the full command is shown only when
building in verbose mode.
Colin Cross [Tue, 12 Aug 2014 17:59:27 +0000 (10:59 -0700)]
add header for Android sparse image format
Add a BSD-3 relicensed version of the Android sparse format image
header from:
https://android.googlesource.com/platform/system/core/+/28fa5bc347390480fe190294c6c385b6a9f0d68b/libsparse/sparse_format.h
Unchanged except for the license header.
Cc: Tom Rini <trini@ti.com> Signed-off-by: Colin Cross <ccross@android.com>
Masahiro Yamada [Wed, 6 Aug 2014 04:42:34 +0000 (13:42 +0900)]
tools/genboardscfg.py: Do not output SPLCPU field
Prior to Kconfig, the CPU field of boards.cfg could optionally have
":SPLCPU", like "armv7:arm720t".
(Actually this syntax was only used for Tegra platform.)
Now it is not necessary at all because CPU is defined by
CONFIG_SYS_CPU in Kconfig.
For Tegra platform, the Kconfig option is described as follows:
config SYS_CPU
string
default "arm720t" if SPL_BUILD
default "armv7" if !SPL_BUILD
Masahiro Yamada [Tue, 5 Aug 2014 06:56:43 +0000 (15:56 +0900)]
kbuild: move extra gcc checks to scripts/Makefile.extrawarn
This commit was imported from Linux Kernel:
commit a86fe353 written by me.
W=... provides extra gcc checks.
Having such code in scripts/Makefile.build results in the same flags
being added to KBUILD_CFLAGS multiple times becuase
scripts/Makefile.build is invoked every time Kbuild descends into
the subdirectories.
Since the top Makefile is already too cluttered, this commit moves
all of extra gcc check stuff to a new file scripts/Makefile.extrawarn,
which is included from the top Makefile.
Masahiro Yamada [Fri, 15 Aug 2014 15:59:26 +0000 (00:59 +0900)]
tools, scripts: refactor error-out statements of Python scripts
In Python, sys.exit() function can also take an object other
than an integer.
If an integer is given to the argument, Python exits with the return
code of it. If a non-integer argument is given, Python outputs it
to stderr and exits with the return code of 1.
That means,
print >> sys.stderr, "Blah Blah"
sys.exit(1)
is equivalent to
sys.exit("Blah Blah")
The latter is a useful shorthand.
Note:
Some error messages in Buildman and Patman were output to stdout.
But they should go to stderr. They are also fixed by this commit.
This is a nice side effect.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
Shaohui Xie [Wed, 13 Aug 2014 10:19:15 +0000 (18:19 +0800)]
powerpc/T4240QDS/eth: some fix for XFI
XFI is supported on T4QDS-XFI board, which removed slot3, and four LANEs
of serdes2 are routed to a SFP+ cages, which to house fiber cable or
direct attach cable(copper), the copper cable is used to emulate the
10GBASE-KR scenario.
So, for XFI usage, there are two scenarios, one will use fiber cable,
another will use copper cable. For fiber cable, there is NO PHY, while
for copper cable, we need to use internal PHY which exist in Serdes to
do auto-negotiation and link training, which implemented in kernel.
We use hwconfig to define cable type for XFI, and fixup dtb based on the
cable type.
For copper cable, set below env in hwconfig:
fsl_10gkr_copper:<10g_mac_name>
the <10g_mac_name> can be fm1_10g1, fm1_10g2, fm2_10g1, fm2_10g2. The
four <10g_mac_name>s do not have to be coexist in hwconfig. For XFI ports,
if a given 10G port will use the copper cable for 10GBASE-KR, set the
<10g_mac_name> of the port in hwconfig, otherwise, fiber cable will be
assumed to be used for the port.
For ex. if four XFI ports will both use copper cable, the hwconfig
should contain:
1. give PHY address to a XFI port, otherwise, the XFI ports will not be
available in U-boot, there is no PHY physically for XFI when using fiber
cable, this is just to make U-boot happy and we can use the XFI ports
in U-boot.
2. fixup dtb to use fixed-link in case of fiber cable which has no PHY.
Kernel requests that a MAC must have a PHY or fixed-link.
When using XFI protocol, the MAC 9/10 on FM1 should init as 10G interface.
Change serdes 2 protocol 56 to 55 which has same feature as 56 since 56
is not valid any longer.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
km-powerpc: define CONFIG_PRAM to protect PHRAM and PNVRAM
When u-boot initializes the RAM (early in boot) it looks for the "pram"
env variable to know which is area it cannot use. If the "pram" env variable
is not found, the default CONFIG_PRAM value is used.
This value used to be 0 (no protection at all). This patch sets it to a
value that covers PHRAM and PNVRAM that must be protected in our case.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
powerpc/mpc85xx: Enabling CPC conditionally based on hwconfig options
If hwconfig does not contains "en_cpc" then by default all cpcs are enabled
If this config is defined then only those individual cpcs which are defined
in the subargument of "en_cpc" will be enabled e.g en_cpc:cpc1,cpc2; (this
will enable cpc1 and cpc2) or en_cpc:cpc2; (this enables just cpc2)
Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Lukasz Majewski [Mon, 18 Aug 2014 10:12:27 +0000 (12:12 +0200)]
test: dfu: cosmetic: Add missing license information to DFU test scripts
By mistake I've forgotten to add the SPDX license tags for the DFU testing
scripts.
This commit fixes that and also provides some other relevant information.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Stephen Warren <swarren@nvidia.com>
Tim Harvey [Fri, 8 Aug 2014 05:35:45 +0000 (22:35 -0700)]
imx: ventana: add econfig command
The Gateworks Ventana EEPROM contains a set of configuration bits that
affect the removal of device-tree nodes that support peripherals that do not
exist on sub-loaded boards. This patch adds:
- a structure to define a config bit name, dt node alias, bit position
- an array of supported configuration items
- an econfig command to get/set/list configuration bits
- use of the array when adjusting the FDT prior to boot
Tim Harvey [Fri, 8 Aug 2014 05:35:48 +0000 (22:35 -0700)]
imx: ventana: configure i2c_dis# pin properly for gw53xx
The i2c_dis# pinmux/padconf was missing for the GW53xx (this feature was
added to the GW53xx on revB PCB's). Additionally, remove the duplicate
config for GW54xx.
Tim Harvey [Fri, 8 Aug 2014 05:35:41 +0000 (22:35 -0700)]
imx: ventana: set dynamic env var for flash layout
NAND devices have differing layouts with respect to page size and pages per
block. These parameters affect the parameters that need to be passed to
mkfs.ubifs and ubinize used to create UBI images. The various NAND chips
supported by Gateworks Ventana fall into two different layouts which we
refer to as 'normal' and 'large'. This layout is useful when referencing
ubi files to download and flash so we create a dynamic env variable for it.
Tim Harvey [Fri, 8 Aug 2014 05:57:29 +0000 (22:57 -0700)]
pci: mx6: fix occasional link failures
According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
for SS function) must remain deasserted until the reference clock is running
at the appropriate frequency.
Without this patch we find a high link failure rate (>5%) on certain
IMX6 boards at various temperatures.
Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Marek Vasut [Sun, 3 Aug 2014 23:47:10 +0000 (01:47 +0200)]
ARM: mx6: Handle the MMDCx_MDCTL COL field caprices
The COL field value cannot be easily calculated from the desired
column number. Instead, there are special cases for that, see the
datasheet, MMDCx_MDCTL field description, field COL . Cater for
those special cases.
Marek Vasut [Sun, 3 Aug 2014 23:47:09 +0000 (01:47 +0200)]
ARM: mx6: Prevent overflow in DRAM size detection
The MX6 DRAM controller can be configured to handle 4GiB of DRAM, but
only 3840 MiB of that can be really used. In case the controller is
configured to operate a 4GiB module, the imx_ddr_size() function will
correctly compute that there is 4GiB of DRAM in the system. Firstly,
the return value is 32-bit, so the function will effectively return
zero. Secondly, the MX6 cannot address the full 4GiB, but only 3840MiB
of all that. Thus, clamp the returned size to 3840MiB in such case.
Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
Gabriel Huau [Sat, 26 Jul 2014 18:35:43 +0000 (11:35 -0700)]
mx6: add support of multi-processor command
This allows u-boot to load different OS or Bare Metal application on
different cores of the i.MX6 SoC.
For example: running Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.
Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Stefano Babic <sbabic@denx.de>
Stephen Warren [Thu, 31 Jul 2014 23:29:38 +0000 (17:29 -0600)]
ARM: tegra: remove custom define for Jetson TK1
Now that Kconfig has a per-board option, we can use that directly rather
than inventing a custom define for the AS3722 code to determine which
board it's being built for.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Wed, 2 Jul 2014 20:12:30 +0000 (14:12 -0600)]
ARM: tegra: Use mem size from MC rather than ODMDATA
In at least Tegra124, the Tegra memory controller (MC) has a register
that controls the memory size. Read this to determine the memory size
rather than requiring this to be redundantly encoded into the ODMDATA.
This way, changes to the BCT (i.e. MC configuration) automatically
updated SW's view of the memory size, without requiring manual changes
to the ODMDATA.
Future work potentially required:
* Clip the memory size to architectural limits; U-Boot probably doesn't
and won't support either LPAE or Tegra's "swiss cheese" memory layout,
at least one of which would be required for >2GB RAM.
* Subtract out any carveout required by firmware on future SoCs.
Based-on-work-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Fri, 25 Jul 2014 23:16:54 +0000 (17:16 -0600)]
ARM: tegra: enable DFU too
Enable DFU protocol support (via the "dfu" command) on Tegra boards where
USB device/gadget mode is enabled.
Note that for DFU to operate correctly on Tegra, we still need some DFU
fixes/enhancements that are going through the DFU -> USB trees. However,
the code builds just fine without those changes, and applying this patch
now will allow both sets of patches to meet in the main U-Boot tree much
more quickly.
In order to run test/dfu/dfu_gadget_test.sh, you would need to add the
following to the board configuration:
CONFIG_EXT4_WRITE
CONFIG_CMD_EXT4_WRITE
However, I haven't enabled those here, since I believe the main use-case
for DFU on Tegra is raw flash writing, rather than filesystem access, so
we don't need the additional code-size hit. However, I could be persuaded
otherwise! We should probably add a separate test script for raw flash
access.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Bryan Wu [Tue, 24 Jun 2014 02:45:29 +0000 (11:45 +0900)]
ARM: tegra: Disable VPR
On Tegra114 and Tegra124 platforms, certain display-related registers cannot
be accessed unless the VPR registers are programmed. For bootloader, we
probably don't care about VPR, so we disable it (which counts as programming
it, and allows those display-related registers to be accessed).
Sascha Silbe [Sun, 11 Aug 2013 14:40:45 +0000 (16:40 +0200)]
openrd: fail build if U-Boot would overlap with environment in flash
Set CONFIG_BOARD_SIZE_LIMIT so we'll notice at build time if U-Boot
has grown so large that it would overlap with the environment area in
flash, rather than bricking the device at run-time on first saveenv.
Sascha Silbe [Sun, 11 Aug 2013 14:40:43 +0000 (16:40 +0200)]
README: document CONFIG_BOARD_SIZE_LIMIT
CONFIG_BOARD_SIZE_LIMIT was introduced by f3a14d37 [Makefile: allow
boards to check file size limits] and is in use by several boards, but
never got documented.
Stephen Warren [Mon, 11 Aug 2014 22:09:28 +0000 (16:09 -0600)]
pci: fix overflow in __pci_hose_bus_to_phys w/ large RAM
If a 32-bit system has 2GB of RAM, and the base address of that RAM is
2GB, then start+size will overflow a 32-bit value (to a value of 0).
To avoid such an overflow, convert __pci_hose_bus_to_phys() to calculate
the offset of a bus address into a PCI region, rather than comparing a
bus address against the end of a PCI region.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Heiko Schocher [Mon, 11 Aug 2014 09:17:08 +0000 (11:17 +0200)]
tools, fit_info: increase buffer for command name
currently the buffer for command name is 50 bytes only. If using
fit_info with long absolute paths, this is not enough, so raise
it to 256 (as it is in fit_check_sign)
Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 9 Aug 2014 21:33:09 +0000 (15:33 -0600)]
buildman: Allow selection of the number of commits to build
It is useful to be able to build only some of the commits in a branch. Add
support for the -c option to allow this. It was previously parsed by
buildman but not implemented.
Suggested-by: York Sun <yorksun@freescale.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: York Sun <yorksun@freescale.com>
Simon Glass [Sat, 9 Aug 2014 21:33:08 +0000 (15:33 -0600)]
buildman: Introduce an 'and' operator for board selection
Currently buildman allows a list of boards to build to be specified on the
command line. The list can include specific board names, architecture, SOC
and so on.
At present the list of boards is dealt with in an 'OR' fashion, and there
is no way to specify something like 'arm & freescale', meaning boards with
ARM architecture but only those made by Freescale. This would exclude the
PowerPC boards made by Freescale.
Support an '&' operator on the command line to permit this. Ensure that
arguments can be specified in a single string to permit easy shell quoting.
Suggested-by: York Sun <yorksun@freescale.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: York Sun <yorksun@freescale.com>
Simon Glass [Sat, 9 Aug 2014 21:33:03 +0000 (15:33 -0600)]
buildman: Add verbose option to display errors as they happen
Normally buildman operates in two passes - one to do the build and another
to summarise the errors. Add a verbose option (-v) to display build problems
as they happen. With -e also given, this will display errors too.
When building the current source tree (rather than a list of commits in a
branch), both -v and -e are enabled automatically.
Simon Glass [Sat, 9 Aug 2014 21:33:02 +0000 (15:33 -0600)]
buildman: Refactor output options
We need the output options to be available in several places. It's a pain
to pass them into each function. Make them properties of the builder and
add a single function to set them up. At the same time, add a function which
produces summary output using these options.
Simon Glass [Sat, 9 Aug 2014 21:32:59 +0000 (15:32 -0600)]
buildman: Allow building of current source tree
Originally buildman had some support for building the current source tree.
However this was dropped before it was submitted, as part of the effort to
make it faster when building entire branches.
Reinstate this support. If no -b option is given, buildman will build the
current source tree.
Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Simon Glass <sjg@chromium.org>
powerpc/t104xrdb: support deep sleep in SPI/SD boot
Add deep sleep support in SPI/SD boot. The destination address
second stage uboot image is loaded to is changed because
currently this address will be used by kernel which means
we can't reserve it for resume.
Entry point to kernel is still placed in second stage uboot.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Jason Jin [Wed, 19 Mar 2014 02:47:56 +0000 (10:47 +0800)]
powerpc/t1042RDB: Add Video - HDMI support
T1042 has internal display interface unit (DIU) for driving video.
T1042RDB supports video mode via
-LCD using TI enconder
-HDMI type interface via HDMI encoder
Chrontel, CH7301C encoder which is I2C programmable is used
as HDMI connector on T1042RDB.
This patch add support to
-enable Video interface for T1042RDB
-route qixis multiplexing to enable DIU-HDMI interface on board
-program DIU pixel clock gerenartor for T1042
-program HDMI encoder via I2C on board
Signed-off-by: Jason Jin <Jason.Jin@freescale.com> Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
[York Sun: resolve conflict and move changes to T104xRDB.h] Reviewed-by: York Sun <yorksun@freescale.com>
sunxi: dram: Autodetect DDR3 bus width and density
In the case if the 'dram_para' struct does not specify the exact bus
width or chip density, just use a trial and error method to find a
usable configuration.
Because all the major bugs in the DRAM initialization sequence are
now hopefully fixed, it should be safe to re-initialize the DRAM
controller multiple times until we get it configured right. The
original Allwinner's boot0 bootloader also used a similar
autodetection trick.
The DDR3 spec contains the package pinout and addressing table for
different possible chip densities. It appears to be impossible to
distinguish between a single chip with 16 I/O data lines and a pair
of chips with 8 I/O data lines in the case if they provide the same
storage capacity. Because a single 16-bit chip has a higher density
than a pair of equivalent 8-bit chips, it has stricter refresh timings.
So in the case of doubt, we assume that 16-bit chips are used.
Additionally, only Allwinner A20 has all A0-A15 address lines and
can support densities up to 8192. The older Allwinner A10 and
Allwinner A13 can only support densities up to 4096.
We deliberately leave out DDR2, dual-rank configurations and the
special case of a 8-bit chip with density 8192. None of these
configurations seem to have been ever used in real devices. And no
new devices are likely to use these exotic configurations (because
only up to 2GB of RAM can be populated in any case).
This DRAM autodetection feature potentially allows to have a single
low performance fail-safe DDR3 initialiazation for a universal single
bootloader binary, which can be compatible with all Allwinner
A10/A13/A20 based devices (if the ifdefs are replaced with a runtime
SoC type detection).
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi: dram: Derive write recovery delay from DRAM clock speed
The write recovery time is 15ns for all JEDEC DDR3 speed bins. And
instead of hardcoding it to 10 cycles, it is possible to set tighter
timings based on accurate calculations. For example, DRAM clock
frequencies up to 533MHz need only 8 cycles for write recovery.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi: dram: Drop DDR2 support and assume only single rank DDR3 memory
All the known Allwinner A10/A13/A20 devices are using just single rank
DDR3 memory. So don't pretend that we support DDR2 or more than one
rank, because nobody could ever test these configurations for real and
they are likely broken. Support for these features can be added back
in the case if such hardware actually exists.
As part of this code cleanup, also replace division by 1024 with
division by 1000 for the refresh timing calculations. This allows
to use the original non-skewed tRFC timing table from the DRR3 spec
and make code less confusing.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi: dram: Configurable DQS gating window mode and delay
The hardware DQS gate training is a bit unreliable and does not
always find the best delay settings.
So we introduce a 32-bit 'dqs_gating_delay' variable, where each
byte encodes the DQS gating delay for each byte lane. The delay
granularity is 1/4 cycle.
Also we allow to enable the active DQS gating window mode, which
works better than the passive mode in practice. The DDR3 spec
says that there is a 0.9 cycles preamble and 0.3 cycle postamble.
The DQS window has to be opened during preamble and closed during
postamble. In the passive window mode, the gating window is opened
and closed by just using the gating delay settings. And because
of the 1/4 cycle delay granularity, accurately hitting the 0.3
cycle long postamble is a bit tough. In the active window mode,
the gating window is auto-closing with the help of monitoring
the DQS line, which relaxes the gating delay accuracy requirements.
But the hardware DQS gate training is still performed in the passive
window mode. It is a more strict test, which is reducing the results
variance compared to the training with active window mode.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi: dram: Add a helper function 'mctl_get_number_of_lanes'
It is going to be useful in more than one place.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi: dram: Improve DQS gate data training error handling
The stale error status should be cleared for all sun4i/sun5i/sun7i
hardware and not just for sun7i. Also there are two types of DQS
gate training errors ("found no result" and "found more than one
possible result"). Both are handled now.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com>