Allow usage of the imx-common/iomux-v3.h framework by including pad settings for
the i.MX35. The content of the file is taken from Linux kernel at commit 267dd34, plus the required changes to make it work in U-Boot.
Allow usage of the imx-common/iomux-v3.h framework by including pad settings for
the i.MX25. The content of the file is taken from Linux kernel at commit 267dd34, plus the required changes to make it work in U-Boot.
Marek Vasut [Sun, 21 Apr 2013 05:52:24 +0000 (05:52 +0000)]
arm: imx: Pack u-boot.bin into uImage for SPL
The U-Boot SPL can parse the uImage format and gather information from
it about the payload. Make use of this and wrap u-boot.bin into uImage
format. The benefit is the SPL will know the size of the payload
instead of using fixed size of the payload defined at compile time.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com>
Marek Vasut [Sun, 21 Apr 2013 05:52:23 +0000 (05:52 +0000)]
nand: Add SPL_NAND support to mxc_nand_spl
Add support for generic NAND SPL via the SPL framework into the
mxc_nand_spl driver. This is basically just a simple rename and
publication of the already implemented functions. To avoid the
bare-bones functions getting in the way of the NAND_SPL, build
them only if CONFIG_SPL_FRAMEWORK is not defined.
Also make sure the requested payload is aligned to full pages,
otherwise this simple driver fails to load the last page.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Scott Wood <scottwood@freescale.com>
Marek Vasut [Sun, 21 Apr 2013 05:52:22 +0000 (05:52 +0000)]
imx: Align the imximage header and payload to multiples of 4k
The MX53 ROM loads the data from NAND in multiples of pages and
supports maximum page size of 4k. Thus, align the image and header
to 4k to be safe from ROM bugs.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com>
Marek Vasut [Thu, 25 Apr 2013 10:16:02 +0000 (10:16 +0000)]
tools: arm: imx: Implement BOOT_OFFSET command for imximage
Implement BOOT_OFFSET command for imximage. This command is parallel
to current BOOT_FROM command, but allows more flexibility in configuring
arbitrary image header offset. Also add an imximage.cfg with default
offset values into arm/arch/imx-common/ so the board-specific imximage.cfg
can include this file to avoid magic constants.
The syntax of BOOT_OFFSET command is "BOOT_OFFSET <u32 offset>".
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Stefan Roese <sr@denx.de>
imx: iomux-v3: Include PKE and PUE to pad control pull definitions
PUE requires PKE to mean something, as do pull values with PUE, so do not
compell users to explicitly use PKE and PUE everywhere. This is also what is
done on Linux and what has already been done for i.MX51.
By the way, remove some unused pad control definitions.
There is no change of behavior.
Note that SPI_PAD_CTRL was defined by several boards with a pull value, but
without PKE or PUE, which means that no pull was actually enabled in the pad.
This might be a bug in those boards, but this patch does not change the
behavior, so it just removes the meaningless pull value from those definitions.
Commit dc88403 "iomux-v3: Place pad control definitions into common file" broke
mx51_efikamx because it made i.MX6's pad control definitions conflict with
i.MX51's.
i.MX51's pad control definitions are actually common to some other i.MX
(25/35/53), so move them to the common iomux-v3.h (just like what is done in
Linux's), and select the correct definitions depending on whether CONFIG_MX6 is
defined or not.
IIM:
- Homogenize prg_p naming (the reference manuals are not always self-consistent
for that).
- Add missing SCSx and bank registers.
- Fix the number of banks on i.MX53.
OCOTP:
- Rename iim to ocotp in order to avoid confusion.
- Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the
reference manual.
- Merge the existing spinoff gp1 fuse definition on i.MX6.
- Fix the number of banks on i.MX6.
Otavio Salvador [Wed, 24 Apr 2013 11:23:28 +0000 (11:23 +0000)]
mx53ard: Rework default environment to support FDT, MMC and netboot
This reworks the environment settings to be aligned with the other
i.MX boards. The loadaddr has been changed to allow the Freescale
kernel and mainline kernel to work without environment changes.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Otavio Salvador [Wed, 24 Apr 2013 11:23:27 +0000 (11:23 +0000)]
mxs: mxsboot: Move sdcard BCB header to 4 sectors offset
The MX23 Boot ROM does blindly load from 2048 offset while the MX28
does parse the BCB header to known where to load the image from. We
move the BCB header to 4 sectors offset so same code can be used by
both SoCs avoiding code duplication.
This idea was given by Marek Vasut <marex@denx.de>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Marek Vasut <marex@denx.de>
Otavio Salvador [Fri, 19 Apr 2013 03:42:03 +0000 (03:42 +0000)]
wandboard: Add boot selection support
Adds support for 'bmode' command which let user to choose where to
boot from; this allows U-Boot to load system from another storage
without messing with jumpers.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Otavio Salvador [Fri, 19 Apr 2013 03:42:02 +0000 (03:42 +0000)]
wandboard: Add support for Carrier Board MicroSD card
Allow use of the carrier board MicroSD card available in the
Wandboard; this allow for loading alternative system from the other
card for testing or upgrade proposes.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
CKO1 drives sgtl5000 codec clock on nitrogen boards and wandboard.
Doing this setup in the bootloader will allow us to remove a lot of code in
arch/arm/mach-imx/mach-imx6q.c from the mainline kernel.
Also, according to Eric Nelson: "enabling the clock <in the bootloader> will
remove squeal after an ungraceful reboot (watchdog) if hooked up to speakers."
Setup CCM_CCOSR register to provide a CKO1 clock frequency of 16.5 MHz.
CKO1 drives sgtl5000 codec clock on mx6qsabrelite and doing this setup in the
bootloader will allow us to remove a lot of code in arch/arm/mach-imx/mach-imx6q.c
from the mainline kernel.
mx6q_4x_mt41j128.cfg is also used by mx6qsabresd, and it is safe to use it for
this board as well.
Philip Paeps [Wed, 17 Apr 2013 04:39:27 +0000 (04:39 +0000)]
mx35 iomux: correct input select register index
Prior to this fix, calls to mxc_iomux_set_input() for registers
after MUX_IN_GPIO2_IN_19 would write to the wrong registers,
possibly resulting in unexpected behaviour.
Stefan Roese [Wed, 17 Apr 2013 00:32:43 +0000 (00:32 +0000)]
imx: Add titanium board support (i.MX6 based)
Titanium is a i.MX6 based board from ProjectionDesign / Barco. This
patch adds support for this board with the newly introduced NAND
support for i.MX6.
These are currently used by i.MX28. But the upcoming GPMI NAND port
for i.MX6 will also use these functions. So lets move them to a
common location to re-use them.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
The ARM errata 742230 - "ARM errata: DMB operation may be faulty" is
claimed for Cortex-A9 (r1p0..r2p2). Though i.MX6 uses a newer revision
than r2p2, we are seeing a reboot failure on i.MX6 SMP build that can be
fixed by applying the workaround for this errata. So for safety, let's
define CONFIG_ARM_ERRATA_742230 to enable the workaround on i.MX6.
Simon Glass [Sat, 13 Apr 2013 04:26:41 +0000 (04:26 +0000)]
exynos: Correct use of 64-bit division
The current code is causing errors like this on my toolchains:
/usr/x86_64-pc-linux-gnu/armv7a-cros-linux-gnueabi/binutils-bin/2.22/
ld.bfd.real: failed to merge target specific data of file /usr/lib/gcc/
armv7a-cros-linux-gnueabi/4.7.x-google/libgcc.a(_divdi3.o)
Use do_div() to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Vivek Gautam [Mon, 28 Jan 2013 00:39:59 +0000 (00:39 +0000)]
Exynos5: Add support for USB download boot mode
Exynos5250 supports secondary USB device boot mode. If the iROM fails
to download u-boot from the primary boot device (such as SD or eMMC),
it will try to retrieve from the secondary boot device (such as USB).
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Philip Paeps [Tue, 9 Apr 2013 12:44:31 +0000 (12:44 +0000)]
mx35 iomux: correct offsets of IOMUX registers
This makes mxc_iomux_set_input() work correctly. Previously, the
incorrect offset of IOMUXSW_INPUT_CTL caused mxc_iomux_set_input()
to write to the wrong register, possibly resulting in unexpected
behaviour.
Signed-off-by: Philip Paeps <philip@paeps.cx> Acked-by: Stefano Babic <sbabic@denx.de>
Tom Warren [Wed, 10 Apr 2013 17:32:32 +0000 (10:32 -0700)]
Tegra: Split tegra_get_chip_type() into soc & sku funcs
As suggested by Stephen Warren, use tegra_get_chip() to return
the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for
Tegra30, etc.) and rename tegra_get_chip_type() to reflect its true
function, i.e. tegra_get_chip_sku(), which returns an ID like
TEGRA_SOC_T25, TEGRA_SOC_T33, etc.
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Warren [Wed, 3 Apr 2013 21:39:30 +0000 (14:39 -0700)]
Tegra: Fix MSELECT clock divisors for T30/T114.
A comparison of registers between our internal NV U-Boot and
u-boot-tegra/next showed some discrepancies in the MSELECT
clock divisor programming. T20 doesn't have a MSELECT clk src reg.
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Warren [Mon, 1 Apr 2013 22:48:54 +0000 (15:48 -0700)]
Tegra114: Initialize System Counter (TSC) with osc frequency
T114 needs the SYSCTR0 counter initialized so the TSC can be
read by the kernel. Do it in the bootloader since it's a write-once
deal (secure/non-secure mode dependent).
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Boot script support brings TEC in line with other Tegra boards. To
enable booting a Linux kernel with initial ramdisk, also include support
for the new FIT image type.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tegra: Plutux: Enable NAND and boot script support
Boot script support brings Plutux in line with other Tegra boards. In
order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tegra: Medcom-Wide: Enable NAND and boot script support
Boot script support brings Medcom-Wide in line with other Tegra boards.
In order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Warren [Thu, 28 Mar 2013 17:03:22 +0000 (10:03 -0700)]
Tegra: Restore cp15 VBAR _start vector write for ARMv7
A start vector fix was added by AneeshV for OMAP4 (commit 0d479b53),
and caused the old monilithic Tegra builds to hang due to an undefined
instruction trap. Previously, the code needed to run on both the
AVP (ARM7TDI) and A9, and the AVP doesn't have a CP15 register.
I corrected this in commit 6d6c0bae w/#ifndef CONFIG_TEGRA, but
now that we use SPL, and boot the AVP w/o any ARMv7 code, I can
revert my change, and make Aneesh's change apply to Tegra.
Stephen Warren [Wed, 27 Mar 2013 09:37:02 +0000 (09:37 +0000)]
ARM: tegra: support T33 SKU of Tegra30
Make U-Boot aware of the T33 SKU of Tegra30, and treat it identically
to any other Tegra30.
An alternative would be to simply remove the SKU checking from
tegra_get_chip_type(); most use of the value most likely simply wants
to know the current chip, not the specific SKU. Or, the function could
be split into separate tegra_get_chip() and tegra_get_sku() for the
cases where differentiation really is required.
I wonder whether tegra_get_chip_type() should printf() whenever any
unkown chip/SKU is found, although perhaps the function is called so
early that the printf() wouldn't actually make it to the UART anyway.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Tue, 2 Apr 2013 05:43:36 +0000 (05:43 +0000)]
ARMv7: start.S: stay in HYP mode if u-boot is entered in it
The KVM and Xen hypervisors for the Cortex-A15 virtualization
implementation need to be entered in HYP mode. Should the primary
board firmware already enter HYP mode (Calxeda firmware does that),
we should not deliberately drop back to SVC mode.
Since U-boot does not use the MMU, running in HYP mode is just fine.
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Albert ARIBAUD [Fri, 12 Apr 2013 05:14:30 +0000 (05:14 +0000)]
ARM: fix CONFIG_SPL_MAX_SIZE semantics
Remove SPL-related ASSERT() in arch/arm/cpu/u-boot.lds
as this file is never used for SPL builds.
Rewrite the ASSERT() in arch/arm/cpu/u-boot-spl.lds
to separately test image (text,data,rodata...) size,
BSS size, and full footprint each against its own max,
and make Tegra boards check full footprint.
Also, output section mmutable is not used in SPL builds.
Remove it.
Finally, update README regarding the (now homogeneous)
semantics of CONFIG_SPL_[BSS_]MAX_SIZE and add the new
CONFIG_SPL_MAX_FOOTPRINT macro.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reported-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Andrew Gabbasov [Sun, 7 Apr 2013 23:06:08 +0000 (23:06 +0000)]
fsl_esdhc: Fix DMA transfer completion waiting loop
Rework the waiting for transfer completion loop condition
to continue waiting until both Transfer Complete and DMA End
interrupts occur. Checking of DLA bit in Present State register
looks not needed in addition to interrupts status checking,
so it can be removed from the condition. Also, DMA Error
condition is added to the list of data errors, checked in the loop.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Albert ARIBAUD [Thu, 11 Apr 2013 05:43:21 +0000 (05:43 +0000)]
ARM: Fix __bss_start and __bss_end in linker scripts
Commit 3ebd1cbc introduced compiler-generated __bss_start
and __bss_end__ and commit c23561e7 rewrote all __bss_end__
as __bss_end. Their merge caused silent and harmless but
potentially bug-inducing clashes between compiler- and linker-
generated __bss_end symbols.
Make __bss_end and __bss_start compiler-only, and create
__bss_base and __bss_limit for linker-only use.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reported-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi
clock glitch durant reset) solved, is back now and itwas re-introduced by
commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling).
Actually the glitch is happening due to always toggling between slave mode
and master mode by configuring the CHANNEL_MODE bits in this reset function.
Since the spi driver only supports master mode, set the mode for all channels
always to master mode in order to have a stable, "glitch-free" SPI clock line.
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